/[linux-patches]/genpatches-2.6/tags/2.6.13-4/1305_amd64-smp.patch
Gentoo

Contents of /genpatches-2.6/tags/2.6.13-4/1305_amd64-smp.patch

Parent Directory Parent Directory | Revision Log Revision Log


Revision 168 - (show annotations) (download)
Sun Sep 18 11:19:29 2005 UTC (9 years, 3 months ago) by dsd
File size: 1386 byte(s)
2.6.13-4 release
1 From: Linus Torvalds <torvalds@g5.osdl.org>
2 Date: Sat, 17 Sep 2005 22:41:04 +0000 (-0700)
3 Subject: x86-64/smp: fix random SIGSEGV issues
4 X-Git-Url: http://www.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=bc5e8fdfc622b03acf5ac974a1b8b26da6511c99
5
6 x86-64/smp: fix random SIGSEGV issues
7
8 They seem to have been due to AMD errata 63/122; the fix is to disable
9 TLB flush filtering in SMP configurations.
10
11 Confirmed to fix the problem by Andrew Walrond <andrew@walrond.org>
12
13 [ Let's see if we'll have a better fix eventually, this is the Q&D
14 "let's get this fixed and out there" version ]
15
16 Signed-off-by: Linus Torvalds <torvalds@osdl.org>
17 ---
18
19 --- a/arch/x86_64/kernel/setup.c
20 +++ b/arch/x86_64/kernel/setup.c
21 @@ -831,11 +831,26 @@ static void __init amd_detect_cmp(struct
22 #endif
23 }
24
25 +#define HWCR 0xc0010015
26 +
27 static int __init init_amd(struct cpuinfo_x86 *c)
28 {
29 int r;
30 int level;
31
32 +#ifdef CONFIG_SMP
33 + unsigned long value;
34 +
35 + // Disable TLB flush filter by setting HWCR.FFDIS:
36 + // bit 6 of msr C001_0015
37 + //
38 + // Errata 63 for SH-B3 steppings
39 + // Errata 122 for all(?) steppings
40 + rdmsrl(HWCR, value);
41 + value |= 1 << 6;
42 + wrmsrl(HWCR, value);
43 +#endif
44 +
45 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
46 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
47 clear_bit(0*32+31, &c->x86_capability);

  ViewVC Help
Powered by ViewVC 1.1.20