/[linux-patches]/genpatches-2.6/historical/2.6.3/125_x86_64_2.6.3-1.patch
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Contents of /genpatches-2.6/historical/2.6.3/125_x86_64_2.6.3-1.patch

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Revision 2 - (show annotations) (download) (as text)
Sat Jun 11 23:16:54 2005 UTC (15 years ago) by dsd
File MIME type: text/x-diff
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Import historical releases
1 diff -burpN -X ../KDIFX linux-vanilla/Documentation/nmi_watchdog.txt linux-2.6.3-amd64/Documentation/nmi_watchdog.txt
2 --- linux-vanilla/Documentation/nmi_watchdog.txt 2003-08-23 01:53:06.000000000 +0200
3 +++ linux-2.6.3-amd64/Documentation/nmi_watchdog.txt 2004-02-19 23:28:10.000000000 +0100
4 @@ -22,9 +22,10 @@ CONFIG_X86_UP_IOAPIC is for uniprocessor
5 kernel debugging options, such as Kernel Stack Meter or Kernel Tracer,
6 may implicitly disable the NMI watchdog.]
7
8 -For x86-64, the needed APIC is always compiled in, and the NMI watchdog is
9 -always enabled with I/O-APIC mode (nmi_watchdog=1). Currently, local APIC
10 -mode (nmi_watchdog=2) does not work on x86-64.
11 +For x86-64, the needed APIC is always compiled in, and the NMI
12 +watchdog is always enabled with Local APIC mode (nmi_watchdog=2).
13 +Currently, I/O APIC mode (nmi_watchdog=1) does not work on x86_64/AMD8111
14 +(How about other chipsets?)
15
16 Using local APIC (nmi_watchdog=2) needs the first performance register, so
17 you can't use it for other purposes (such as high precision performance
18 diff -burpN -X ../KDIFX linux-vanilla/Documentation/x86_64/boot-options.txt linux-2.6.3-amd64/Documentation/x86_64/boot-options.txt
19 --- linux-vanilla/Documentation/x86_64/boot-options.txt 2003-10-25 22:57:46.000000000 +0200
20 +++ linux-2.6.3-amd64/Documentation/x86_64/boot-options.txt 2004-02-19 23:28:11.000000000 +0100
21 @@ -5,19 +5,12 @@ only the AMD64 specific ones are listed
22
23 Machine check
24
25 -(see the Opteron BIOS&Kernel manual for more details on the banks etc.)
26 -
27 mce=off disable machine check
28 - mce=nok8 disable k8 specific features
29 - mce=disable<NUMBER> disable bank NUMBER
30 - mce=enable<NUMBER> enable bank number
31 - mce=device Enable more machine check options in Northbridge.
32 - Can be useful for device driver debugging.
33 - mce=NUMBER mcheck timer interval number seconds.
34 - Can be also comma separated in a single mce=
35
36 nomce (for compatibility with i386): same as mce=off
37
38 + Everything else is in sysfs now.
39 +
40 APICs
41
42 apic Use IO-APIC. Default
43 diff -burpN -X ../KDIFX linux-vanilla/arch/i386/kernel/microcode.c linux-2.6.3-amd64/arch/i386/kernel/microcode.c
44 --- linux-vanilla/arch/i386/kernel/microcode.c 2003-10-25 22:58:00.000000000 +0200
45 +++ linux-2.6.3-amd64/arch/i386/kernel/microcode.c 2004-02-19 23:28:09.000000000 +0100
46 @@ -371,7 +371,8 @@ static void do_update_one (void * unused
47 spin_lock_irqsave(&microcode_update_lock, flags);
48
49 /* write microcode via MSR 0x79 */
50 - wrmsr(MSR_IA32_UCODE_WRITE, (unsigned int)(uci->mc->bits), 0);
51 + wrmsr(MSR_IA32_UCODE_WRITE, (u32)(unsigned long)(uci->mc->bits),
52 + (u32)(((unsigned long)uci->mc->bits) >> 32));
53 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
54
55 __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
56 diff -burpN -X ../KDIFX linux-vanilla/arch/i386/oprofile/nmi_int.c linux-2.6.3-amd64/arch/i386/oprofile/nmi_int.c
57 --- linux-vanilla/arch/i386/oprofile/nmi_int.c 2003-09-28 10:54:48.000000000 +0200
58 +++ linux-2.6.3-amd64/arch/i386/oprofile/nmi_int.c 2004-02-19 23:28:09.000000000 +0100
59 @@ -295,8 +295,6 @@ struct oprofile_operations nmi_ops = {
60 };
61
62
63 -#if !defined(CONFIG_X86_64)
64 -
65 static int __init p4_init(void)
66 {
67 __u8 cpu_model = current_cpu_data.x86_model;
68 @@ -347,9 +345,6 @@ static int __init ppro_init(void)
69 return 1;
70 }
71
72 -#endif /* !CONFIG_X86_64 */
73 -
74 -
75 /* in order to get driverfs right */
76 static int using_nmi;
77
78 @@ -381,7 +376,6 @@ int __init nmi_init(struct oprofile_oper
79 }
80 break;
81
82 -#if !defined(CONFIG_X86_64)
83 case X86_VENDOR_INTEL:
84 switch (family) {
85 /* Pentium IV */
86 @@ -400,7 +394,6 @@ int __init nmi_init(struct oprofile_oper
87 return -ENODEV;
88 }
89 break;
90 -#endif /* !CONFIG_X86_64 */
91
92 default:
93 return -ENODEV;
94 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/Kconfig linux-2.6.3-amd64/arch/x86_64/Kconfig
95 --- linux-vanilla/arch/x86_64/Kconfig 2004-02-05 08:10:24.000000000 +0100
96 +++ linux-2.6.3-amd64/arch/x86_64/Kconfig 2004-02-19 23:28:10.000000000 +0100
97 @@ -14,7 +14,8 @@ config X86_64
98 default y
99 help
100 Port to the x86-64 architecture. x86-64 is a 64-bit extension to the
101 - classical 32-bit x86 architecture. For details see http://www.x86-64.org
102 + classical 32-bit x86 architecture. For details see
103 + <http://www.x86-64.org/>.
104
105 config 64BIT
106 def_bool y
107 @@ -89,6 +90,9 @@ config MK8
108 help
109 Optimize for AMD Opteron/Athlon64/Hammer/K8 CPUs.
110
111 +config MPSC
112 + bool "Prescott/Nocona"
113 +
114 config GENERIC_CPU
115 bool "Generic-x86-64"
116 help
117 @@ -101,11 +105,13 @@ endchoice
118 #
119 config X86_L1_CACHE_BYTES
120 int
121 - default "64"
122 + default "128" if GENERIC_CPU || MPSC
123 + default "64" if MK8
124
125 config X86_L1_CACHE_SHIFT
126 int
127 - default "6"
128 + default "7" if GENERIC_CPU || MPSC
129 + default "6" if MK8
130
131 config X86_TSC
132 bool
133 @@ -115,6 +121,23 @@ config X86_GOOD_APIC
134 bool
135 default y
136
137 +config MICROCODE
138 + tristate "/dev/cpu/microcode - Intel CPU microcode support"
139 + ---help---
140 + If you say Y here the 'File systems' section, you will be
141 + able to update the microcode on Intel processors. You will
142 + obviously need the actual microcode binary data itself which is
143 + not shipped with the Linux kernel.
144 +
145 + For latest news and information on obtaining all the required
146 + ingredients for this driver, check:
147 + <http://www.urbanmyth.org/microcode/>.
148 +
149 + To compile this driver as a module, choose M here: the
150 + module will be called microcode.
151 + If you use modprobe or kmod you may also want to add the line
152 + 'alias char-major-10-184 microcode' to your /etc/modules.conf file.
153 +
154 config X86_MSR
155 tristate "/dev/cpu/*/msr - Model-specific register support"
156 help
157 @@ -132,6 +155,11 @@ config X86_CPUID
158 with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
159 /dev/cpu/31/cpuid.
160
161 +config X86_HT
162 + bool
163 + depends on SMP
164 + default y
165 +
166 config MATH_EMULATION
167 bool
168
169 @@ -256,9 +284,13 @@ config GART_IOMMU
170 Normally the kernel will take the right choice by itself.
171 If unsure say Y
172
173 +config SWIOTLB
174 + select GART_IOMMU
175 + bool "Software IOTLB support"
176 +
177 config DUMMY_IOMMU
178 bool
179 - depends on !GART_IOMMU
180 + depends on !GART_IOMMU && !SWIOTLB
181 default y
182 help
183 Don't use IOMMU code. This will cause problems when you have more than 4GB
184 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/Makefile linux-2.6.3-amd64/arch/x86_64/Makefile
185 --- linux-vanilla/arch/x86_64/Makefile 2004-02-05 08:10:24.000000000 +0100
186 +++ linux-2.6.3-amd64/arch/x86_64/Makefile 2004-02-19 23:28:10.000000000 +0100
187 @@ -37,7 +37,9 @@ LDFLAGS := -m elf_x86_64
188 OBJCOPYFLAGS := -O binary -R .note -R .comment -S
189 LDFLAGS_vmlinux := -e stext
190
191 -check_gcc = $(shell if $(CC) $(1) -S -o /dev/null -xc /dev/null > /dev/null 2>&1 ; then echo "$(1)"; else echo "$(2)"; fi)
192 +cflags-$(CONFIG_MK8) += $(call check_gcc,-march=k8,)
193 +cflags-$(CONFIG_MPSC) += $(call check_gcc,-march=pentium4,)
194 +CFLAGS += $(cflags-y)
195
196 CFLAGS += -mno-red-zone
197 CFLAGS += -mcmodel=kernel
198 @@ -45,14 +47,16 @@ CFLAGS += -pipe
199 # this makes reading assembly source easier, but produces worse code
200 # actually it makes the kernel smaller too.
201 CFLAGS += -fno-reorder-blocks
202 -# should lower this a lot and see how much .text is saves
203 -# CFLAGS += -finline-limit=2000
204 CFLAGS += -Wno-sign-compare
205 -# don't enable this when you use kgdb:
206 ifneq ($(CONFIG_DEBUG_INFO),y)
207 CFLAGS += -fno-asynchronous-unwind-tables
208 +# -fweb shrinks the kernel a bit, but the difference is very small
209 +# it also messes up debugging, so don't use it for now.
210 +#CFLAGS += $(call check_gcc,-fweb,)
211 endif
212 -#CFLAGS += $(call check_gcc,-funit-at-a-time,)
213 +# -funit-at-a-time shrinks the kernel .text considerably
214 +# unfortunately it makes reading oopses harder.
215 +CFLAGS += $(call check_gcc,-funit-at-a-time,)
216
217 head-y := arch/x86_64/kernel/head.o arch/x86_64/kernel/head64.o arch/x86_64/kernel/init_task.o
218
219 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/boot/setup.S linux-2.6.3-amd64/arch/x86_64/boot/setup.S
220 --- linux-vanilla/arch/x86_64/boot/setup.S 2003-08-23 02:01:38.000000000 +0200
221 +++ linux-2.6.3-amd64/arch/x86_64/boot/setup.S 2004-02-19 23:28:10.000000000 +0100
222 @@ -292,8 +292,9 @@ loader_ok:
223 /* minimum CPUID flags for x86-64 */
224 /* see http://www.x86-64.org/lists/discuss/msg02971.html */
225 #define SSE_MASK ((1<<25)|(1<<26))
226 -#define REQUIRED_MASK1 ((1<<0)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<8)|(1<<11)| \
227 - (1<<13)|(1<<15)|(1<<24)|(1<<29))
228 +#define REQUIRED_MASK1 ((1<<0)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<8)|\
229 + (1<<13)|(1<<15)|(1<<24))
230 +#define REQUIRED_MASK2 (1<<29)
231
232 pushfl /* standard way to check for cpuid */
233 popl %eax
234 @@ -305,10 +306,10 @@ loader_ok:
235 popl %eax
236 cmpl %eax,%ebx
237 jz no_longmode /* cpu has no cpuid */
238 - movl $0x80000000,%eax
239 + movl $0x0,%eax
240 cpuid
241 - cmpl $0x80000001,%eax
242 - jb no_longmode /* no extended cpuid */
243 + cmpl $0x1,%eax
244 + jb no_longmode /* no cpuid 1 */
245 xor %di,%di
246 cmpl $0x68747541,%ebx /* AuthenticAMD */
247 jnz noamd
248 @@ -318,11 +319,20 @@ loader_ok:
249 jnz noamd
250 mov $1,%di /* cpu is from AMD */
251 noamd:
252 - movl $0x80000001,%eax
253 + movl $0x1,%eax
254 cpuid
255 andl $REQUIRED_MASK1,%edx
256 xorl $REQUIRED_MASK1,%edx
257 jnz no_longmode
258 + movl $0x80000000,%eax
259 + cpuid
260 + cmpl $0x80000001,%eax
261 + jb no_longmode /* no extended cpuid */
262 + movl $0x80000001,%eax
263 + cpuid
264 + andl $REQUIRED_MASK2,%edx
265 + xorl $REQUIRED_MASK2,%edx
266 + jnz no_longmode
267 sse_test:
268 movl $1,%eax
269 cpuid
270 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/defconfig linux-2.6.3-amd64/arch/x86_64/defconfig
271 --- linux-vanilla/arch/x86_64/defconfig 2004-02-19 23:57:10.000000000 +0100
272 +++ linux-2.6.3-amd64/arch/x86_64/defconfig 2004-02-19 23:28:10.000000000 +0100
273 @@ -51,14 +51,17 @@ CONFIG_OBSOLETE_MODPARM=y
274 #
275 # Processor type and features
276 #
277 -CONFIG_MK8=y
278 -# CONFIG_GENERIC_CPU is not set
279 -CONFIG_X86_L1_CACHE_BYTES=64
280 -CONFIG_X86_L1_CACHE_SHIFT=6
281 +# CONFIG_MK8 is not set
282 +# CONFIG_MPSC is not set
283 +CONFIG_GENERIC_CPU=y
284 +CONFIG_X86_L1_CACHE_BYTES=128
285 +CONFIG_X86_L1_CACHE_SHIFT=7
286 CONFIG_X86_TSC=y
287 CONFIG_X86_GOOD_APIC=y
288 +# CONFIG_MICROCODE is not set
289 CONFIG_X86_MSR=y
290 CONFIG_X86_CPUID=y
291 +CONFIG_X86_HT=y
292 CONFIG_X86_IO_APIC=y
293 CONFIG_X86_LOCAL_APIC=y
294 CONFIG_MTRR=y
295 @@ -70,6 +73,7 @@ CONFIG_NUMA=y
296 CONFIG_HAVE_DEC_LOCK=y
297 CONFIG_NR_CPUS=8
298 CONFIG_GART_IOMMU=y
299 +CONFIG_SWIOTLB=y
300 CONFIG_X86_MCE=y
301
302 #
303 @@ -77,6 +81,7 @@ CONFIG_X86_MCE=y
304 #
305 CONFIG_PM=y
306 CONFIG_SOFTWARE_SUSPEND=y
307 +# CONFIG_PM_DISK is not set
308
309 #
310 # ACPI (Advanced Configuration and Power Interface) Support
311 @@ -112,7 +117,6 @@ CONFIG_ACPI_SYSTEM=y
312 #
313 CONFIG_PCI=y
314 CONFIG_PCI_DIRECT=y
315 -# CONFIG_PCI_USE_VECTOR is not set
316 # CONFIG_PCI_LEGACY_PROC is not set
317 # CONFIG_PCI_NAMES is not set
318 # CONFIG_HOTPLUG is not set
319 @@ -128,6 +132,10 @@ CONFIG_COMPAT=y
320 CONFIG_UID16=y
321
322 #
323 +# Device Drivers
324 +#
325 +
326 +#
327 # Generic Driver Options
328 #
329
330 @@ -142,6 +150,10 @@ CONFIG_UID16=y
331 # CONFIG_PARPORT is not set
332
333 #
334 +# Plug and Play support
335 +#
336 +
337 +#
338 # Block devices
339 #
340 CONFIG_BLK_DEV_FD=y
341 @@ -180,6 +192,7 @@ CONFIG_BLK_DEV_IDECD=y
342 #
343 # IDE chipset support/bugfixes
344 #
345 +CONFIG_IDE_GENERIC=y
346 # CONFIG_BLK_DEV_CMD640 is not set
347 CONFIG_BLK_DEV_IDEPCI=y
348 # CONFIG_IDEPCI_SHARE_IRQ is not set
349 @@ -203,7 +216,7 @@ CONFIG_BLK_DEV_AMD74XX=y
350 # CONFIG_BLK_DEV_HPT34X is not set
351 # CONFIG_BLK_DEV_HPT366 is not set
352 # CONFIG_BLK_DEV_SC1200 is not set
353 -# CONFIG_BLK_DEV_PIIX is not set
354 +CONFIG_BLK_DEV_PIIX=y
355 # CONFIG_BLK_DEV_NS87415 is not set
356 # CONFIG_BLK_DEV_PDC202XX_OLD is not set
357 # CONFIG_BLK_DEV_PDC202XX_NEW is not set
358 @@ -267,6 +280,13 @@ CONFIG_SCSI_IPS=m
359 # CONFIG_SCSI_QLOGIC_ISP is not set
360 # CONFIG_SCSI_QLOGIC_FC is not set
361 # CONFIG_SCSI_QLOGIC_1280 is not set
362 +CONFIG_SCSI_QLA2XXX=y
363 +# CONFIG_SCSI_QLA21XX is not set
364 +# CONFIG_SCSI_QLA22XX is not set
365 +# CONFIG_SCSI_QLA2300 is not set
366 +# CONFIG_SCSI_QLA2322 is not set
367 +# CONFIG_SCSI_QLA6312 is not set
368 +# CONFIG_SCSI_QLA6322 is not set
369 # CONFIG_SCSI_DC395x is not set
370 # CONFIG_SCSI_DC390T is not set
371 # CONFIG_SCSI_DEBUG is not set
372 @@ -277,11 +297,6 @@ CONFIG_SCSI_IPS=m
373 # CONFIG_MD is not set
374
375 #
376 -# Telephony Support
377 -#
378 -# CONFIG_PHONE is not set
379 -
380 -#
381 # Fusion MPT device support
382 #
383 CONFIG_FUSION=y
384 @@ -296,6 +311,14 @@ CONFIG_FUSION_MAX_SGE=40
385 # CONFIG_IEEE1394 is not set
386
387 #
388 +# I2O device support
389 +#
390 +
391 +#
392 +# Macintosh device drivers
393 +#
394 +
395 +#
396 # Networking support
397 #
398 CONFIG_NET=y
399 @@ -388,6 +411,7 @@ CONFIG_NET_PCI=y
400 CONFIG_AMD8111_ETH=y
401 # CONFIG_ADAPTEC_STARFIRE is not set
402 # CONFIG_B44 is not set
403 +CONFIG_FORCEDETH=y
404 # CONFIG_DGRS is not set
405 # CONFIG_EEPRO100 is not set
406 # CONFIG_E100 is not set
407 @@ -400,6 +424,7 @@ CONFIG_8139TOO=m
408 # CONFIG_8139TOO_TUNE_TWISTER is not set
409 # CONFIG_8139TOO_8129 is not set
410 # CONFIG_8139_OLD_RX_RESET is not set
411 +CONFIG_8139_RXBUF_IDX=2
412 # CONFIG_SIS900 is not set
413 # CONFIG_EPIC100 is not set
414 # CONFIG_SUNDANCE is not set
415 @@ -467,6 +492,11 @@ CONFIG_TIGON3=y
416 # CONFIG_ISDN_BOOL is not set
417
418 #
419 +# Telephony Support
420 +#
421 +# CONFIG_PHONE is not set
422 +
423 +#
424 # Input device support
425 #
426 CONFIG_INPUT=y
427 @@ -535,24 +565,6 @@ CONFIG_UNIX98_PTYS=y
428 CONFIG_UNIX98_PTY_COUNT=256
429
430 #
431 -# I2C support
432 -#
433 -# CONFIG_I2C is not set
434 -
435 -#
436 -# I2C Algorithms
437 -#
438 -
439 -#
440 -# I2C Hardware Bus support
441 -#
442 -
443 -#
444 -# I2C Hardware Sensors Chip support
445 -#
446 -# CONFIG_I2C_SENSOR is not set
447 -
448 -#
449 # Mice
450 #
451 # CONFIG_BUSMOUSE is not set
452 @@ -579,6 +591,7 @@ CONFIG_RTC=y
453 #
454 CONFIG_AGP=y
455 CONFIG_AGP_AMD64=y
456 +CONFIG_AGP_INTEL=y
457 # CONFIG_DRM is not set
458 # CONFIG_MWAVE is not set
459 CONFIG_RAW_DRIVER=y
460 @@ -586,8 +599,9 @@ CONFIG_MAX_RAW_DEVS=256
461 CONFIG_HANGCHECK_TIMER=y
462
463 #
464 -# Misc devices
465 +# I2C support
466 #
467 +# CONFIG_I2C is not set
468
469 #
470 # Multimedia devices
471 @@ -600,6 +614,65 @@ CONFIG_HANGCHECK_TIMER=y
472 # CONFIG_DVB is not set
473
474 #
475 +# Graphics support
476 +#
477 +# CONFIG_FB is not set
478 +# CONFIG_VIDEO_SELECT is not set
479 +
480 +#
481 +# Console display driver support
482 +#
483 +CONFIG_VGA_CONSOLE=y
484 +# CONFIG_MDA_CONSOLE is not set
485 +CONFIG_DUMMY_CONSOLE=y
486 +
487 +#
488 +# Sound
489 +#
490 +CONFIG_SOUND=y
491 +
492 +#
493 +# Advanced Linux Sound Architecture
494 +#
495 +# CONFIG_SND is not set
496 +
497 +#
498 +# Open Sound System
499 +#
500 +CONFIG_SOUND_PRIME=y
501 +# CONFIG_SOUND_BT878 is not set
502 +# CONFIG_SOUND_CMPCI is not set
503 +# CONFIG_SOUND_EMU10K1 is not set
504 +# CONFIG_SOUND_FUSION is not set
505 +# CONFIG_SOUND_CS4281 is not set
506 +# CONFIG_SOUND_ES1370 is not set
507 +# CONFIG_SOUND_ES1371 is not set
508 +# CONFIG_SOUND_ESSSOLO1 is not set
509 +# CONFIG_SOUND_MAESTRO is not set
510 +# CONFIG_SOUND_MAESTRO3 is not set
511 +CONFIG_SOUND_ICH=y
512 +# CONFIG_SOUND_SONICVIBES is not set
513 +# CONFIG_SOUND_TRIDENT is not set
514 +# CONFIG_SOUND_MSNDCLAS is not set
515 +# CONFIG_SOUND_MSNDPIN is not set
516 +# CONFIG_SOUND_VIA82CXXX is not set
517 +# CONFIG_SOUND_OSS is not set
518 +# CONFIG_SOUND_ALI5455 is not set
519 +# CONFIG_SOUND_FORTE is not set
520 +# CONFIG_SOUND_RME96XX is not set
521 +# CONFIG_SOUND_AD1980 is not set
522 +
523 +#
524 +# USB support
525 +#
526 +# CONFIG_USB is not set
527 +
528 +#
529 +# USB Gadget Support
530 +#
531 +# CONFIG_USB_GADGET is not set
532 +
533 +#
534 # File systems
535 #
536 CONFIG_EXT2_FS=y
537 @@ -648,8 +721,8 @@ CONFIG_PROC_KCORE=y
538 CONFIG_DEVPTS_FS=y
539 # CONFIG_DEVPTS_FS_XATTR is not set
540 CONFIG_TMPFS=y
541 -# CONFIG_HUGETLBFS is not set
542 -# CONFIG_HUGETLB_PAGE is not set
543 +CONFIG_HUGETLBFS=y
544 +CONFIG_HUGETLB_PAGE=y
545 CONFIG_RAMFS=y
546
547 #
548 @@ -703,61 +776,6 @@ CONFIG_MSDOS_PARTITION=y
549 # CONFIG_NLS is not set
550
551 #
552 -# Graphics support
553 -#
554 -# CONFIG_FB is not set
555 -# CONFIG_VIDEO_SELECT is not set
556 -
557 -#
558 -# Console display driver support
559 -#
560 -CONFIG_VGA_CONSOLE=y
561 -# CONFIG_MDA_CONSOLE is not set
562 -CONFIG_DUMMY_CONSOLE=y
563 -
564 -#
565 -# Sound
566 -#
567 -CONFIG_SOUND=y
568 -
569 -#
570 -# Advanced Linux Sound Architecture
571 -#
572 -# CONFIG_SND is not set
573 -
574 -#
575 -# Open Sound System
576 -#
577 -CONFIG_SOUND_PRIME=y
578 -# CONFIG_SOUND_BT878 is not set
579 -# CONFIG_SOUND_CMPCI is not set
580 -# CONFIG_SOUND_EMU10K1 is not set
581 -# CONFIG_SOUND_FUSION is not set
582 -# CONFIG_SOUND_CS4281 is not set
583 -# CONFIG_SOUND_ES1370 is not set
584 -# CONFIG_SOUND_ES1371 is not set
585 -# CONFIG_SOUND_ESSSOLO1 is not set
586 -# CONFIG_SOUND_MAESTRO is not set
587 -# CONFIG_SOUND_MAESTRO3 is not set
588 -CONFIG_SOUND_ICH=y
589 -# CONFIG_SOUND_SONICVIBES is not set
590 -# CONFIG_SOUND_TRIDENT is not set
591 -# CONFIG_SOUND_MSNDCLAS is not set
592 -# CONFIG_SOUND_MSNDPIN is not set
593 -# CONFIG_SOUND_VIA82CXXX is not set
594 -# CONFIG_SOUND_OSS is not set
595 -# CONFIG_SOUND_ALI5455 is not set
596 -# CONFIG_SOUND_FORTE is not set
597 -# CONFIG_SOUND_RME96XX is not set
598 -# CONFIG_SOUND_AD1980 is not set
599 -
600 -#
601 -# USB support
602 -#
603 -# CONFIG_USB is not set
604 -# CONFIG_USB_GADGET is not set
605 -
606 -#
607 # Profiling support
608 #
609 CONFIG_PROFILING=y
610 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/ia32/ia32_binfmt.c linux-2.6.3-amd64/arch/x86_64/ia32/ia32_binfmt.c
611 --- linux-vanilla/arch/x86_64/ia32/ia32_binfmt.c 2004-02-05 08:10:24.000000000 +0100
612 +++ linux-2.6.3-amd64/arch/x86_64/ia32/ia32_binfmt.c 2004-02-19 23:28:10.000000000 +0100
613 @@ -408,3 +408,26 @@ elf32_map (struct file *filep, unsigned
614 return(map_addr);
615 }
616
617 +#ifdef CONFIG_SYSCTL
618 +/* Register vsyscall32 into the ABI table */
619 +#include <linux/sysctl.h>
620 +
621 +static ctl_table abi_table2[] = {
622 + { 99, "vsyscall32", &sysctl_vsyscall32, sizeof(int), 0644, NULL,
623 + proc_dointvec },
624 + { 0, }
625 +};
626 +
627 +static ctl_table abi_root_table2[] = {
628 + { .ctl_name = CTL_ABI, .procname = "abi", .mode = 0555,
629 + .child = abi_table2 },
630 + { 0 },
631 +};
632 +
633 +static __init int ia32_binfmt_init(void)
634 +{
635 + register_sysctl_table(abi_root_table2, 1);
636 + return 0;
637 +}
638 +__initcall(ia32_binfmt_init);
639 +#endif
640 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/Makefile linux-2.6.3-amd64/arch/x86_64/kernel/Makefile
641 --- linux-vanilla/arch/x86_64/kernel/Makefile 2004-01-09 09:26:38.000000000 +0100
642 +++ linux-2.6.3-amd64/arch/x86_64/kernel/Makefile 2004-02-19 23:28:10.000000000 +0100
643 @@ -7,11 +7,13 @@ EXTRA_AFLAGS := -traditional
644 obj-y := process.o semaphore.o signal.o entry.o traps.o irq.o \
645 ptrace.o i8259.o ioport.o ldt.o setup.o time.o sys_x86_64.o \
646 x8664_ksyms.o i387.o syscall.o vsyscall.o \
647 - setup64.o bluesmoke.o bootflag.o e820.o reboot.o warmreboot.o
648 + setup64.o bootflag.o e820.o reboot.o warmreboot.o
649 +obj-y += mce.o
650
651 obj-$(CONFIG_MTRR) += ../../i386/kernel/cpu/mtrr/
652 obj-$(CONFIG_ACPI) += acpi/
653 obj-$(CONFIG_X86_MSR) += msr.o
654 +obj-$(CONFIG_MICROCODE) += microcode.o
655 obj-$(CONFIG_X86_CPUID) += cpuid.o
656 obj-$(CONFIG_SMP) += smp.o smpboot.o trampoline.o
657 obj-$(CONFIG_X86_LOCAL_APIC) += apic.o nmi.o
658 @@ -22,6 +24,7 @@ obj-$(CONFIG_CPU_FREQ) += cpufreq/
659 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
660 obj-$(CONFIG_GART_IOMMU) += pci-gart.o aperture.o
661 obj-$(CONFIG_DUMMY_IOMMU) += pci-nommu.o pci-dma.o
662 +obj-$(CONFIG_SWIOTLB) += swiotlb.o
663
664 obj-$(CONFIG_MODULES) += module.o
665
666 @@ -30,4 +33,5 @@ obj-y += topology.o
667 bootflag-y += ../../i386/kernel/bootflag.o
668 cpuid-$(subst m,y,$(CONFIG_X86_CPUID)) += ../../i386/kernel/cpuid.o
669 topology-y += ../../i386/mach-default/topology.o
670 -
671 +swiotlb-$(CONFIG_SWIOTLB) += ../../ia64/lib/swiotlb.o
672 +microcode-$(subst m,y,$(CONFIG_X86_CPUID)) += ../../i386/kernel/microcode.o
673 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/aperture.c linux-2.6.3-amd64/arch/x86_64/kernel/aperture.c
674 --- linux-vanilla/arch/x86_64/kernel/aperture.c 2004-02-19 23:57:11.000000000 +0100
675 +++ linux-2.6.3-amd64/arch/x86_64/kernel/aperture.c 2004-02-19 23:28:10.000000000 +0100
676 @@ -24,6 +24,8 @@
677 #include <asm/proto.h>
678 #include <asm/pci-direct.h>
679
680 +int iommu_aperture;
681 +
682 int fallback_aper_order __initdata = 1; /* 64MB */
683 int fallback_aper_force __initdata = 0;
684
685 @@ -206,6 +208,8 @@ void __init iommu_hole_init(void)
686 if (read_pci_config(0, num, 3, 0x00) != NB_ID_3)
687 continue;
688
689 + iommu_aperture = 1;
690 +
691 aper_order = (read_pci_config(0, num, 3, 0x90) >> 1) & 7;
692 aper_size = (32 * 1024 * 1024) << aper_order;
693 aper_base = read_pci_config(0, num, 3, 0x94) & 0x7fff;
694 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/apic.c linux-2.6.3-amd64/arch/x86_64/kernel/apic.c
695 --- linux-vanilla/arch/x86_64/kernel/apic.c 2004-01-09 09:26:38.000000000 +0100
696 +++ linux-2.6.3-amd64/arch/x86_64/kernel/apic.c 2004-02-19 23:28:10.000000000 +0100
697 @@ -646,11 +646,13 @@ void __init init_apic_mappings(void)
698
699 void __setup_APIC_LVTT(unsigned int clocks)
700 {
701 - unsigned int lvtt1_value, tmp_value;
702 + unsigned int lvtt_value, tmp_value, ver;
703
704 - lvtt1_value = SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV) |
705 - APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR;
706 - apic_write_around(APIC_LVTT, lvtt1_value);
707 + ver = GET_APIC_VERSION(apic_read(APIC_LVR));
708 + lvtt_value = APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR;
709 + if (!APIC_INTEGRATED(ver))
710 + lvtt_value |= SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV);
711 + apic_write_around(APIC_LVTT, lvtt_value);
712
713 /*
714 * Divide PICLK by 16
715 @@ -994,8 +996,6 @@ int __init APIC_init_uniprocessor (void)
716
717 setup_local_APIC();
718
719 - if (nmi_watchdog == NMI_LOCAL_APIC)
720 - check_nmi_watchdog();
721 #ifdef CONFIG_X86_IO_APIC
722 if (smp_found_config && !skip_ioapic_setup && nr_ioapics)
723 setup_IO_APIC();
724 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/bluesmoke.c linux-2.6.3-amd64/arch/x86_64/kernel/bluesmoke.c
725 --- linux-vanilla/arch/x86_64/kernel/bluesmoke.c 2004-01-09 09:26:38.000000000 +0100
726 +++ linux-2.6.3-amd64/arch/x86_64/kernel/bluesmoke.c 1970-01-01 01:00:00.000000000 +0100
727 @@ -1,473 +0,0 @@
728 -/*
729 - * Machine check handler.
730 - * K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
731 - * Rest from unknown author(s).
732 - */
733 -#include <linux/config.h>
734 -#include <linux/init.h>
735 -#include <linux/types.h>
736 -#include <linux/kernel.h>
737 -#include <linux/sched.h>
738 -#include <linux/string.h>
739 -#include <linux/ctype.h>
740 -#include <asm/processor.h>
741 -#include <asm/msr.h>
742 -#include <asm/kdebug.h>
743 -#include <linux/pci.h>
744 -#include <linux/timer.h>
745 -
746 -static int mce_disabled __initdata;
747 -static unsigned long mce_cpus;
748 -
749 -/*
750 - * Machine Check Handler For PII/PIII/K7
751 - */
752 -
753 -static int banks;
754 -static unsigned long ignored_banks, disabled_banks;
755 -
756 -static void generic_machine_check(struct pt_regs * regs, long error_code)
757 -{
758 - int recover=1;
759 - u32 alow, ahigh, high, low;
760 - u32 mcgstl, mcgsth;
761 - int i;
762 -
763 - preempt_disable();
764 -
765 - rdmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
766 - if(mcgstl&(1<<0)) /* Recoverable ? */
767 - recover=0;
768 -
769 - printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n", smp_processor_id(), mcgsth, mcgstl);
770 -
771 - if (regs && (mcgstl & 2))
772 - printk(KERN_EMERG "RIP <%02lx>:%016lx RSP %016lx\n",
773 - regs->cs, regs->rip, regs->rsp);
774 -
775 - for(i=0;i<banks;i++)
776 - {
777 - if ((1UL<<i) & ignored_banks)
778 - continue;
779 -
780 - rdmsr(MSR_IA32_MC0_STATUS+i*4,low, high);
781 - if(high&(1<<31))
782 - {
783 - if(high&(1<<29))
784 - recover|=1;
785 - if(high&(1<<25))
786 - recover|=2;
787 - printk(KERN_EMERG "Bank %d: %08x%08x", i, high, low);
788 - high&=~(1<<31);
789 - if(high&(1<<27))
790 - {
791 - rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
792 - printk("[%08x%08x]", alow, ahigh);
793 - }
794 - if(high&(1<<26))
795 - {
796 - rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
797 - printk(" at %08x%08x",
798 - ahigh, alow);
799 - }
800 - printk("\n");
801 - /* Clear it */
802 - wrmsr(MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL);
803 - /* Serialize */
804 - wmb();
805 - }
806 - }
807 -
808 - if(recover&2)
809 - panic("CPU context corrupt");
810 - if(recover&1)
811 - panic("Unable to continue");
812 - printk(KERN_EMERG "Attempting to continue.\n");
813 - mcgstl&=~(1<<2);
814 - wrmsr(MSR_IA32_MCG_STATUS,mcgstl, mcgsth);
815 -
816 - preempt_enable();
817 -}
818 -
819 -static void unexpected_machine_check(struct pt_regs *regs, long error_code)
820 -{
821 - printk("unexpected machine check %lx\n", error_code);
822 -}
823 -
824 -/*
825 - * Call the installed machine check handler for this CPU setup.
826 - */
827 -
828 -static void (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_machine_check;
829 -
830 -void do_machine_check(struct pt_regs * regs, long error_code)
831 -{
832 - notify_die(DIE_NMI, "machine check", regs, error_code, 255, SIGKILL);
833 - machine_check_vector(regs, error_code);
834 -}
835 -
836 -/*
837 - * K8 machine check.
838 - */
839 -
840 -static struct pci_dev *find_k8_nb(void)
841 -{
842 - struct pci_dev *dev = NULL;
843 - int cpu = smp_processor_id();
844 - while ((dev = pci_find_device(PCI_VENDOR_ID_AMD, 0x1103, dev)) != NULL) {
845 - if (dev->bus->number==0 && PCI_SLOT(dev->devfn) == (24U+cpu))
846 - return dev;
847 - }
848 - return NULL;
849 -}
850 -
851 -/* When we have kallsyms we can afford kmcedecode too. */
852 -
853 -static char *transaction[] = {
854 - "instruction", "data", "generic", "reserved"
855 -};
856 -static char *cachelevel[] = {
857 - "level 0", "level 1", "level 2", "level generic"
858 -};
859 -static char *memtrans[] = {
860 - "generic error", "generic read", "generic write", "data read",
861 - "data write", "instruction fetch", "prefetch", "snoop",
862 - "?", "?", "?", "?", "?", "?", "?"
863 -};
864 -static char *partproc[] = {
865 - "local node origin", "local node response",
866 - "local node observed", "generic"
867 -};
868 -static char *timeout[] = {
869 - "request didn't time out",
870 - "request timed out"
871 -};
872 -static char *memoryio[] = {
873 - "memory access", "res.", "i/o access", "generic"
874 -};
875 -static char *extendederr[] = {
876 - "ecc error",
877 - "crc error",
878 - "sync error",
879 - "mst abort",
880 - "tgt abort",
881 - "gart error",
882 - "rmw error",
883 - "wdog error",
884 - "chipkill ecc error",
885 - "<9>","<10>","<11>","<12>",
886 - "<13>","<14>","<15>"
887 -};
888 -static char *highbits[32] = {
889 - [31] = "previous error lost",
890 - [30] = "error overflow",
891 - [29] = "error uncorrected",
892 - [28] = "error enable",
893 - [27] = "misc error valid",
894 - [26] = "error address valid",
895 - [25] = "processor context corrupt",
896 - [24] = "res24",
897 - [23] = "res23",
898 - /* 22-15 ecc syndrome bits */
899 - [14] = "corrected ecc error",
900 - [13] = "uncorrected ecc error",
901 - [12] = "res12",
902 - [11] = "res11",
903 - [10] = "res10",
904 - [9] = "res9",
905 - [8] = "dram scrub error",
906 - [7] = "res7",
907 - /* 6-4 ht link number of error */
908 - [3] = "res3",
909 - [2] = "res2",
910 - [1] = "err cpu0",
911 - [0] = "err cpu1",
912 -};
913 -
914 -static void check_k8_nb(int header)
915 -{
916 - struct pci_dev *nb;
917 - u32 statuslow, statushigh;
918 - unsigned short errcode;
919 - int i;
920 -
921 - nb = find_k8_nb();
922 - if (nb == NULL)
923 - return;
924 -
925 - pci_read_config_dword(nb, 0x48, &statuslow);
926 - pci_read_config_dword(nb, 0x4c, &statushigh);
927 - if (!(statushigh & (1<<31)))
928 - return;
929 - if (header)
930 - printk(KERN_ERR "CPU %d: Silent Northbridge MCE\n", smp_processor_id());
931 -
932 - printk(KERN_ERR "Northbridge status %08x%08x\n",
933 - statushigh,statuslow);
934 -
935 - printk(KERN_ERR " Error %s\n", extendederr[(statuslow >> 16) & 0xf]);
936 -
937 - errcode = statuslow & 0xffff;
938 - switch ((statuslow >> 16) & 0xF) {
939 - case 5:
940 - printk(KERN_ERR " GART TLB error %s %s\n",
941 - transaction[(errcode >> 2) & 3],
942 - cachelevel[errcode & 3]);
943 - break;
944 - case 8:
945 - printk(KERN_ERR " ECC error syndrome %x\n",
946 - (((statuslow >> 24) & 0xff) << 8) | ((statushigh >> 15) & 0x7f));
947 - /*FALL THROUGH*/
948 - default:
949 - printk(KERN_ERR " bus error %s, %s\n %s\n %s, %s\n",
950 - partproc[(errcode >> 9) & 0x3],
951 - timeout[(errcode >> 8) & 1],
952 - memtrans[(errcode >> 4) & 0xf],
953 - memoryio[(errcode >> 2) & 0x3],
954 - cachelevel[(errcode & 0x3)]);
955 - /* should only print when it was a HyperTransport related error. */
956 - printk(KERN_ERR " link number %x\n", (statushigh >> 4) & 3);
957 - break;
958 - }
959 -
960 - for (i = 0; i < 32; i++) {
961 - if (i == 26 || i == 28)
962 - continue;
963 - if (highbits[i] && (statushigh & (1<<i)))
964 - printk(KERN_ERR " %s\n", highbits[i]);
965 - }
966 - if (statushigh & (1<<26)) {
967 - u32 addrhigh, addrlow;
968 - pci_read_config_dword(nb, 0x54, &addrhigh);
969 - pci_read_config_dword(nb, 0x50, &addrlow);
970 - printk(KERN_ERR " NB error address %08x%08x\n", addrhigh,addrlow);
971 - }
972 - statushigh &= ~(1<<31);
973 - pci_write_config_dword(nb, 0x4c, statushigh);
974 -}
975 -
976 -static void k8_machine_check(struct pt_regs * regs, long error_code)
977 -{
978 - u64 status, nbstatus;
979 -
980 - preempt_disable();
981 -
982 - rdmsrl(MSR_IA32_MCG_STATUS, status);
983 - if ((status & (1<<2)) == 0) {
984 - if (!regs)
985 - check_k8_nb(1);
986 - return;
987 - }
988 -
989 - printk(KERN_EMERG "CPU %d: Machine Check Exception: %016Lx\n", smp_processor_id(), status);
990 -
991 - if (status & 1)
992 - printk(KERN_EMERG "MCG_STATUS: unrecoverable\n");
993 -
994 - rdmsrl(MSR_IA32_MC0_STATUS+4*4, nbstatus);
995 - if ((nbstatus & (1UL<<63)) == 0)
996 - goto others;
997 -
998 - printk(KERN_EMERG "Northbridge Machine Check %s %016lx %lx\n",
999 - regs ? "exception" : "timer",
1000 - (unsigned long)nbstatus, error_code);
1001 - if (nbstatus & (1UL<<62))
1002 - printk(KERN_EMERG "Lost at least one NB error condition\n");
1003 - if (nbstatus & (1UL<<61))
1004 - printk(KERN_EMERG "Uncorrectable condition\n");
1005 - if (nbstatus & (1UL<57))
1006 - printk(KERN_EMERG "Unrecoverable condition\n");
1007 -
1008 - check_k8_nb(0);
1009 -
1010 - if (nbstatus & (1UL<<58)) {
1011 - u64 adr;
1012 - rdmsrl(MSR_IA32_MC0_ADDR+4*4, adr);
1013 - printk(KERN_EMERG "Address: %016lx\n", (unsigned long)adr);
1014 - }
1015 -
1016 - wrmsrl(MSR_IA32_MC0_STATUS+4*4, 0);
1017 - wrmsrl(MSR_IA32_MCG_STATUS, 0);
1018 -
1019 - others:
1020 - generic_machine_check(regs, error_code);
1021 -
1022 - preempt_enable();
1023 -}
1024 -
1025 -static struct timer_list mcheck_timer;
1026 -int mcheck_interval = 30*HZ;
1027 -
1028 -#ifndef CONFIG_SMP
1029 -static void mcheck_timer_handler(unsigned long data)
1030 -{
1031 - k8_machine_check(NULL,0);
1032 - mcheck_timer.expires = jiffies + mcheck_interval;
1033 - add_timer(&mcheck_timer);
1034 -}
1035 -#else
1036 -
1037 -/* SMP needs a process context trampoline because smp_call_function cannot be
1038 - called from interrupt context. */
1039 -
1040 -static void mcheck_timer_other(void *data)
1041 -{
1042 - k8_machine_check(NULL, 0);
1043 -}
1044 -
1045 -static void mcheck_timer_dist(void *data)
1046 -{
1047 - smp_call_function(mcheck_timer_other,0,0,0);
1048 - k8_machine_check(NULL, 0);
1049 - mcheck_timer.expires = jiffies + mcheck_interval;
1050 - add_timer(&mcheck_timer);
1051 -}
1052 -
1053 -static void mcheck_timer_handler(unsigned long data)
1054 -{
1055 - static DECLARE_WORK(mcheck_work, mcheck_timer_dist, NULL);
1056 - schedule_work(&mcheck_work);
1057 -}
1058 -#endif
1059 -
1060 -static int nok8 __initdata;
1061 -
1062 -static void __init k8_mcheck_init(struct cpuinfo_x86 *c)
1063 -{
1064 - u64 cap;
1065 - int i;
1066 -
1067 - if (!test_bit(X86_FEATURE_MCE, &c->x86_capability) ||
1068 - !test_bit(X86_FEATURE_MCA, &c->x86_capability))
1069 - return;
1070 -
1071 - rdmsrl(MSR_IA32_MCG_CAP, cap);
1072 - banks = cap&0xff;
1073 - machine_check_vector = k8_machine_check;
1074 - for (i = 0; i < banks; i++) {
1075 - u64 val = ((1UL<<i) & disabled_banks) ? 0 : ~0UL;
1076 - wrmsrl(MSR_IA32_MC0_CTL+4*i, val);
1077 - wrmsrl(MSR_IA32_MC0_STATUS+4*i,0);
1078 - }
1079 -
1080 - if (cap & (1<<8))
1081 - wrmsrl(MSR_IA32_MCG_CTL, 0xffffffffffffffffULL);
1082 -
1083 - set_in_cr4(X86_CR4_MCE);
1084 -
1085 - if (mcheck_interval && (smp_processor_id() == 0)) {
1086 - init_timer(&mcheck_timer);
1087 - mcheck_timer.function = (void (*)(unsigned long))mcheck_timer_handler;
1088 - mcheck_timer.expires = jiffies + mcheck_interval;
1089 - add_timer(&mcheck_timer);
1090 - }
1091 -
1092 - printk(KERN_INFO "Machine Check Reporting enabled for CPU#%d\n", smp_processor_id());
1093 -}
1094 -
1095 -/*
1096 - * Set up machine check reporting for Intel processors
1097 - */
1098 -
1099 -static void __init generic_mcheck_init(struct cpuinfo_x86 *c)
1100 -{
1101 - u32 l, h;
1102 - int i;
1103 - static int done;
1104 -
1105 - /*
1106 - * Check for MCE support
1107 - */
1108 -
1109 - if( !test_bit(X86_FEATURE_MCE, &c->x86_capability) )
1110 - return;
1111 -
1112 - /*
1113 - * Check for PPro style MCA
1114 - */
1115 -
1116 - if( !test_bit(X86_FEATURE_MCA, &c->x86_capability) )
1117 - return;
1118 -
1119 - /* Ok machine check is available */
1120 -
1121 - machine_check_vector = generic_machine_check;
1122 - wmb();
1123 -
1124 - if(done==0)
1125 - printk(KERN_INFO "Intel machine check architecture supported.\n");
1126 - rdmsr(MSR_IA32_MCG_CAP, l, h);
1127 - if(l&(1<<8))
1128 - wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
1129 - banks = l&0xff;
1130 -
1131 - for(i=0;i<banks;i++)
1132 - {
1133 - u32 val = ((1UL<<i) & disabled_banks) ? 0 : ~0;
1134 - wrmsr(MSR_IA32_MC0_CTL+4*i, val, val);
1135 - wrmsr(MSR_IA32_MC0_STATUS+4*i, 0x0, 0x0);
1136 - }
1137 - set_in_cr4(X86_CR4_MCE);
1138 - printk(KERN_INFO "Intel machine check reporting enabled on CPU#%d.\n", smp_processor_id());
1139 - done=1;
1140 -}
1141 -
1142 -/*
1143 - * This has to be run for each processor
1144 - */
1145 -
1146 -void __init mcheck_init(struct cpuinfo_x86 *c)
1147 -{
1148 - if (test_and_set_bit(smp_processor_id(), &mce_cpus))
1149 - return;
1150 -
1151 - if(mce_disabled==1)
1152 - return;
1153 -
1154 - switch(c->x86_vendor) {
1155 - case X86_VENDOR_AMD:
1156 - if (c->x86 == 15 && !nok8) {
1157 - k8_mcheck_init(c);
1158 - break;
1159 - }
1160 - /* FALL THROUGH */
1161 - default:
1162 - case X86_VENDOR_INTEL:
1163 - generic_mcheck_init(c);
1164 - break;
1165 - }
1166 -}
1167 -
1168 -static int __init mcheck_disable(char *str)
1169 -{
1170 - mce_disabled = 1;
1171 - return 0;
1172 -}
1173 -
1174 -
1175 -/* mce=off disable machine check
1176 - mce=nok8 disable k8 specific features
1177 - mce=disable<NUMBER> disable bank NUMBER
1178 - mce=enable<NUMBER> enable bank number
1179 - mce=NUMBER mcheck timer interval number seconds.
1180 - Can be also comma separated in a single mce= */
1181 -static int __init mcheck_enable(char *str)
1182 -{
1183 - char *p;
1184 - while ((p = strsep(&str,",")) != NULL) {
1185 - if (isdigit(*p))
1186 - mcheck_interval = simple_strtol(p,NULL,0) * HZ;
1187 - else if (!strcmp(p,"off"))
1188 - mce_disabled = 1;
1189 - else if (!strncmp(p,"enable",6))
1190 - disabled_banks &= ~(1<<simple_strtol(p+6,NULL,0));
1191 - else if (!strncmp(p,"disable",7))
1192 - disabled_banks |= ~(1<<simple_strtol(p+7,NULL,0));
1193 - else if (!strcmp(p,"nok8"))
1194 - nok8 = 1;
1195 - }
1196 - return 0;
1197 -}
1198 -
1199 -__setup("nomce", mcheck_disable);
1200 -__setup("mce", mcheck_enable);
1201 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/cpufreq/Kconfig linux-2.6.3-amd64/arch/x86_64/kernel/cpufreq/Kconfig
1202 --- linux-vanilla/arch/x86_64/kernel/cpufreq/Kconfig 2003-10-25 22:57:30.000000000 +0200
1203 +++ linux-2.6.3-amd64/arch/x86_64/kernel/cpufreq/Kconfig 2004-02-19 23:28:10.000000000 +0100
1204 @@ -11,8 +11,8 @@ config CPU_FREQ
1205 fly. This is a nice method to save battery power on notebooks,
1206 because the lower the clock speed, the less power the CPU consumes.
1207
1208 - For more information, take a look at linux/Documentation/cpu-freq or
1209 - at <http://www.brodo.de/cpufreq/>
1210 + For more information, take a look at <file:Documentation/cpu-freq/>
1211 + or at <http://www.codemonkey.org.uk/projects/cpufreq/>
1212
1213 If in doubt, say N.
1214
1215 @@ -37,7 +37,7 @@ config X86_POWERNOW_K8
1216 help
1217 This adds the CPUFreq driver for mobile AMD Opteron/Athlon64 processors.
1218
1219 - For details, take a look at linux/Documentation/cpu-freq.
1220 + For details, take a look at <file:Documentation/cpu-freq/>.
1221
1222 If in doubt, say N.
1223
1224 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/head.S linux-2.6.3-amd64/arch/x86_64/kernel/head.S
1225 --- linux-vanilla/arch/x86_64/kernel/head.S 2004-01-09 09:26:38.000000000 +0100
1226 +++ linux-2.6.3-amd64/arch/x86_64/kernel/head.S 2004-02-19 23:28:10.000000000 +0100
1227 @@ -16,6 +16,7 @@
1228 #include <asm/segment.h>
1229 #include <asm/page.h>
1230 #include <asm/msr.h>
1231 +#include <asm/cache.h>
1232
1233 /* we are not able to switch in one step to the final KERNEL ADRESS SPACE
1234 * because we need identity-mapped pages on setup so define __START_KERNEL to
1235 @@ -322,7 +323,6 @@ gdt:
1236 .endr
1237 #endif
1238
1239 -.align 64 /* cacheline aligned */
1240 ENTRY(gdt_table32)
1241 .quad 0x0000000000000000 /* This one is magic */
1242 .quad 0x0000000000000000 /* unused */
1243 @@ -334,14 +334,14 @@ gdt32_end:
1244 * Also sysret mandates a special GDT layout
1245 */
1246
1247 -.align 64 /* cacheline aligned, keep this synchronized with asm/desc.h */
1248 +.align L1_CACHE_BYTES
1249
1250 /* The TLS descriptors are currently at a different place compared to i386.
1251 Hopefully nobody expects them at a fixed place (Wine?) */
1252
1253 ENTRY(cpu_gdt_table)
1254 .quad 0x0000000000000000 /* NULL descriptor */
1255 - .quad 0x00af9a000000ffff ^ (1<<21) /* __KERNEL_COMPAT32_CS */
1256 + .quad 0x008f9a000000ffff /* __KERNEL_COMPAT32_CS */
1257 .quad 0x00af9a000000ffff /* __KERNEL_CS */
1258 .quad 0x00cf92000000ffff /* __KERNEL_DS */
1259 .quad 0x00cffe000000ffff /* __USER32_CS */
1260 @@ -354,18 +354,13 @@ ENTRY(cpu_gdt_table)
1261 .quad 0 /* unused now */
1262 .quad 0x00009a000000ffff /* __KERNEL16_CS - 16bit PM for S3 wakeup. */
1263 /* base must be patched for real base address. */
1264 - /* This should be a multiple of the cache line size */
1265 gdt_end:
1266 - .globl gdt_end
1267 -
1268 - /* GDTs of other CPUs */
1269 -#ifdef CONFIG_SMP
1270 - .rept NR_CPUS-1
1271 - .quad 0,0,0,0,0,0,0,0,0,0,0
1272 - .endr
1273 -#endif
1274 + /* asm/segment.h:GDT_ENTRIES must match this */
1275 + /* This should be a multiple of the cache line size */
1276 + /* GDTs of other CPUs: */
1277 + .fill (GDT_SIZE * NR_CPUS) - (gdt_end - cpu_gdt_table)
1278
1279 - .align 64
1280 + .align L1_CACHE_BYTES
1281 ENTRY(idt_table)
1282 .rept 256
1283 .quad 0
1284 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/io_apic.c linux-2.6.3-amd64/arch/x86_64/kernel/io_apic.c
1285 --- linux-vanilla/arch/x86_64/kernel/io_apic.c 2004-02-05 08:10:24.000000000 +0100
1286 +++ linux-2.6.3-amd64/arch/x86_64/kernel/io_apic.c 2004-02-19 23:28:10.000000000 +0100
1287 @@ -245,7 +245,7 @@ void __init check_ioapic(void)
1288 PCI_VENDOR_ID);
1289 vendor &= 0xffff;
1290 switch (vendor) {
1291 - case PCI_VENDOR_ID_NVIDIA:
1292 +// case PCI_VENDOR_ID_NVIDIA:
1293 case PCI_VENDOR_ID_VIA:
1294 printk(KERN_INFO
1295 "PCI bridge %02x:%02x from %x found. Setting \"noapic\". Overwrite with \"apic\"\n",
1296 @@ -1759,23 +1759,6 @@ void __init setup_IO_APIC(void)
1297 print_IO_APIC();
1298 }
1299
1300 -/* Ensure the ACPI SCI interrupt level is active low, edge-triggered */
1301 -
1302 -void __init mp_config_ioapic_for_sci(int irq)
1303 -{
1304 -#if 0 /* fixme */
1305 - int ioapic;
1306 - int ioapic_pin;
1307 -
1308 - ioapic = mp_find_ioapic(irq);
1309 -
1310 - ioapic_pin = irq - mp_ioapic_routing[ioapic].irq_start;
1311 -
1312 - io_apic_set_pci_routing(ioapic, ioapic_pin, irq);
1313 -#endif
1314 -}
1315 -
1316 -
1317 /* --------------------------------------------------------------------------
1318 ACPI-based IOAPIC Configuration
1319 -------------------------------------------------------------------------- */
1320 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/mce.c linux-2.6.3-amd64/arch/x86_64/kernel/mce.c
1321 --- linux-vanilla/arch/x86_64/kernel/mce.c 1970-01-01 01:00:00.000000000 +0100
1322 +++ linux-2.6.3-amd64/arch/x86_64/kernel/mce.c 2004-02-19 23:28:10.000000000 +0100
1323 @@ -0,0 +1,463 @@
1324 +/*
1325 + * Machine check handler.
1326 + * K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
1327 + * Rest from unknown author(s).
1328 + * 2004 Andi Kleen. Rewrote most of it.
1329 + */
1330 +
1331 +#include <linux/init.h>
1332 +#include <linux/types.h>
1333 +#include <linux/kernel.h>
1334 +#include <linux/sched.h>
1335 +#include <linux/string.h>
1336 +#include <linux/rcupdate.h>
1337 +#include <linux/kallsyms.h>
1338 +#include <linux/sysdev.h>
1339 +#include <linux/miscdevice.h>
1340 +#include <linux/fs.h>
1341 +#include <asm/processor.h>
1342 +#include <asm/msr.h>
1343 +#include <asm/mce.h>
1344 +#include <asm/kdebug.h>
1345 +#include <asm/uaccess.h>
1346 +
1347 +#define MISC_MCELOG_MINOR 227
1348 +
1349 +static int mce_disabled __initdata;
1350 +/* 0: always panic, 1: panic if deadlock possible, 2: try to avoid panic */
1351 +static int tolerant = 2;
1352 +static int banks;
1353 +static unsigned long disabled_banks;
1354 +
1355 +/*
1356 + * Lockless MCE logging infrastructure.
1357 + * This avoids deadlocks on printk locks without having to break locks. Also
1358 + * separate MCEs from kernel messages to avoid bogus bug reports.
1359 + */
1360 +
1361 +struct mce_log mcelog = {
1362 + MCE_LOG_SIGNATURE,
1363 + MCE_LOG_LEN,
1364 +};
1365 +
1366 +static void mce_log(struct mce *mce)
1367 +{
1368 + unsigned next, entry;
1369 + mce->finished = 0;
1370 + smp_wmb();
1371 + for (;;) {
1372 + entry = mcelog.next;
1373 + read_barrier_depends();
1374 + /* When the buffer fills up discard new entries. Assume
1375 + that the earlier errors are the more interesting. */
1376 + if (entry >= MCE_LOG_LEN) {
1377 + set_bit(MCE_OVERFLOW, &mcelog.flags);
1378 + return;
1379 + }
1380 + /* Old left over entry. Skip. */
1381 + if (mcelog.entry[entry].finished)
1382 + continue;
1383 + smp_rmb();
1384 + next = entry + 1;
1385 + if (cmpxchg(&mcelog.next, entry, next) == entry)
1386 + break;
1387 + }
1388 + memcpy(mcelog.entry + entry, mce, sizeof(struct mce));
1389 + smp_wmb();
1390 + mcelog.entry[entry].finished = 1;
1391 + smp_wmb();
1392 +}
1393 +
1394 +static void print_mce(struct mce *m)
1395 +{
1396 + printk("CPU %d: Machine Check Exception: %16Lx Bank %d: %016Lx\n",
1397 + m->cpu, m->mcgstatus, m->bank, m->status);
1398 + if (m->rip) {
1399 + printk("RIP %02x:<%016Lx> ", m->cs, m->rip);
1400 + if (m->cs == __KERNEL_CS)
1401 + print_symbol("{%s}", m->rip);
1402 + printk("\n");
1403 + }
1404 + printk("TSC %Lx ", m->tsc);
1405 + if (m->addr)
1406 + printk("ADDR %Lx ", m->addr);
1407 + if (m->misc)
1408 + printk("MISC %Lx ", m->addr);
1409 + printk("\n");
1410 +}
1411 +
1412 +static void mce_panic(char *msg, struct mce *backup, unsigned long start)
1413 +{
1414 + int i;
1415 + oops_begin();
1416 + for (i = 0; i < MCE_LOG_LEN; i++) {
1417 + if (mcelog.entry[i].tsc < start)
1418 + continue;
1419 + print_mce(&mcelog.entry[i]);
1420 + if (mcelog.entry[i].tsc == backup->tsc)
1421 + backup = NULL;
1422 + }
1423 + if (backup)
1424 + print_mce(backup);
1425 + panic(msg);
1426 +}
1427 +
1428 +static int mce_available(struct cpuinfo_x86 *c)
1429 +{
1430 + return !mce_disabled &&
1431 + test_bit(X86_FEATURE_MCE, &c->x86_capability) &&
1432 + test_bit(X86_FEATURE_MCA, &c->x86_capability);
1433 +}
1434 +
1435 +/*
1436 + * The actual machine check handler
1437 + */
1438 +
1439 +void do_machine_check(struct pt_regs * regs, long error_code)
1440 +{
1441 + struct mce m;
1442 + int nowayout = 0;
1443 + int kill_it = 0;
1444 + u64 mcestart;
1445 + int i;
1446 +
1447 + if (regs)
1448 + notify_die(DIE_NMI, "machine check", regs, error_code, 255, SIGKILL);
1449 + if (!banks)
1450 + return;
1451 +
1452 + memset(&m, 0, sizeof(struct mce));
1453 + m.cpu = hard_smp_processor_id();
1454 + rdmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
1455 + if (!regs && (m.mcgstatus & MCG_STATUS_MCIP))
1456 + return;
1457 + if (!(m.mcgstatus & MCG_STATUS_RIPV))
1458 + kill_it = 1;
1459 + if (regs && (m.mcgstatus & MCG_STATUS_EIPV)) {
1460 + m.rip = regs->rip;
1461 + m.cs = regs->cs;
1462 + }
1463 +
1464 + rdtscll(mcestart);
1465 + mb();
1466 +
1467 + for (i = 0; i < banks; i++) {
1468 + if (test_bit(i, &disabled_banks))
1469 + continue;
1470 +
1471 + rdmsrl(MSR_IA32_MC0_STATUS + i*4, m.status);
1472 + if ((m.status & MCI_STATUS_VAL) == 0)
1473 + continue;
1474 +
1475 + nowayout |= (tolerant < 1);
1476 + nowayout |= !!(m.status & (MCI_STATUS_OVER|MCI_STATUS_PCC));
1477 + kill_it |= !!(m.status & MCI_STATUS_UC);
1478 + m.bank = i;
1479 +
1480 + if (m.status & MCI_STATUS_MISCV)
1481 + rdmsrl(MSR_IA32_MC0_MISC + i*4, m.misc);
1482 + if (m.status & MCI_STATUS_ADDRV)
1483 + rdmsrl(MSR_IA32_MC0_MISC + i*4, m.addr);
1484 +
1485 + rdtscll(m.tsc);
1486 + wrmsrl(MSR_IA32_MC0_STATUS + i*4, 0);
1487 + mce_log(&m);
1488 + }
1489 + wrmsrl(MSR_IA32_MCG_STATUS, 0);
1490 +
1491 + /* Never do anything final in the polling timer */
1492 + if (!regs)
1493 + return;
1494 + if (nowayout)
1495 + mce_panic("Machine check", &m, mcestart);
1496 + if (kill_it) {
1497 + int user_space = (m.rip && (m.cs & 3));
1498 +
1499 + /* When the machine was in user space and the CPU didn't get
1500 + confused it's normally not necessary to panic, unless you are
1501 + paranoid (tolerant == 0) */
1502 + if (!user_space && (panic_on_oops || tolerant < 2))
1503 + mce_panic("Uncorrected machine check in kernel", &m, mcestart);
1504 +
1505 + /* do_exit takes an awful lot of locks and has as slight risk
1506 + of deadlocking. If you don't want that don't set tolerant >= 2 */
1507 + do_exit(SIGBUS);
1508 + }
1509 +}
1510 +
1511 +static void mce_clear_all(void)
1512 +{
1513 + int i;
1514 + for (i = 0; i < banks; i++)
1515 + wrmsrl(MSR_IA32_MC0_STATUS + i*4, 0);
1516 + wrmsrl(MSR_IA32_MCG_STATUS, 0);
1517 +}
1518 +
1519 +/*
1520 + * Periodic polling timer for "silent" machine check errors.
1521 + */
1522 +
1523 +static int check_interval = 3600; /* one hour */
1524 +static void mcheck_timer(void *data);
1525 +static DECLARE_WORK(mcheck_work, mcheck_timer, NULL);
1526 +
1527 +static void mcheck_check_cpu(void *info)
1528 +{
1529 + if (mce_available(&current_cpu_data))
1530 + do_machine_check(NULL, 0);
1531 +}
1532 +
1533 +static void mcheck_timer(void *data)
1534 +{
1535 + on_each_cpu(mcheck_check_cpu, NULL, 1, 1);
1536 + schedule_delayed_work(&mcheck_work, check_interval * HZ);
1537 +}
1538 +
1539 +
1540 +static __init int periodic_mcheck_init(void)
1541 +{
1542 + if (check_interval)
1543 + schedule_delayed_work(&mcheck_work, check_interval*HZ);
1544 + return 0;
1545 +}
1546 +__initcall(periodic_mcheck_init);
1547 +
1548 +
1549 +/*
1550 + * Initialize Machine Checks for a CPU.
1551 + */
1552 +static void mce_init(void *dummy)
1553 +{
1554 + u64 cap;
1555 + int i;
1556 +
1557 + rdmsrl(MSR_IA32_MCG_CAP, cap);
1558 + if (cap & MCG_CTL_P)
1559 + wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
1560 +
1561 + banks = cap & 0xff;
1562 +
1563 + mce_clear_all();
1564 + for (i = 0; i < banks; i++) {
1565 + u64 val = test_bit(i, &disabled_banks) ? 0 : ~0UL;
1566 + wrmsrl(MSR_IA32_MC0_CTL+4*i, val);
1567 + wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
1568 + }
1569 +
1570 + set_in_cr4(X86_CR4_MCE);
1571 +}
1572 +
1573 +/*
1574 + * Called for each booted CPU to set up machine checks.
1575 + * Must be called with preempt off.
1576 + */
1577 +void __init mcheck_init(struct cpuinfo_x86 *c)
1578 +{
1579 + static unsigned long mce_cpus __initdata = 0;
1580 +
1581 + if (test_and_set_bit(smp_processor_id(), &mce_cpus) || !mce_available(c))
1582 + return;
1583 +
1584 + mce_init(NULL);
1585 +}
1586 +
1587 +/*
1588 + * Character device to read and clear the MCE log.
1589 + */
1590 +
1591 +static void collect_tscs(void *data)
1592 +{
1593 + unsigned long *cpu_tsc = (unsigned long *)data;
1594 + rdtscll(cpu_tsc[smp_processor_id()]);
1595 +}
1596 +
1597 +static ssize_t mce_read(struct file *filp, char *ubuf, size_t usize, loff_t *off)
1598 +{
1599 + unsigned long cpu_tsc[NR_CPUS];
1600 + static DECLARE_MUTEX(mce_read_sem);
1601 + unsigned next;
1602 + char *buf = ubuf;
1603 + int i, err;
1604 +
1605 + down(&mce_read_sem);
1606 + next = mcelog.next;
1607 + read_barrier_depends();
1608 +
1609 + /* Only supports full reads right now */
1610 + if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) {
1611 + up(&mce_read_sem);
1612 + return -EINVAL;
1613 + }
1614 +
1615 + err = 0;
1616 + for (i = 0; i < next; i++) {
1617 + if (!mcelog.entry[i].finished)
1618 + continue;
1619 + smp_rmb();
1620 + err |= copy_to_user(buf, mcelog.entry + i, sizeof(struct mce));
1621 + buf += sizeof(struct mce);
1622 + }
1623 +
1624 + memset(mcelog.entry, 0, next * sizeof(struct mce));
1625 + mcelog.next = 0;
1626 + smp_wmb();
1627 +
1628 + synchronize_kernel();
1629 +
1630 + /* Collect entries that were still getting written before the synchronize. */
1631 +
1632 + on_each_cpu(collect_tscs, cpu_tsc, 1, 1);
1633 + for (i = next; i < MCE_LOG_LEN; i++) {
1634 + if (mcelog.entry[i].finished &&
1635 + mcelog.entry[i].tsc < cpu_tsc[mcelog.entry[i].cpu]) {
1636 + err |= copy_to_user(buf, mcelog.entry+i, sizeof(struct mce));
1637 + smp_rmb();
1638 + buf += sizeof(struct mce);
1639 + memset(&mcelog.entry[i], 0, sizeof(struct mce));
1640 + }
1641 + }
1642 + up(&mce_read_sem);
1643 + return err ? -EFAULT : buf - ubuf;
1644 +}
1645 +
1646 +static int mce_ioctl(struct inode *i, struct file *f,unsigned int cmd, unsigned long arg)
1647 +{
1648 + if (!capable(CAP_SYS_ADMIN))
1649 + return -EPERM;
1650 + switch (cmd) {
1651 + case MCE_GET_RECORD_LEN:
1652 + return put_user(sizeof(struct mce), (int *)arg);
1653 + case MCE_GET_LOG_LEN:
1654 + return put_user(MCE_LOG_LEN, (int *)arg);
1655 + case MCE_GETCLEAR_FLAGS: {
1656 + unsigned flags;
1657 + do {
1658 + flags = mcelog.flags;
1659 + } while (cmpxchg(&mcelog.flags, flags, 0) != flags);
1660 + return put_user(flags, (int *)arg);
1661 + }
1662 + default:
1663 + return -ENOTTY;
1664 + }
1665 +}
1666 +
1667 +#if 1 /* for testing */
1668 +static ssize_t mce_write(struct file *f, const char __user *buf, size_t sz, loff_t *off)
1669 +{
1670 + struct mce m;
1671 + if (sz != sizeof(struct mce))
1672 + return -EINVAL;
1673 + copy_from_user(&m, buf, sizeof(struct mce));
1674 + m.finished = 0;
1675 + mce_log(&m);
1676 + return sizeof(struct mce);
1677 +}
1678 +#endif
1679 +
1680 +static struct file_operations mce_chrdev_ops = {
1681 + .read = mce_read,
1682 + .ioctl = mce_ioctl,
1683 + .write = mce_write
1684 +};
1685 +
1686 +static struct miscdevice mce_log_device = {
1687 + MISC_MCELOG_MINOR,
1688 + "mcelog",
1689 + &mce_chrdev_ops,
1690 +};
1691 +
1692 +/*
1693 + * Old style boot options parsing. Only for compatibility.
1694 + */
1695 +
1696 +static int __init mcheck_disable(char *str)
1697 +{
1698 + mce_disabled = 1;
1699 + return 0;
1700 +}
1701 +
1702 +/* mce=off disable machine check */
1703 +static int __init mcheck_enable(char *str)
1704 +{
1705 + if (!strcmp(str, "off"))
1706 + mce_disabled = 1;
1707 + else
1708 + printk("mce= argument %s ignored. Please use /sys", str);
1709 + return 0;
1710 +}
1711 +
1712 +__setup("nomce", mcheck_disable);
1713 +__setup("mce", mcheck_enable);
1714 +
1715 +/*
1716 + * Sysfs support
1717 + */
1718 +
1719 +/* On resume clear all MCE state. Don't want to see leftovers from the BIOS. */
1720 +static int mce_resume(struct sys_device *dev)
1721 +{
1722 + mce_clear_all();
1723 + on_each_cpu(mce_init, NULL, 1, 1);
1724 + return 0;
1725 +}
1726 +
1727 +/* Reinit MCEs after user configuration changes */
1728 +static void mce_restart(void)
1729 +{
1730 + if (check_interval)
1731 + cancel_delayed_work(&mcheck_work);
1732 + /* Timer race is harmless here */
1733 + on_each_cpu(mce_init, NULL, 1, 1);
1734 + if (check_interval)
1735 + schedule_delayed_work(&mcheck_work, check_interval*HZ);
1736 +}
1737 +
1738 +static struct sysdev_class mce_sysclass = {
1739 + .resume = mce_resume,
1740 + set_kset_name("machinecheck"),
1741 +};
1742 +
1743 +static struct sys_device device_mce = {
1744 + .id = 0,
1745 + .cls = &mce_sysclass,
1746 +};
1747 +
1748 +/* Why are there no generic functions for this? */
1749 +#define ACCESSOR(name, start) \
1750 + static ssize_t show_ ## name(struct sys_device *s, char *buf) { \
1751 + return sprintf(buf, "%lu\n", (unsigned long)name); \
1752 + } \
1753 + static ssize_t set_ ## name(struct sys_device *s,const char *buf,size_t siz) { \
1754 + char *end; \
1755 + unsigned long new = simple_strtoul(buf, &end, 0); \
1756 + if (end == buf) return -EINVAL; \
1757 + name = new; \
1758 + start; \
1759 + return end-buf; \
1760 + } \
1761 + static SYSDEV_ATTR(name, 0644, show_ ## name, set_ ## name);
1762 +
1763 +ACCESSOR(disabled_banks,mce_restart())
1764 +ACCESSOR(tolerant,)
1765 +ACCESSOR(check_interval,mce_restart())
1766 +
1767 +static __init int mce_init_device(void)
1768 +{
1769 + int err;
1770 + if (!mce_available(&boot_cpu_data))
1771 + return -EIO;
1772 + err = sysdev_class_register(&mce_sysclass);
1773 + if (!err)
1774 + err = sys_device_register(&device_mce);
1775 + if (!err) {
1776 + /* could create per CPU objects, but is not worth it. */
1777 + sysdev_create_file(&device_mce, &attr_disabled_banks);
1778 + sysdev_create_file(&device_mce, &attr_tolerant);
1779 + sysdev_create_file(&device_mce, &attr_check_interval);
1780 + }
1781 +
1782 + misc_register(&mce_log_device);
1783 + return err;
1784 +
1785 +}
1786 +device_initcall(mce_init_device);
1787 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/mpparse.c linux-2.6.3-amd64/arch/x86_64/kernel/mpparse.c
1788 --- linux-vanilla/arch/x86_64/kernel/mpparse.c 2004-02-19 23:57:11.000000000 +0100
1789 +++ linux-2.6.3-amd64/arch/x86_64/kernel/mpparse.c 2004-02-20 00:16:01.000000000 +0100
1790 @@ -876,6 +876,72 @@ void __init mp_config_acpi_legacy_irqs (
1791 return;
1792 }
1793
1794 +
1795 +extern FADT_DESCRIPTOR acpi_fadt;
1796 +
1797 +void __init mp_config_ioapic_for_sci(int irq)
1798 +{
1799 + int ioapic;
1800 + int ioapic_pin;
1801 + struct acpi_table_madt *madt;
1802 + struct acpi_table_int_src_ovr *entry = NULL;
1803 + acpi_interrupt_flags flags;
1804 + void *madt_end;
1805 + acpi_status status;
1806 +
1807 + /*
1808 + * Ensure that if there is an interrupt source override entry
1809 + * for the ACPI SCI, we leave it as is. Unfortunately this involves
1810 + * walking the MADT again.
1811 + */
1812 + status = acpi_get_firmware_table("APIC", 1, ACPI_LOGICAL_ADDRESSING,
1813 + (struct acpi_table_header **) &madt);
1814 + if (ACPI_SUCCESS(status)) {
1815 + madt_end = (void *) (unsigned long)madt + madt->header.length;
1816 +
1817 + entry = (struct acpi_table_int_src_ovr *)
1818 + ((unsigned long) madt + sizeof(struct acpi_table_madt));
1819 +
1820 + while ((void *) entry < madt_end) {
1821 + if (entry->header.type == ACPI_MADT_INT_SRC_OVR &&
1822 + acpi_fadt.sci_int == entry->bus_irq)
1823 + goto found;
1824 +
1825 + entry = (struct acpi_table_int_src_ovr *)
1826 + ((unsigned long) entry + entry->header.length);
1827 + }
1828 + }
1829 + /*
1830 + * Although the ACPI spec says that the SCI should be level/low
1831 + * don't reprogram it unless there is an explicit MADT OVR entry
1832 + * instructing us to do so -- otherwise we break Tyan boards which
1833 + * have the SCI wired edge/high but no MADT OVR.
1834 + */
1835 + return;
1836 +
1837 +found:
1838 + /*
1839 + * See the note at the end of ACPI 2.0b section
1840 + * 5.2.10.8 for what this is about.
1841 + */
1842 + flags = entry->flags;
1843 + acpi_fadt.sci_int = entry->global_irq;
1844 + irq = entry->global_irq;
1845 +
1846 + ioapic = mp_find_ioapic(irq);
1847 +
1848 + ioapic_pin = irq - mp_ioapic_routing[ioapic].irq_start;
1849 +
1850 + /*
1851 + * MPS INTI flags:
1852 + * trigger: 0=default, 1=edge, 3=level
1853 + * polarity: 0=default, 1=high, 3=low
1854 + * Per ACPI spec, default for SCI means level/low.
1855 + */
1856 + io_apic_set_pci_routing(ioapic, ioapic_pin, irq,
1857 + (flags.trigger == 1 ? 0 : 1), (flags.polarity == 1 ? 0 : 1));
1858 +}
1859 +
1860 #ifdef CONFIG_ACPI_PCI
1861
1862 void __init mp_parse_prt (void)
1863 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/nmi.c linux-2.6.3-amd64/arch/x86_64/kernel/nmi.c
1864 --- linux-vanilla/arch/x86_64/kernel/nmi.c 2004-02-19 23:57:11.000000000 +0100
1865 +++ linux-2.6.3-amd64/arch/x86_64/kernel/nmi.c 2004-02-19 23:28:10.000000000 +0100
1866 @@ -47,6 +47,9 @@ static unsigned int nmi_hz = HZ;
1867 unsigned int nmi_perfctr_msr; /* the MSR to reset in NMI handler */
1868 int nmi_watchdog_disabled;
1869
1870 +/* Note that these events don't tick when the CPU idles. This means
1871 + the frequency varies with CPU load. */
1872 +
1873 #define K7_EVNTSEL_ENABLE (1 << 22)
1874 #define K7_EVNTSEL_INT (1 << 20)
1875 #define K7_EVNTSEL_OS (1 << 17)
1876 @@ -236,6 +239,9 @@ static void setup_k7_watchdog(void)
1877 int i;
1878 unsigned int evntsel;
1879
1880 + /* No check, so can start with slow frequency */
1881 + nmi_hz = 1;
1882 +
1883 /* XXX should check these in EFER */
1884
1885 nmi_perfctr_msr = MSR_K7_PERFCTR0;
1886 @@ -253,14 +259,13 @@ static void setup_k7_watchdog(void)
1887 | K7_NMI_EVENT;
1888
1889 wrmsr(MSR_K7_EVNTSEL0, evntsel, 0);
1890 - printk(KERN_INFO "watchdog: setting K7_PERFCTR0 to %08x\n", -(cpu_khz/nmi_hz*1000));
1891 - wrmsr(MSR_K7_PERFCTR0, -(cpu_khz/nmi_hz*1000), -1);
1892 + wrmsrl(MSR_K7_PERFCTR0, -((u64)cpu_khz*1000) / nmi_hz);
1893 apic_write(APIC_LVTPC, APIC_DM_NMI);
1894 evntsel |= K7_EVNTSEL_ENABLE;
1895 wrmsr(MSR_K7_EVNTSEL0, evntsel, 0);
1896 }
1897
1898 -void setup_apic_nmi_watchdog (void)
1899 +void setup_apic_nmi_watchdog(void)
1900 {
1901 switch (boot_cpu_data.x86_vendor) {
1902 case X86_VENDOR_AMD:
1903 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/pci-gart.c linux-2.6.3-amd64/arch/x86_64/kernel/pci-gart.c
1904 --- linux-vanilla/arch/x86_64/kernel/pci-gart.c 2004-02-19 23:57:11.000000000 +0100
1905 +++ linux-2.6.3-amd64/arch/x86_64/kernel/pci-gart.c 2004-02-19 23:28:10.000000000 +0100
1906 @@ -354,6 +354,11 @@ dma_addr_t pci_map_single(struct pci_dev
1907
1908 BUG_ON(dir == PCI_DMA_NONE);
1909
1910 +#ifdef CONFIG_SWIOTLB
1911 + if (swiotlb)
1912 + return swiotlb_map_single(&dev->dev,addr,size,dir);
1913 +#endif
1914 +
1915 phys_mem = virt_to_phys(addr);
1916 if (!need_iommu(dev, phys_mem, size))
1917 return phys_mem;
1918 @@ -460,6 +465,12 @@ int pci_map_sg(struct pci_dev *dev, stru
1919 BUG_ON(dir == PCI_DMA_NONE);
1920 if (nents == 0)
1921 return 0;
1922 +
1923 +#ifdef CONFIG_SWIOTLB
1924 + if (swiotlb)
1925 + return swiotlb_map_sg(&dev->dev,sg,nents,dir);
1926 +#endif
1927 +
1928 out = 0;
1929 start = 0;
1930 for (i = 0; i < nents; i++) {
1931 @@ -520,6 +531,13 @@ void pci_unmap_single(struct pci_dev *hw
1932 unsigned long iommu_page;
1933 int npages;
1934 int i;
1935 +
1936 +#ifdef CONFIG_SWIOTLB
1937 + if (swiotlb) {
1938 + swiotlb_unmap_single(&hwdev->dev,dma_addr,size,direction);
1939 + return;
1940 + }
1941 +#endif
1942 if (dma_addr < iommu_bus_base + EMERGENCY_PAGES*PAGE_SIZE ||
1943 dma_addr >= iommu_bus_base + iommu_size)
1944 return;
1945 @@ -570,7 +588,7 @@ int pci_dma_supported(struct pci_dev *de
1946 return 0;
1947 }
1948
1949 - if (no_iommu && (mask < (end_pfn << PAGE_SHIFT)))
1950 + if (no_iommu && (mask < (end_pfn << PAGE_SHIFT)) && !swiotlb)
1951 return 0;
1952
1953 return 1;
1954 @@ -680,6 +698,7 @@ static __init int init_k8_gatt(struct ag
1955 return 0;
1956
1957 nommu:
1958 + /* Should not happen anymore */
1959 printk(KERN_ERR "PCI-DMA: More than 4GB of RAM and no IOMMU\n"
1960 KERN_ERR "PCI-DMA: 32bit PCI IO may malfunction.");
1961 return -1;
1962 @@ -694,6 +713,7 @@ static int __init pci_iommu_init(void)
1963 unsigned long iommu_start;
1964 struct pci_dev *dev;
1965
1966 +
1967 #ifndef CONFIG_AGP_AMD64
1968 no_agp = 1;
1969 #else
1970 @@ -704,7 +724,14 @@ static int __init pci_iommu_init(void)
1971 (agp_copy_info(&info) < 0);
1972 #endif
1973
1974 - if (no_iommu || (!force_iommu && end_pfn < 0xffffffff>>PAGE_SHIFT)) {
1975 + if (swiotlb) {
1976 + no_iommu = 1;
1977 + printk(KERN_INFO "PCI-DMA: Using SWIOTLB :-(\n");
1978 + return -1;
1979 + }
1980 +
1981 + if (no_iommu || (!force_iommu && end_pfn < 0xffffffff>>PAGE_SHIFT) ||
1982 + !iommu_aperture) {
1983 printk(KERN_INFO "PCI-DMA: Disabling IOMMU.\n");
1984 no_iommu = 1;
1985 return -1;
1986 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/process.c linux-2.6.3-amd64/arch/x86_64/kernel/process.c
1987 --- linux-vanilla/arch/x86_64/kernel/process.c 2004-02-05 08:10:24.000000000 +0100
1988 +++ linux-2.6.3-amd64/arch/x86_64/kernel/process.c 2004-02-19 23:28:10.000000000 +0100
1989 @@ -140,6 +140,52 @@ void cpu_idle (void)
1990 }
1991 }
1992
1993 +/*
1994 + * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
1995 + * which can obviate IPI to trigger checking of need_resched.
1996 + * We execute MONITOR against need_resched and enter optimized wait state
1997 + * through MWAIT. Whenever someone changes need_resched, we would be woken
1998 + * up from MWAIT (without an IPI).
1999 + */
2000 +static void mwait_idle(void)
2001 +{
2002 + local_irq_enable();
2003 +
2004 + if (!need_resched()) {
2005 + set_thread_flag(TIF_POLLING_NRFLAG);
2006 + do {
2007 + __monitor((void *)&current_thread_info()->flags, 0, 0);
2008 + if (need_resched())
2009 + break;
2010 + __mwait(0, 0);
2011 + } while (!need_resched());
2012 + clear_thread_flag(TIF_POLLING_NRFLAG);
2013 + }
2014 +}
2015 +
2016 +void __init select_idle_routine(const struct cpuinfo_x86 *c)
2017 +{
2018 + static int printed;
2019 + if (cpu_has(c, X86_FEATURE_MWAIT)) {
2020 + /*
2021 + * Skip, if setup has overridden idle.
2022 + * Also, take care of system with asymmetric CPUs.
2023 + * Use, mwait_idle only if all cpus support it.
2024 + * If not, we fallback to default_idle()
2025 + */
2026 + if (!pm_idle) {
2027 + if (!printed) {
2028 + printk("using mwait in idle threads.\n");
2029 + printed = 1;
2030 + }
2031 + pm_idle = mwait_idle;
2032 + }
2033 + return;
2034 + }
2035 + pm_idle = default_idle;
2036 + return;
2037 +}
2038 +
2039 static int __init idle_setup (char *str)
2040 {
2041 if (!strncmp(str, "poll", 4)) {
2042 @@ -537,16 +583,18 @@ extern void scheduling_functions_end_her
2043
2044 unsigned long get_wchan(struct task_struct *p)
2045 {
2046 + unsigned long stack;
2047 u64 fp,rip;
2048 int count = 0;
2049
2050 if (!p || p == current || p->state==TASK_RUNNING)
2051 return 0;
2052 - if (p->thread.rsp < (u64)p || p->thread.rsp > (u64)p + THREAD_SIZE)
2053 + stack = (unsigned long)p->thread_info;
2054 + if (p->thread.rsp < stack || p->thread.rsp > stack+THREAD_SIZE)
2055 return 0;
2056 fp = *(u64 *)(p->thread.rsp);
2057 do {
2058 - if (fp < (unsigned long)p || fp > (unsigned long)p+THREAD_SIZE)
2059 + if (fp < (unsigned long)stack || fp > (unsigned long)stack+THREAD_SIZE)
2060 return 0;
2061 rip = *(u64 *)(fp+8);
2062 if (rip < first_sched || rip >= last_sched)
2063 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/setup.c linux-2.6.3-amd64/arch/x86_64/kernel/setup.c
2064 --- linux-vanilla/arch/x86_64/kernel/setup.c 2004-02-05 08:10:25.000000000 +0100
2065 +++ linux-2.6.3-amd64/arch/x86_64/kernel/setup.c 2004-02-19 23:28:10.000000000 +0100
2066 @@ -76,6 +76,9 @@ unsigned long pci_mem_start = 0x10000000
2067
2068 unsigned long saved_video_mode;
2069
2070 +int swiotlb;
2071 +EXPORT_SYMBOL(swiotlb);
2072 +
2073 /*
2074 * Setup options
2075 */
2076 @@ -440,7 +443,6 @@ void __init setup_arch(char **cmdline_p)
2077 }
2078 }
2079 #endif
2080 -
2081 paging_init();
2082
2083 #ifndef CONFIG_SMP
2084 @@ -584,6 +586,193 @@ static int __init init_amd(struct cpuinf
2085 return r;
2086 }
2087
2088 +static void __init detect_ht(void)
2089 +{
2090 +#ifdef CONFIG_SMP
2091 + extern int phys_proc_id[NR_CPUS];
2092 +
2093 + u32 eax, ebx, ecx, edx;
2094 + int index_lsb, index_msb, tmp;
2095 + int initial_apic_id;
2096 + int cpu = smp_processor_id();
2097 +
2098 + cpuid(1, &eax, &ebx, &ecx, &edx);
2099 + smp_num_siblings = (ebx & 0xff0000) >> 16;
2100 +
2101 + if (smp_num_siblings == 1) {
2102 + printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
2103 + } else if (smp_num_siblings > 1) {
2104 + index_lsb = 0;
2105 + index_msb = 31;
2106 + /*
2107 + * At this point we only support two siblings per
2108 + * processor package.
2109 + */
2110 +#define NR_SIBLINGS 2
2111 + if (smp_num_siblings != NR_SIBLINGS) {
2112 + printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
2113 + smp_num_siblings = 1;
2114 + return;
2115 + }
2116 + tmp = smp_num_siblings;
2117 + while ((tmp & 1) == 0) {
2118 + tmp >>=1 ;
2119 + index_lsb++;
2120 + }
2121 + tmp = smp_num_siblings;
2122 + while ((tmp & 0x80000000 ) == 0) {
2123 + tmp <<=1 ;
2124 + index_msb--;
2125 + }
2126 + if (index_lsb != index_msb )
2127 + index_msb++;
2128 + initial_apic_id = ebx >> 24 & 0xff;
2129 + phys_proc_id[cpu] = initial_apic_id >> index_msb;
2130 +
2131 + printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
2132 + phys_proc_id[cpu]);
2133 + }
2134 +#endif
2135 +}
2136 +
2137 +#define LVL_1_INST 1
2138 +#define LVL_1_DATA 2
2139 +#define LVL_2 3
2140 +#define LVL_3 4
2141 +#define LVL_TRACE 5
2142 +
2143 +struct _cache_table
2144 +{
2145 + unsigned char descriptor;
2146 + char cache_type;
2147 + short size;
2148 +};
2149 +
2150 +/* all the cache descriptor types we care about (no TLB or trace cache entries) */
2151 +static struct _cache_table cache_table[] __initdata =
2152 +{
2153 + { 0x06, LVL_1_INST, 8 },
2154 + { 0x08, LVL_1_INST, 16 },
2155 + { 0x0a, LVL_1_DATA, 8 },
2156 + { 0x0c, LVL_1_DATA, 16 },
2157 + { 0x22, LVL_3, 512 },
2158 + { 0x23, LVL_3, 1024 },
2159 + { 0x25, LVL_3, 2048 },
2160 + { 0x29, LVL_3, 4096 },
2161 + { 0x2c, LVL_1_DATA, 32 },
2162 + { 0x30, LVL_1_INST, 32 },
2163 + { 0x39, LVL_2, 128 },
2164 + { 0x3b, LVL_2, 128 },
2165 + { 0x3c, LVL_2, 256 },
2166 + { 0x41, LVL_2, 128 },
2167 + { 0x42, LVL_2, 256 },
2168 + { 0x43, LVL_2, 512 },
2169 + { 0x44, LVL_2, 1024 },
2170 + { 0x45, LVL_2, 2048 },
2171 + { 0x66, LVL_1_DATA, 8 },
2172 + { 0x67, LVL_1_DATA, 16 },
2173 + { 0x68, LVL_1_DATA, 32 },
2174 + { 0x70, LVL_TRACE, 12 },
2175 + { 0x71, LVL_TRACE, 16 },
2176 + { 0x72, LVL_TRACE, 32 },
2177 + { 0x79, LVL_2, 128 },
2178 + { 0x7a, LVL_2, 256 },
2179 + { 0x7b, LVL_2, 512 },
2180 + { 0x7c, LVL_2, 1024 },
2181 + { 0x82, LVL_2, 256 },
2182 + { 0x83, LVL_2, 512 },
2183 + { 0x84, LVL_2, 1024 },
2184 + { 0x85, LVL_2, 2048 },
2185 + { 0x86, LVL_2, 512 },
2186 + { 0x87, LVL_2, 1024 },
2187 + { 0x00, 0, 0}
2188 +};
2189 +
2190 +static void __init init_intel(struct cpuinfo_x86 *c)
2191 +{
2192 + /* Cache sizes */
2193 + unsigned int trace = 0, l1i = 0, l1d = 0, l2 = 0, l3 = 0;
2194 + unsigned n;
2195 +
2196 + select_idle_routine(c);
2197 + if (c->cpuid_level > 1) {
2198 + /* supports eax=2 call */
2199 + int i, j, n;
2200 + int regs[4];
2201 + unsigned char *dp = (unsigned char *)regs;
2202 +
2203 + /* Number of times to iterate */
2204 + n = cpuid_eax(2) & 0xFF;
2205 +
2206 + for ( i = 0 ; i < n ; i++ ) {
2207 + cpuid(2, &regs[0], &regs[1], &regs[2], &regs[3]);
2208 +
2209 + /* If bit 31 is set, this is an unknown format */
2210 + for ( j = 0 ; j < 3 ; j++ ) {
2211 + if ( regs[j] < 0 ) regs[j] = 0;
2212 + }
2213 +
2214 + /* Byte 0 is level count, not a descriptor */
2215 + for ( j = 1 ; j < 16 ; j++ ) {
2216 + unsigned char des = dp[j];
2217 + unsigned char k = 0;
2218 +
2219 + /* look up this descriptor in the table */
2220 + while (cache_table[k].descriptor != 0)
2221 + {
2222 + if (cache_table[k].descriptor == des) {
2223 + switch (cache_table[k].cache_type) {
2224 + case LVL_1_INST:
2225 + l1i += cache_table[k].size;
2226 + break;
2227 + case LVL_1_DATA:
2228 + l1d += cache_table[k].size;
2229 + break;
2230 + case LVL_2:
2231 + l2 += cache_table[k].size;
2232 + break;
2233 + case LVL_3:
2234 + l3 += cache_table[k].size;
2235 + break;
2236 + case LVL_TRACE:
2237 + trace += cache_table[k].size;
2238 + break;
2239 + }
2240 +
2241 + break;
2242 + }
2243 +
2244 + k++;
2245 + }
2246 + }
2247 + }
2248 +
2249 + if (trace)
2250 + printk (KERN_INFO "CPU: Trace cache: %dK uops", trace);
2251 + else if (l1i)
2252 + printk (KERN_INFO "CPU: L1 I cache: %dK", l1i);
2253 + if (l1d)
2254 + printk(", L1 D cache: %dK\n", l1d);
2255 + else
2256 + printk("\n");
2257 + if (l2)
2258 + printk(KERN_INFO "CPU: L2 cache: %dK\n", l2);
2259 + if (l3)
2260 + printk(KERN_INFO "CPU: L3 cache: %dK\n", l3);
2261 +
2262 + c->x86_cache_size = l2 ? l2 : (l1i+l1d);
2263 + }
2264 +
2265 + if (cpu_has(c, X86_FEATURE_HT))
2266 + detect_ht();
2267 +
2268 + n = cpuid_eax(0x80000000);
2269 + if (n >= 0x80000008) {
2270 + unsigned eax = cpuid_eax(0x80000008);
2271 + c->x86_virt_bits = (eax >> 8) & 0xff;
2272 + c->x86_phys_bits = eax & 0xff;
2273 + }
2274 +}
2275
2276 void __init get_cpu_vendor(struct cpuinfo_x86 *c)
2277 {
2278 @@ -591,6 +780,8 @@ void __init get_cpu_vendor(struct cpuinf
2279
2280 if (!strcmp(v, "AuthenticAMD"))
2281 c->x86_vendor = X86_VENDOR_AMD;
2282 + else if (!strcmp(v, "GenuineIntel"))
2283 + c->x86_vendor = X86_VENDOR_INTEL;
2284 else
2285 c->x86_vendor = X86_VENDOR_UNKNOWN;
2286 }
2287 @@ -606,7 +797,7 @@ struct cpu_model_info {
2288 */
2289 void __init identify_cpu(struct cpuinfo_x86 *c)
2290 {
2291 - int junk, i;
2292 + int i;
2293 u32 xlvl, tfms;
2294
2295 c->loops_per_jiffy = loops_per_jiffy;
2296 @@ -630,7 +821,7 @@ void __init identify_cpu(struct cpuinfo_
2297 /* Intel-defined flags: level 0x00000001 */
2298 if (c->cpuid_level >= 0x00000001) {
2299 __u32 misc;
2300 - cpuid(0x00000001, &tfms, &misc, &junk,
2301 + cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
2302 &c->x86_capability[0]);
2303 c->x86 = (tfms >> 8) & 0xf;
2304 c->x86_model = (tfms >> 4) & 0xf;
2305 @@ -679,9 +870,13 @@ void __init identify_cpu(struct cpuinfo_
2306 init_amd(c);
2307 break;
2308
2309 + case X86_VENDOR_INTEL:
2310 + init_intel(c);
2311 + break;
2312 +
2313 case X86_VENDOR_UNKNOWN:
2314 default:
2315 - /* Not much we can do here... */
2316 + display_cacheinfo(c);
2317 break;
2318 }
2319
2320 @@ -697,6 +892,7 @@ void __init identify_cpu(struct cpuinfo_
2321 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
2322 }
2323
2324 + mcheck_init(c);
2325 }
2326
2327
2328 @@ -732,7 +928,7 @@ static int show_cpuinfo(struct seq_file
2329 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
2330 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
2331 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
2332 - "fxsr", "sse", "sse2", "ss", NULL, "tm", "ia64", NULL,
2333 + "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
2334
2335 /* AMD-defined */
2336 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2337 @@ -751,6 +947,12 @@ static int show_cpuinfo(struct seq_file
2338 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2339 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2340 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2341 +
2342 + /* Intel-defined (#2) */
2343 + "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2",
2344 + "est", NULL, "cid", NULL, NULL, "cmpxchg16b", NULL, NULL,
2345 + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2346 + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2347 };
2348 static char *x86_power_flags[] = {
2349 "ts", /* temperature sensor */
2350 @@ -790,6 +992,14 @@ static int show_cpuinfo(struct seq_file
2351 if (c->x86_cache_size >= 0)
2352 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
2353
2354 +#ifdef CONFIG_X86_HT
2355 + if (cpu_has_ht) {
2356 + extern int phys_proc_id[NR_CPUS];
2357 + seq_printf(m, "physical id\t: %d\n", phys_proc_id[c - cpu_data]);
2358 + seq_printf(m, "siblings\t: %d\n", smp_num_siblings);
2359 + }
2360 +#endif
2361 +
2362 seq_printf(m,
2363 "fpu\t\t: yes\n"
2364 "fpu_exception\t: yes\n"
2365 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/smpboot.c linux-2.6.3-amd64/arch/x86_64/kernel/smpboot.c
2366 --- linux-vanilla/arch/x86_64/kernel/smpboot.c 2003-09-23 08:03:38.000000000 +0200
2367 +++ linux-2.6.3-amd64/arch/x86_64/kernel/smpboot.c 2004-02-19 23:28:10.000000000 +0100
2368 @@ -53,6 +53,10 @@
2369 #include <asm/tlbflush.h>
2370 #include <asm/proto.h>
2371
2372 +/* Number of siblings per CPU package */
2373 +int smp_num_siblings = 1;
2374 +int phys_proc_id[NR_CPUS]; /* Package ID of each logical CPU */
2375 +
2376 /* Bitmask of currently online CPUs */
2377 cpumask_t cpu_online_map;
2378
2379 @@ -66,6 +70,8 @@ struct cpuinfo_x86 cpu_data[NR_CPUS] __c
2380 /* Set when the idlers are all forked */
2381 int smp_threads_ready;
2382
2383 +int cpu_sibling_map[NR_CPUS] __cacheline_aligned;
2384 +
2385 /*
2386 * Trampoline 80x86 program as an array.
2387 */
2388 @@ -645,7 +651,6 @@ static void __init do_boot_cpu (int apic
2389 if (cpu_isset(cpu, cpu_callin_map)) {
2390 /* number CPUs logically, starting from 1 (BSP is 0) */
2391 Dprintk("OK.\n");
2392 - printk(KERN_INFO "CPU%d: ", cpu);
2393 print_cpu_info(&cpu_data[cpu]);
2394 Dprintk("CPU has booted.\n");
2395 } else {
2396 @@ -857,6 +862,34 @@ static void __init smp_boot_cpus(unsigne
2397 Dprintk("Before bogocount - setting activated=1.\n");
2398 }
2399
2400 + /*
2401 + * If Hyper-Threading is avaialble, construct cpu_sibling_map[], so
2402 + * that we can tell the sibling CPU efficiently.
2403 + */
2404 + if (cpu_has_ht && smp_num_siblings > 1) {
2405 + for (cpu = 0; cpu < NR_CPUS; cpu++)
2406 + cpu_sibling_map[cpu] = NO_PROC_ID;
2407 +
2408 + for (cpu = 0; cpu < NR_CPUS; cpu++) {
2409 + int i;
2410 + if (!cpu_isset(cpu, cpu_callout_map))
2411 + continue;
2412 +
2413 + for (i = 0; i < NR_CPUS; i++) {
2414 + if (i == cpu || !cpu_isset(i, cpu_callout_map))
2415 + continue;
2416 + if (phys_proc_id[cpu] == phys_proc_id[i]) {
2417 + cpu_sibling_map[cpu] = i;
2418 + break;
2419 + }
2420 + }
2421 + if (cpu_sibling_map[cpu] == NO_PROC_ID) {
2422 + smp_num_siblings = 1;
2423 + printk(KERN_WARNING "WARNING: No sibling found for CPU %d.\n", cpu);
2424 + }
2425 + }
2426 + }
2427 +
2428 Dprintk("Boot done.\n");
2429
2430 /*
2431 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/time.c linux-2.6.3-amd64/arch/x86_64/kernel/time.c
2432 --- linux-vanilla/arch/x86_64/kernel/time.c 2004-02-05 08:10:25.000000000 +0100
2433 +++ linux-2.6.3-amd64/arch/x86_64/kernel/time.c 2004-02-19 23:28:10.000000000 +0100
2434 @@ -24,6 +24,7 @@
2435 #include <linux/ioport.h>
2436 #include <linux/module.h>
2437 #include <linux/device.h>
2438 +#include <linux/sysdev.h>
2439 #include <linux/bcd.h>
2440 #include <asm/pgtable.h>
2441 #include <asm/vsyscall.h>
2442 @@ -217,14 +218,22 @@ static void set_rtc_mmss(unsigned long n
2443 real_minutes += 30; /* correct for half hour time zone */
2444 real_minutes %= 60;
2445
2446 - if (abs(real_minutes - cmos_minutes) < 30) {
2447 +#if 0
2448 + /* AMD 8111 is a really bad time keeper and hits this regularly.
2449 + It probably was an attempt to avoid screwing up DST, but ignore
2450 + that for now. */
2451 + if (abs(real_minutes - cmos_minutes) >= 30) {
2452 + printk(KERN_WARNING "time.c: can't update CMOS clock "
2453 + "from %d to %d\n", cmos_minutes, real_minutes);
2454 + } else
2455 +#endif
2456 +
2457 + {
2458 BIN_TO_BCD(real_seconds);
2459 BIN_TO_BCD(real_minutes);
2460 CMOS_WRITE(real_seconds, RTC_SECONDS);
2461 CMOS_WRITE(real_minutes, RTC_MINUTES);
2462 - } else
2463 - printk(KERN_WARNING "time.c: can't update CMOS clock "
2464 - "from %d to %d\n", cmos_minutes, real_minutes);
2465 + }
2466
2467 /*
2468 * The following flags have to be released exactly in this order, otherwise the
2469 @@ -736,6 +745,51 @@ void __init time_init_smp(void)
2470
2471 __setup("report_lost_ticks", time_setup);
2472
2473 +static long clock_cmos_diff;
2474 +
2475 +static int time_suspend(struct sys_device *dev, u32 state)
2476 +{
2477 + /*
2478 + * Estimate time zone so that set_time can update the clock
2479 + */
2480 + clock_cmos_diff = -get_cmos_time();
2481 + clock_cmos_diff += get_seconds();
2482 + return 0;
2483 +}
2484 +
2485 +static int time_resume(struct sys_device *dev)
2486 +{
2487 + unsigned long sec = get_cmos_time() + clock_cmos_diff;
2488 + write_seqlock_irq(&xtime_lock);
2489 + xtime.tv_sec = sec;
2490 + xtime.tv_nsec = 0;
2491 + write_sequnlock_irq(&xtime_lock);
2492 + return 0;
2493 +}
2494 +
2495 +static struct sysdev_class pit_sysclass = {
2496 + .resume = time_resume,
2497 + .suspend = time_suspend,
2498 + set_kset_name("pit"),
2499 +};
2500 +
2501 +
2502 +/* XXX this driverfs stuff should probably go elsewhere later -john */
2503 +static struct sys_device device_i8253 = {
2504 + .id = 0,
2505 + .cls = &pit_sysclass,
2506 +};
2507 +
2508 +static int time_init_device(void)
2509 +{
2510 + int error = sysdev_class_register(&pit_sysclass);
2511 + if (!error)
2512 + error = sys_device_register(&device_i8253);
2513 + return error;
2514 +}
2515 +
2516 +device_initcall(time_init_device);
2517 +
2518 #ifdef CONFIG_HPET_EMULATE_RTC
2519 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
2520 * is enabled, we support RTC interrupt functionality in software.
2521 @@ -961,3 +1015,4 @@ irqreturn_t hpet_rtc_interrupt(int irq,
2522 return IRQ_HANDLED;
2523 }
2524 #endif
2525 +
2526 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/kernel/x8664_ksyms.c linux-2.6.3-amd64/arch/x86_64/kernel/x8664_ksyms.c
2527 --- linux-vanilla/arch/x86_64/kernel/x8664_ksyms.c 2004-02-05 08:10:25.000000000 +0100
2528 +++ linux-2.6.3-amd64/arch/x86_64/kernel/x8664_ksyms.c 2004-02-19 23:28:10.000000000 +0100
2529 @@ -194,6 +194,10 @@ EXPORT_SYMBOL(atomic_dec_and_lock);
2530
2531 EXPORT_SYMBOL(die_chain);
2532
2533 +#ifdef CONFIG_SMP
2534 +EXPORT_SYMBOL(cpu_sibling_map);
2535 +#endif
2536 +
2537 extern void do_softirq_thunk(void);
2538 EXPORT_SYMBOL_NOVERS(do_softirq_thunk);
2539
2540 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/lib/copy_page.S linux-2.6.3-amd64/arch/x86_64/lib/copy_page.S
2541 --- linux-vanilla/arch/x86_64/lib/copy_page.S 2003-09-28 10:54:54.000000000 +0200
2542 +++ linux-2.6.3-amd64/arch/x86_64/lib/copy_page.S 2004-02-19 23:28:10.000000000 +0100
2543 @@ -8,11 +8,6 @@
2544 .globl copy_page
2545 .p2align 4
2546 copy_page:
2547 - prefetch (%rsi)
2548 - prefetch 1*64(%rsi)
2549 - prefetchw (%rdi)
2550 - prefetchw 1*64(%rdi)
2551 -
2552 subq $3*8,%rsp
2553 movq %rbx,(%rsp)
2554 movq %r12,1*8(%rsp)
2555 @@ -32,7 +27,7 @@ copy_page:
2556 movq 48 (%rsi), %r11
2557 movq 56 (%rsi), %r12
2558
2559 - prefetch 5*64(%rsi)
2560 + prefetcht0 5*64(%rsi)
2561
2562 movq %rax, (%rdi)
2563 movq %rbx, 8 (%rdi)
2564 @@ -43,8 +38,6 @@ copy_page:
2565 movq %r11, 48 (%rdi)
2566 movq %r12, 56 (%rdi)
2567
2568 - prefetchw 5*64(%rdi)
2569 -
2570 leaq 64 (%rsi), %rsi
2571 leaq 64 (%rdi), %rdi
2572
2573 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/lib/csum-copy.S linux-2.6.3-amd64/arch/x86_64/lib/csum-copy.S
2574 --- linux-vanilla/arch/x86_64/lib/csum-copy.S 2003-09-28 10:54:54.000000000 +0200
2575 +++ linux-2.6.3-amd64/arch/x86_64/lib/csum-copy.S 2004-02-19 23:28:10.000000000 +0100
2576 @@ -59,15 +59,6 @@ csum_partial_copy_generic:
2577 cmpl $3*64,%edx
2578 jle .Lignore
2579
2580 - ignore
2581 - prefetch (%rdi)
2582 - ignore
2583 - prefetch 1*64(%rdi)
2584 - ignore
2585 - prefetchw (%rsi)
2586 - ignore
2587 - prefetchw 1*64(%rsi)
2588 -
2589 .Lignore:
2590 subq $7*8,%rsp
2591 movq %rbx,2*8(%rsp)
2592 @@ -115,7 +106,7 @@ csum_partial_copy_generic:
2593 movq 56(%rdi),%r13
2594
2595 ignore 2f
2596 - prefetch 5*64(%rdi)
2597 + prefetcht0 5*64(%rdi)
2598 2:
2599 adcq %rbx,%rax
2600 adcq %r8,%rax
2601 @@ -146,8 +137,6 @@ csum_partial_copy_generic:
2602 dest
2603 movq %r13,56(%rsi)
2604
2605 - ignore 3f
2606 - prefetchw 5*64(%rsi)
2607 3:
2608
2609 leaq 64(%rdi),%rdi
2610 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/mm/init.c linux-2.6.3-amd64/arch/x86_64/mm/init.c
2611 --- linux-vanilla/arch/x86_64/mm/init.c 2004-02-19 23:57:11.000000000 +0100
2612 +++ linux-2.6.3-amd64/arch/x86_64/mm/init.c 2004-02-19 23:28:10.000000000 +0100
2613 @@ -402,6 +402,13 @@ void __init mem_init(void)
2614 int codesize, reservedpages, datasize, initsize;
2615 int tmp;
2616
2617 +#ifdef CONFIG_SWIOTLB
2618 + if (!iommu_aperture && end_pfn >= 0xffffffff>>PAGE_SHIFT) {
2619 + swiotlb_init();
2620 + swiotlb = 1;
2621 + }
2622 +#endif
2623 +
2624 /* How many end-of-memory variables you have, grandma! */
2625 max_low_pfn = end_pfn;
2626 max_pfn = end_pfn;
2627 @@ -541,3 +548,32 @@ int kern_addr_valid(unsigned long addr)
2628 return 0;
2629 return pfn_valid(pte_pfn(*pte));
2630 }
2631 +
2632 +#ifdef CONFIG_SYSCTL
2633 +#include <linux/sysctl.h>
2634 +
2635 +extern int exception_trace, page_fault_trace;
2636 +
2637 +static ctl_table debug_table2[] = {
2638 + { 99, "exception-trace", &exception_trace, sizeof(int), 0644, NULL,
2639 + proc_dointvec },
2640 +#ifdef CONFIG_CHECKING
2641 + { 100, "page-fault-trace", &page_fault_trace, sizeof(int), 0644, NULL,
2642 + proc_dointvec },
2643 +#endif
2644 + { 0, }
2645 +};
2646 +
2647 +static ctl_table debug_root_table2[] = {
2648 + { .ctl_name = CTL_DEBUG, .procname = "debug", .mode = 0555,
2649 + .child = debug_table2 },
2650 + { 0 },
2651 +};
2652 +
2653 +static __init int x8664_sysctl_init(void)
2654 +{
2655 + register_sysctl_table(debug_root_table2, 1);
2656 + return 0;
2657 +}
2658 +__initcall(x8664_sysctl_init);
2659 +#endif
2660 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/mm/k8topology.c linux-2.6.3-amd64/arch/x86_64/mm/k8topology.c
2661 --- linux-vanilla/arch/x86_64/mm/k8topology.c 2004-02-05 08:10:25.000000000 +0100
2662 +++ linux-2.6.3-amd64/arch/x86_64/mm/k8topology.c 2004-02-19 23:28:10.000000000 +0100
2663 @@ -48,6 +48,7 @@ int __init k8_scan_nodes(unsigned long s
2664 int nodeid, i, nb;
2665 int found = 0;
2666 u32 reg;
2667 + int rr;
2668
2669 nb = find_northbridge();
2670 if (nb < 0)
2671 @@ -160,7 +161,7 @@ int __init k8_scan_nodes(unsigned long s
2672 mapping. To avoid this fill in the mapping for all possible
2673 CPUs, as the number of CPUs is not known yet.
2674 We round robin the existing nodes. */
2675 - int rr = 0;
2676 + rr = 0;
2677 for (i = 0; i < MAXNODE; i++) {
2678 if (nodes_present & (1UL<<i))
2679 continue;
2680 diff -burpN -X ../KDIFX linux-vanilla/arch/x86_64/oprofile/Makefile linux-2.6.3-amd64/arch/x86_64/oprofile/Makefile
2681 --- linux-vanilla/arch/x86_64/oprofile/Makefile 2003-09-28 10:54:54.000000000 +0200
2682 +++ linux-2.6.3-amd64/arch/x86_64/oprofile/Makefile 2004-02-19 23:28:10.000000000 +0100
2683 @@ -1,7 +1,6 @@
2684 #
2685 # oprofile for x86-64.
2686 -# Just reuse the one from i386. The Hammer performance counters
2687 -# are similar to Athlon.
2688 +# Just reuse the one from i386.
2689 #
2690
2691 obj-$(CONFIG_OPROFILE) += oprofile.o
2692 @@ -13,7 +12,8 @@ DRIVER_OBJS = $(addprefix ../../../drive
2693 timer_int.o )
2694
2695 OPROFILE-y := init.o
2696 -OPROFILE-$(CONFIG_X86_LOCAL_APIC) += nmi_int.o op_model_athlon.o
2697 +OPROFILE-$(CONFIG_X86_LOCAL_APIC) += nmi_int.o op_model_athlon.o op_model_p4.o \
2698 + op_model_ppro.o
2699 OPROFILE-$(CONFIG_X86_IO_APIC) += nmi_timer_int.o
2700
2701 oprofile-y = $(DRIVER_OBJS) $(addprefix ../../i386/oprofile/, $(OPROFILE-y))
2702 diff -burpN -X ../KDIFX linux-vanilla/drivers/char/agp/Kconfig linux-2.6.3-amd64/drivers/char/agp/Kconfig
2703 --- linux-vanilla/drivers/char/agp/Kconfig 2004-02-19 23:57:13.000000000 +0100
2704 +++ linux-2.6.3-amd64/drivers/char/agp/Kconfig 2004-02-19 23:28:07.000000000 +0100
2705 @@ -77,7 +77,7 @@ config AGP_AMD64
2706
2707 config AGP_INTEL
2708 tristate "Intel 440LX/BX/GX, I8xx and E7x05 chipset support"
2709 - depends on AGP && X86 && !X86_64
2710 + depends on AGP && X86
2711 help
2712 This option gives you AGP support for the GLX component of XFree86 4.x
2713 on Intel 440LX/BX/GX, 815, 820, 830, 840, 845, 850, 860, 875,
2714 diff -burpN -X ../KDIFX linux-vanilla/drivers/char/agp/amd64-agp.c linux-2.6.3-amd64/drivers/char/agp/amd64-agp.c
2715 --- linux-vanilla/drivers/char/agp/amd64-agp.c 2004-01-09 09:26:39.000000000 +0100
2716 +++ linux-2.6.3-amd64/drivers/char/agp/amd64-agp.c 2004-02-19 23:28:07.000000000 +0100
2717 @@ -16,11 +16,7 @@
2718 #include "agp.h"
2719
2720 /* Will need to be increased if AMD64 ever goes >8-way. */
2721 -#ifdef CONFIG_SMP
2722 #define MAX_HAMMER_GARTS 8
2723 -#else
2724 -#define MAX_HAMMER_GARTS 1
2725 -#endif
2726
2727 /* PTE bits. */
2728 #define GPTE_VALID 1
2729 @@ -35,6 +31,14 @@
2730 #define INVGART (1<<0)
2731 #define GARTPTEERR (1<<1)
2732
2733 +/* NVIDIA K8 registers */
2734 +#define NVIDIA_X86_64_0_APBASE 0x10
2735 +#define NVIDIA_X86_64_1_APBASE1 0x50
2736 +#define NVIDIA_X86_64_1_APLIMIT1 0x54
2737 +#define NVIDIA_X86_64_1_APSIZE 0xa8
2738 +#define NVIDIA_X86_64_1_APBASE2 0xd8
2739 +#define NVIDIA_X86_64_1_APLIMIT2 0xdc
2740 +
2741 static int nr_garts;
2742 static struct pci_dev * hammers[MAX_HAMMER_GARTS];
2743
2744 @@ -346,6 +350,10 @@ static __devinit int cache_nbs (struct p
2745 /* cache pci_devs of northbridges. */
2746 while ((loop_dev = pci_find_device(PCI_VENDOR_ID_AMD, 0x1103, loop_dev))
2747 != NULL) {
2748 + if (i == MAX_HAMMER_GARTS) {
2749 + printk(KERN_ERR PFX "Too many northbridges for AGP\n");
2750 + return -1;
2751 + }
2752 if (fix_northbridge(loop_dev, pdev, cap_ptr) < 0) {
2753 printk(KERN_ERR PFX "No usable aperture found.\n");
2754 #ifdef __x86_64__
2755 @@ -355,29 +363,111 @@ static __devinit int cache_nbs (struct p
2756 return -1;
2757 }
2758 hammers[i++] = loop_dev;
2759 + }
2760 nr_garts = i;
2761 -#ifdef CONFIG_SMP
2762 - if (i > MAX_HAMMER_GARTS) {
2763 - printk(KERN_ERR PFX "Too many northbridges for AGP\n");
2764 - return -1;
2765 + return i == 0 ? -1 : 0;
2766 +}
2767 +
2768 +/* Handle AMD 8151 quirks */
2769 +static void __devinit amd8151_init(struct pci_dev *pdev, struct agp_bridge_data *bridge)
2770 +
2771 +{
2772 + char *revstring;
2773 + u8 rev_id;
2774 +
2775 + pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
2776 + switch (rev_id) {
2777 + case 0x01: revstring="A0"; break;
2778 + case 0x02: revstring="A1"; break;
2779 + case 0x11: revstring="B0"; break;
2780 + case 0x12: revstring="B1"; break;
2781 + case 0x13: revstring="B2"; break;
2782 + default: revstring="??"; break;
2783 }
2784 -#else
2785 - /* Uniprocessor case, return after finding first bridge.
2786 - (There may be more, but in UP, we don't care). */
2787 - return 0;
2788 -#endif
2789 +
2790 + printk (KERN_INFO PFX "Detected AMD 8151 AGP Bridge rev %s\n", revstring);
2791 +
2792 + /*
2793 + * Work around errata.
2794 + * Chips before B2 stepping incorrectly reporting v3.5
2795 + */
2796 + if (rev_id < 0x13) {
2797 + printk (KERN_INFO PFX "Correcting AGP revision (reports 3.5, is really 3.0)\n");
2798 + bridge->major_version = 3;
2799 + bridge->minor_version = 0;
2800 }
2801 +}
2802
2803 - return i == 0 ? -1 : 0;
2804 +static struct aper_size_info_32 nforce3_sizes[5] =
2805 +{
2806 + {512, 131072, 7, 0x00000000 },
2807 + {256, 65536, 6, 0x00000008 },
2808 + {128, 32768, 5, 0x0000000C },
2809 + {64, 16384, 4, 0x0000000E },
2810 + {32, 8192, 3, 0x0000000F }
2811 +};
2812 +
2813 +/* Handle shadow device of the Nvidia NForce3 */
2814 +/* CHECK-ME original 2.4 version set up some IORRs. Check if that is needed. */
2815 +static int __devinit nforce3_agp_init(struct pci_dev *pdev)
2816 +{
2817 + u32 tmp, apbase, apbar, aplimit;
2818 + struct pci_dev *dev1;
2819 + int i;
2820 + unsigned size = amd64_fetch_size();
2821 +
2822 + printk(KERN_INFO PFX "Setting up Nforce3 AGP.\n");
2823 +
2824 + dev1 = pci_find_slot((unsigned int)pdev->bus->number, PCI_DEVFN(11, 0));
2825 + if (dev1 == NULL) {
2826 + printk(KERN_INFO PFX "agpgart: Detected an NVIDIA "
2827 + "nForce3 chipset, but could not find "
2828 + "the secondary device.\n");
2829 + return -ENODEV;
2830 + }
2831 +
2832 + for (i = 0; i < ARRAY_SIZE(nforce3_sizes); i++)
2833 + if (nforce3_sizes[i].size == size)
2834 + break;
2835 +
2836 + if (i == ARRAY_SIZE(nforce3_sizes)) {
2837 + printk(KERN_INFO PFX "No NForce3 size found for %d\n", size);
2838 + return -ENODEV;
2839 + }
2840 +
2841 + pci_read_config_dword(dev1, NVIDIA_X86_64_1_APSIZE, &tmp);
2842 + tmp &= ~(0xf);
2843 + tmp |= nforce3_sizes[i].size_value;
2844 + pci_write_config_dword(dev1, NVIDIA_X86_64_1_APSIZE, tmp);
2845 +
2846 + /* shadow x86-64 registers into NVIDIA registers */
2847 + pci_read_config_dword (hammers[0], AMD64_GARTAPERTUREBASE, &apbase);
2848 +
2849 + /* if x86-64 aperture base is beyond 4G, exit here */
2850 + if ( (apbase & 0x7fff) >> (32 - 25) )
2851 + return -ENODEV;
2852 +
2853 + apbase = (apbase & 0x7fff) << 25;
2854 +
2855 + pci_read_config_dword(pdev, NVIDIA_X86_64_0_APBASE, &apbar);
2856 + apbar &= ~PCI_BASE_ADDRESS_MEM_MASK;
2857 + apbar |= apbase;
2858 + pci_write_config_dword(pdev, NVIDIA_X86_64_0_APBASE, apbar);
2859 +
2860 + aplimit = apbase + (size * 1024 * 1024) - 1;
2861 + pci_write_config_dword(dev1, NVIDIA_X86_64_1_APBASE1, apbase);
2862 + pci_write_config_dword(dev1, NVIDIA_X86_64_1_APLIMIT1, aplimit);
2863 + pci_write_config_dword(dev1, NVIDIA_X86_64_1_APBASE2, apbase);
2864 + pci_write_config_dword(dev1, NVIDIA_X86_64_1_APLIMIT2, aplimit);
2865 +
2866 + return 0;
2867 }
2868
2869 static int __devinit agp_amd64_probe(struct pci_dev *pdev,
2870 const struct pci_device_id *ent)
2871 {
2872 struct agp_bridge_data *bridge;
2873 - u8 rev_id;
2874 u8 cap_ptr;
2875 - char *revstring=NULL;
2876
2877 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
2878 if (!cap_ptr)
2879 @@ -391,32 +481,7 @@ static int __devinit agp_amd64_probe(str
2880
2881 if (pdev->vendor == PCI_VENDOR_ID_AMD &&
2882 pdev->device == PCI_DEVICE_ID_AMD_8151_0) {
2883 -
2884 - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
2885 - switch (rev_id) {
2886 - case 0x01: revstring="A0";
2887 - break;
2888 - case 0x02: revstring="A1";
2889 - break;
2890 - case 0x11: revstring="B0";
2891 - break;
2892 - case 0x12: revstring="B1";
2893 - break;
2894 - case 0x13: revstring="B2";
2895 - break;
2896 - default: revstring="??";
2897 - break;
2898 - }
2899 - printk (KERN_INFO PFX "Detected AMD 8151 AGP Bridge rev %s\n", revstring);
2900 - /*
2901 - * Work around errata.
2902 - * Chips before B2 stepping incorrectly reporting v3.5
2903 - */
2904 - if (rev_id < 0x13) {
2905 - printk (KERN_INFO PFX "Correcting AGP revision (reports 3.5, is really 3.0)\n");
2906 - bridge->major_version = 3;
2907 - bridge->minor_version = 0;
2908 - }
2909 + amd8151_init(pdev, bridge);
2910 } else {
2911 printk(KERN_INFO PFX "Detected AGP bridge %x\n",
2912 pdev->devfn);
2913 @@ -434,6 +499,14 @@ static int __devinit agp_amd64_probe(str
2914 return -ENODEV;
2915 }
2916
2917 + if (pdev->vendor == PCI_VENDOR_ID_NVIDIA) {
2918 + int ret = nforce3_agp_init(pdev);
2919 + if (ret) {
2920 + agp_put_bridge(bridge);
2921 + return ret;
2922 + }
2923 + }
2924 +
2925 pci_set_drvdata(pdev, bridge);
2926 return agp_add_bridge(bridge);
2927 }
2928 @@ -478,8 +551,25 @@ static struct pci_device_id agp_amd64_pc
2929 {
2930 .class = (PCI_CLASS_BRIDGE_HOST << 8),
2931 .class_mask = ~0,
2932 - .vendor = PCI_VENDOR_ID_SI,
2933 - .device = PCI_DEVICE_ID_SI_755,
2934 + .vendor = PCI_VENDOR_ID_VIA,
2935 + .device = PCI_DEVICE_ID_VIA_8380_0,
2936 + .subvendor = PCI_ANY_ID,
2937 + .subdevice = PCI_ANY_ID,
2938 + },
2939 + /* NForce3 */
2940 + {
2941 + .class = (PCI_CLASS_BRIDGE_HOST << 8),
2942 + .class_mask = ~0,
2943 + .vendor = PCI_VENDOR_ID_NVIDIA,
2944 + .device = PCI_DEVICE_ID_NVIDIA_NFORCE3,
2945 + .subvendor = PCI_ANY_ID,
2946 + .subdevice = PCI_ANY_ID,
2947 + },
2948 + {
2949 + .class = (PCI_CLASS_BRIDGE_HOST << 8),
2950 + .class_mask = ~0,
2951 + .vendor = PCI_VENDOR_ID_NVIDIA,
2952 + .device = PCI_DEVICE_ID_NVIDIA_NFORCE3S,
2953 .subvendor = PCI_ANY_ID,
2954 .subdevice = PCI_ANY_ID,
2955 },
2956 diff -burpN -X ../KDIFX linux-vanilla/fs/binfmt_elf.c linux-2.6.3-amd64/fs/binfmt_elf.c
2957 --- linux-vanilla/fs/binfmt_elf.c 2004-02-19 23:57:37.000000000 +0100
2958 +++ linux-2.6.3-amd64/fs/binfmt_elf.c 2004-02-19 23:28:09.000000000 +0100
2959 @@ -198,6 +198,7 @@ create_elf_tables(struct linux_binprm *b
2960 NEW_AUX_ENT(AT_GID, (elf_addr_t) tsk->gid);
2961 NEW_AUX_ENT(AT_EGID, (elf_addr_t) tsk->egid);
2962 NEW_AUX_ENT(AT_SECURE, (elf_addr_t) security_bprm_secureexec(bprm));
2963 + NEW_AUX_ENT(AT_NUMCPUS, num_online_cpus());
2964 if (k_platform) {
2965 NEW_AUX_ENT(AT_PLATFORM, (elf_addr_t)(long)u_platform);
2966 }
2967 diff -burpN -X ../KDIFX linux-vanilla/fs/compat.c linux-2.6.3-amd64/fs/compat.c
2968 --- linux-vanilla/fs/compat.c 2004-01-09 09:26:47.000000000 +0100
2969 +++ linux-2.6.3-amd64/fs/compat.c 2004-02-19 23:28:09.000000000 +0100
2970 @@ -405,9 +405,11 @@ asmlinkage long compat_sys_ioctl(unsigne
2971 while (t && t->cmd != cmd)
2972 t = (struct ioctl_trans *)t->next;
2973 if (t) {
2974 - if (t->handler)
2975 + if (t->handler) {
2976 + lock_kernel();
2977 error = t->handler(fd, cmd, arg, filp);
2978 - else
2979 + unlock_kernel();
2980 + } else
2981 error = sys_ioctl(fd, cmd, arg);
2982 } else if (cmd >= SIOCDEVPRIVATE && cmd <= (SIOCDEVPRIVATE + 15)) {
2983 error = siocdevprivate_ioctl(fd, cmd, arg);
2984 diff -burpN -X ../KDIFX linux-vanilla/fs/exec.c linux-2.6.3-amd64/fs/exec.c
2985 --- linux-vanilla/fs/exec.c 2004-02-05 08:10:37.000000000 +0100
2986 +++ linux-2.6.3-amd64/fs/exec.c 2004-02-19 23:28:09.000000000 +0100
2987 @@ -1386,7 +1386,7 @@ int do_coredump(long signr, int exit_cod
2988 goto fail_unlock;
2989
2990 format_corename(corename, core_pattern, signr);
2991 - file = filp_open(corename, O_CREAT | 2 | O_NOFOLLOW, 0600);
2992 + file = filp_open(corename, O_CREAT | 2 | O_NOFOLLOW | O_LARGEFILE, 0600);
2993 if (IS_ERR(file))
2994 goto fail_unlock;
2995 inode = file->f_dentry->d_inode;
2996 diff -burpN -X ../KDIFX linux-vanilla/include/asm-x86_64/a.out.h linux-2.6.3-amd64/include/asm-x86_64/a.out.h
2997 --- linux-vanilla/include/asm-x86_64/a.out.h 2004-01-09 09:26:50.000000000 +0100
2998 +++ linux-2.6.3-amd64/include/asm-x86_64/a.out.h 2004-02-19 23:28:07.000000000 +0100
2999 @@ -20,9 +20,8 @@ struct exec
3000 #define N_SYMSIZE(a) ((a).a_syms)
3001
3002 #ifdef __KERNEL__
3003 -
3004 -#define STACK_TOP 0xc0000000
3005 -
3006 +#include <linux/thread_info.h>
3007 +#define STACK_TOP (test_thread_flag(TIF_IA32) ? IA32_PAGE_OFFSET : TASK_SIZE)
3008 #endif
3009
3010 #endif /* __A_OUT_GNU_H__ */
3011 diff -burpN -X ../KDIFX linux-vanilla/include/asm-x86_64/apic.h linux-2.6.3-amd64/include/asm-x86_64/apic.h
3012 --- linux-vanilla/include/asm-x86_64/apic.h 2004-02-19 23:57:46.000000000 +0100
3013 +++ linux-2.6.3-amd64/include/asm-x86_64/apic.h 2004-02-19 23:28:07.000000000 +0100
3014 @@ -87,6 +87,7 @@ extern void enable_APIC_timer(void);
3015 extern int check_nmi_watchdog (void);
3016
3017 extern unsigned int nmi_watchdog;
3018 +#define NMI_DEFAULT -1
3019 #define NMI_NONE 0
3020 #define NMI_IO_APIC 1
3021 #define NMI_LOCAL_APIC 2
3022 diff -burpN -X ../KDIFX linux-vanilla/include/asm-x86_64/cpufeature.h linux-2.6.3-amd64/include/asm-x86_64/cpufeature.h
3023 --- linux-vanilla/include/asm-x86_64/cpufeature.h 2003-09-23 08:03:57.000000000 +0200
3024 +++ linux-2.6.3-amd64/include/asm-x86_64/cpufeature.h 2004-02-19 23:28:07.000000000 +0100
3025 @@ -7,7 +7,7 @@
3026 #ifndef __ASM_X8664_CPUFEATURE_H
3027 #define __ASM_X8664_CPUFEATURE_H
3028
3029 -#define NCAPINTS 4 /* Currently we have 4 32-bit words worth of info */
3030 +#define NCAPINTS 5 /* Currently we have 4 32-bit words worth of info */
3031
3032 /* Intel-defined CPU features, CPUID level 0x00000001, word 0 */
3033 #define X86_FEATURE_FPU (0*32+ 0) /* Onboard FPU */
3034 @@ -37,6 +37,7 @@
3035 #define X86_FEATURE_XMM (0*32+25) /* Streaming SIMD Extensions */
3036 #define X86_FEATURE_XMM2 (0*32+26) /* Streaming SIMD Extensions-2 */
3037 #define X86_FEATURE_SELFSNOOP (0*32+27) /* CPU self snoop */
3038 +#define X86_FEATURE_HT (0*32+28) /* Hyper-Threading */
3039 #define X86_FEATURE_ACC (0*32+29) /* Automatic clock control */
3040 #define X86_FEATURE_IA64 (0*32+30) /* IA-64 processor */
3041
3042 @@ -61,6 +62,10 @@
3043 #define X86_FEATURE_CENTAUR_MCR (3*32+ 3) /* Centaur MCRs (= MTRRs) */
3044 #define X86_FEATURE_K8_C (3*32+ 4) /* C stepping K8 */
3045
3046 +/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
3047 +#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
3048 +#define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */
3049 +
3050 #define cpu_has(c, bit) test_bit(bit, (c)->x86_capability)
3051 #define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability)
3052
3053 @@ -76,7 +81,7 @@
3054 #define cpu_has_mmx 1
3055 #define cpu_has_fxsr 1
3056 #define cpu_has_xmm 1
3057 -#define cpu_has_ht 0 /* you need to report the support from i386. sorry */
3058 +#define cpu_has_ht boot_cpu_has(X86_FEATURE_HT)
3059 #define cpu_has_mp 1 /* XXX */
3060 #define cpu_has_k6_mtrr 0
3061 #define cpu_has_cyrix_arr 0
3062 diff -burpN -X ../KDIFX linux-vanilla/include/asm-x86_64/hw_irq.h linux-2.6.3-amd64/include/asm-x86_64/hw_irq.h
3063 --- linux-vanilla/include/asm-x86_64/hw_irq.h 2004-02-19 23:57:46.000000000 +0100
3064 +++ linux-2.6.3-amd64/include/asm-x86_64/hw_irq.h 2004-02-19 23:28:07.000000000 +0100
3065 @@ -132,7 +132,7 @@ static inline void x86_do_profile (struc
3066 {
3067 unsigned long rip;
3068 extern unsigned long prof_cpu_mask;
3069 - extern char _stext[];
3070 + extern char _stext;
3071
3072 profile_hook(regs);
3073
3074 diff -burpN -X ../KDIFX linux-vanilla/include/asm-x86_64/mce.h linux-2.6.3-amd64/include/asm-x86_64/mce.h
3075 --- linux-vanilla/include/asm-x86_64/mce.h 1970-01-01 01:00:00.000000000 +0100
3076 +++ linux-2.6.3-amd64/include/asm-x86_64/mce.h 2004-02-19 23:28:07.000000000 +0100
3077 @@ -0,0 +1,67 @@
3078 +#ifndef _ASM_MCE_H
3079 +#define _ASM_MCE_H 1
3080 +
3081 +#include <asm/ioctls.h>
3082 +#include <asm/types.h>
3083 +
3084 +/*
3085 + * Machine Check support for x86
3086 + */
3087 +
3088 +#define MCG_CTL_P (1UL<<8) /* MCG_CAP register available */
3089 +
3090 +#define MCG_STATUS_RIPV (1UL<<0) /* restart ip valid */
3091 +#define MCG_STATUS_EIPV (1UL<<1) /* eip points to correct instruction */
3092 +#define MCG_STATUS_MCIP (1UL<<2) /* machine check in progress */
3093 +
3094 +#define MCI_STATUS_VAL (1UL<<63) /* valid error */
3095 +#define MCI_STATUS_OVER (1UL<<62) /* previous errors lost */
3096 +#define MCI_STATUS_UC (1UL<<61) /* uncorrected error */
3097 +#define MCI_STATUS_EN (1UL<<60) /* error enabled */
3098 +#define MCI_STATUS_MISCV (1UL<<59) /* misc error reg. valid */
3099 +#define MCI_STATUS_ADDRV (1UL<<58) /* addr reg. valid */
3100 +#define MCI_STATUS_PCC (1UL<<57) /* processor context corrupt */
3101 +
3102 +/* Fields are zero when not available */
3103 +struct mce {
3104 + __u64 status;
3105 + __u64 misc;
3106 + __u64 addr;
3107 + __u64 mcgstatus;
3108 + __u64 rip;
3109 + __u64 tsc; /* cpu time stamp counter */
3110 + __u64 res1; /* for future extension */
3111 + __u64 res2; /* dito. */
3112 + __u8 cs; /* code segment */
3113 + __u8 bank; /* machine check bank */
3114 + __u8 cpu; /* cpu that raised the error */
3115 + __u8 finished; /* entry is valid */
3116 + __u32 pad;
3117 +};
3118 +
3119 +/*
3120 + * This structure contains all data related to the MCE log.
3121 + * Also carries a signature to make it easier to find from external debugging tools.
3122 + * Each entry is only valid when its finished flag is set.
3123 + */
3124 +
3125 +#define MCE_LOG_LEN 32
3126 +
3127 +struct mce_log {
3128 + char signature[12]; /* "MACHINECHECK" */
3129 + unsigned len; /* = MCE_LOG_LEN */
3130 + unsigned next;
3131 + unsigned flags;
3132 + unsigned pad0;
3133 + struct mce entry[MCE_LOG_LEN];
3134 +};
3135 +
3136 +#define MCE_OVERFLOW 0 /* bit 0 in flags means overflow */
3137 +
3138 +#define MCE_LOG_SIGNATURE "MACHINECHECK"
3139 +
3140 +#define MCE_GET_RECORD_LEN _IOR('M', 1, int)
3141 +#define MCE_GET_LOG_LEN _IOR('M', 2, int)
3142 +#define MCE_GETCLEAR_FLAGS _IOR('M', 3, int)
3143 +
3144 +#endif
3145 diff -burpN -X ../KDIFX linux-vanilla/include/asm-x86_64/msr.h linux-2.6.3-amd64/include/asm-x86_64/msr.h
3146 --- linux-vanilla/include/asm-x86_64/msr.h 2003-12-18 13:50:25.000000000 +0100
3147 +++ linux-2.6.3-amd64/include/asm-x86_64/msr.h 2004-02-19 23:28:07.000000000 +0100
3148 @@ -121,6 +121,9 @@ extern inline unsigned int cpuid_edx(uns
3149 return edx;
3150 }
3151
3152 +#define MSR_IA32_UCODE_WRITE 0x79
3153 +#define MSR_IA32_UCODE_REV 0x8b
3154 +
3155
3156 #endif
3157
3158 @@ -243,4 +246,123 @@ extern inline unsigned int cpuid_edx(uns
3159 #define MSR_IA32_APICBASE_ENABLE (1<<11)
3160 #define MSR_IA32_APICBASE_BASE (0xfffff<<12)
3161
3162 +/* P4/Xeon+ specific */
3163 +#define MSR_IA32_MCG_EAX 0x180
3164 +#define MSR_IA32_MCG_EBX 0x181
3165 +#define MSR_IA32_MCG_ECX 0x182
3166 +#define MSR_IA32_MCG_EDX 0x183
3167 +#define MSR_IA32_MCG_ESI 0x184
3168 +#define MSR_IA32_MCG_EDI 0x185
3169 +#define MSR_IA32_MCG_EBP 0x186
3170 +#define MSR_IA32_MCG_ESP 0x187
3171 +#define MSR_IA32_MCG_EFLAGS 0x188
3172 +#define MSR_IA32_MCG_EIP 0x189
3173 +#define MSR_IA32_MCG_RESERVED 0x18A
3174 +
3175 +#define MSR_P6_EVNTSEL0 0x186
3176 +#define MSR_P6_EVNTSEL1 0x187
3177 +
3178 +#define MSR_IA32_PERF_STATUS 0x198
3179 +#define MSR_IA32_PERF_CTL 0x199
3180 +
3181 +#define MSR_IA32_THERM_CONTROL 0x19a
3182 +#define MSR_IA32_THERM_INTERRUPT 0x19b
3183 +#define MSR_IA32_THERM_STATUS 0x19c
3184 +#define MSR_IA32_MISC_ENABLE 0x1a0
3185 +
3186 +#define MSR_IA32_DEBUGCTLMSR 0x1d9
3187 +#define MSR_IA32_LASTBRANCHFROMIP 0x1db
3188 +#define MSR_IA32_LASTBRANCHTOIP 0x1dc
3189 +#define MSR_IA32_LASTINTFROMIP 0x1dd
3190 +#define MSR_IA32_LASTINTTOIP 0x1de
3191 +
3192 +#define MSR_IA32_MC0_CTL 0x400
3193 +#define MSR_IA32_MC0_STATUS 0x401
3194 +#define MSR_IA32_MC0_ADDR 0x402
3195 +#define MSR_IA32_MC0_MISC 0x403
3196 +
3197 +/* Pentium IV performance counter MSRs */
3198 +#define MSR_P4_BPU_PERFCTR0 0x300
3199 +#define MSR_P4_BPU_PERFCTR1 0x301
3200 +#define MSR_P4_BPU_PERFCTR2 0x302
3201 +#define MSR_P4_BPU_PERFCTR3 0x303
3202 +#define MSR_P4_MS_PERFCTR0 0x304
3203 +#define MSR_P4_MS_PERFCTR1 0x305
3204 +#define MSR_P4_MS_PERFCTR2 0x306
3205 +#define MSR_P4_MS_PERFCTR3 0x307
3206 +#define MSR_P4_FLAME_PERFCTR0 0x308
3207 +#define MSR_P4_FLAME_PERFCTR1 0x309
3208 +#define MSR_P4_FLAME_PERFCTR2 0x30a
3209 +#define MSR_P4_FLAME_PERFCTR3 0x30b
3210 +#define MSR_P4_IQ_PERFCTR0 0x30c
3211 +#define MSR_P4_IQ_PERFCTR1 0x30d
3212 +#define MSR_P4_IQ_PERFCTR2 0x30e
3213 +#define MSR_P4_IQ_PERFCTR3 0x30f
3214 +#define MSR_P4_IQ_PERFCTR4 0x310
3215 +#define MSR_P4_IQ_PERFCTR5 0x311
3216 +#define MSR_P4_BPU_CCCR0 0x360
3217 +#define MSR_P4_BPU_CCCR1 0x361
3218 +#define MSR_P4_BPU_CCCR2 0x362
3219 +#define MSR_P4_BPU_CCCR3 0x363
3220 +#define MSR_P4_MS_CCCR0 0x364
3221 +#define MSR_P4_MS_CCCR1 0x365
3222 +#define MSR_P4_MS_CCCR2 0x366
3223 +#define MSR_P4_MS_CCCR3 0x367
3224 +#define MSR_P4_FLAME_CCCR0 0x368
3225 +#define MSR_P4_FLAME_CCCR1 0x369
3226 +#define MSR_P4_FLAME_CCCR2 0x36a
3227 +#define MSR_P4_FLAME_CCCR3 0x36b
3228 +#define MSR_P4_IQ_CCCR0 0x36c
3229 +#define MSR_P4_IQ_CCCR1 0x36d
3230 +#define MSR_P4_IQ_CCCR2 0x36e
3231 +#define MSR_P4_IQ_CCCR3 0x36f
3232 +#define MSR_P4_IQ_CCCR4 0x370
3233 +#define MSR_P4_IQ_CCCR5 0x371
3234 +#define MSR_P4_ALF_ESCR0 0x3ca
3235 +#define MSR_P4_ALF_ESCR1 0x3cb
3236 +#define MSR_P4_BPU_ESCR0 0x3b2
3237 +#define MSR_P4_BPU_ESCR1 0x3b3
3238 +#define MSR_P4_BSU_ESCR0 0x3a0
3239 +#define MSR_P4_BSU_ESCR1 0x3a1
3240 +#define MSR_P4_CRU_ESCR0 0x3b8
3241 +#define MSR_P4_CRU_ESCR1 0x3b9
3242 +#define MSR_P4_CRU_ESCR2 0x3cc
3243 +#define MSR_P4_CRU_ESCR3 0x3cd
3244 +#define MSR_P4_CRU_ESCR4 0x3e0
3245 +#define MSR_P4_CRU_ESCR5 0x3e1
3246 +#define MSR_P4_DAC_ESCR0 0x3a8
3247 +#define MSR_P4_DAC_ESCR1 0x3a9
3248 +#define MSR_P4_FIRM_ESCR0 0x3a4
3249 +#define MSR_P4_FIRM_ESCR1 0x3a5
3250 +#define MSR_P4_FLAME_ESCR0 0x3a6
3251 +#define MSR_P4_FLAME_ESCR1 0x3a7
3252 +#define MSR_P4_FSB_ESCR0 0x3a2
3253 +#define MSR_P4_FSB_ESCR1 0x3a3
3254 +#define MSR_P4_IQ_ESCR0 0x3ba
3255 +#define MSR_P4_IQ_ESCR1 0x3bb
3256 +#define MSR_P4_IS_ESCR0 0x3b4
3257 +#define MSR_P4_IS_ESCR1 0x3b5
3258 +#define MSR_P4_ITLB_ESCR0 0x3b6
3259 +#define MSR_P4_ITLB_ESCR1 0x3b7
3260 +#define MSR_P4_IX_ESCR0 0x3c8
3261 +#define MSR_P4_IX_ESCR1 0x3c9
3262 +#define MSR_P4_MOB_ESCR0 0x3aa
3263 +#define MSR_P4_MOB_ESCR1 0x3ab
3264 +#define MSR_P4_MS_ESCR0 0x3c0
3265 +#define MSR_P4_MS_ESCR1 0x3c1
3266 +#define MSR_P4_PMH_ESCR0 0x3ac
3267 +#define MSR_P4_PMH_ESCR1 0x3ad
3268 +#define MSR_P4_RAT_ESCR0 0x3bc
3269 +#define MSR_P4_RAT_ESCR1 0x3bd
3270 +#define MSR_P4_SAAT_ESCR0 0x3ae
3271 +#define MSR_P4_SAAT_ESCR1 0x3af
3272 +#define MSR_P4_SSU_ESCR0 0x3be
3273 +#define MSR_P4_SSU_ESCR1 0x3bf /* guess: not defined in manual */
3274 +#define MSR_P4_TBPU_ESCR0 0x3c2
3275 +#define MSR_P4_TBPU_ESCR1 0x3c3
3276 +#define MSR_P4_TC_ESCR0 0x3c4
3277 +#define MSR_P4_TC_ESCR1 0x3c5
3278 +#define MSR_P4_U2L_ESCR0 0x3b0
3279 +#define MSR_P4_U2L_ESCR1 0x3b1
3280 +
3281 #endif
3282 diff -burpN -X ../KDIFX linux-vanilla/include/asm-x86_64/pci-direct.h linux-2.6.3-amd64/include/asm-x86_64/pci-direct.h
3283 --- linux-vanilla/include/asm-x86_64/pci-direct.h 2003-08-23 01:53:08.000000000 +0200
3284 +++ linux-2.6.3-amd64/include/asm-x86_64/pci-direct.h 2004-02-19 23:28:07.000000000 +0100
3285 @@ -28,7 +28,7 @@ static inline u8 read_pci_config_byte(u8
3286 return v;
3287 }
3288
3289 -static inline u8 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset)
3290 +static inline u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset)
3291 {
3292 u16 v;
3293 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8);
3294 diff -burpN -X ../KDIFX linux-vanilla/include/asm-x86_64/pci.h linux-2.6.3-amd64/include/asm-x86_64/pci.h
3295 --- linux-vanilla/include/asm-x86_64/pci.h 2004-02-19 23:57:46.000000000 +0100
3296 +++ linux-2.6.3-amd64/include/asm-x86_64/pci.h 2004-02-19 23:28:07.000000000 +0100
3297 @@ -72,6 +72,23 @@ extern void *pci_alloc_consistent(struct
3298 extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
3299 void *vaddr, dma_addr_t dma_handle);
3300
3301 +#ifdef CONFIG_SWIOTLB
3302 +extern int swiotlb;
3303 +extern dma_addr_t swiotlb_map_single (struct device *hwdev, void *ptr, size_t size,
3304 + int dir);
3305 +extern void swiotlb_unmap_single (struct device *hwdev, dma_addr_t dev_addr,
3306 + size_t size, int dir);
3307 +extern void swiotlb_sync_single (struct device *hwdev, dma_addr_t dev_addr,
3308 + size_t size, int dir);
3309 +extern void swiotlb_sync_sg (struct device *hwdev, struct scatterlist *sg, int nelems,
3310 + int dir);
3311 +extern int swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg,
3312 + int nents, int direction);
3313 +extern void swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg,
3314 + int nents, int direction);
3315 +
3316 +#endif
3317 +
3318 #ifdef CONFIG_GART_IOMMU
3319
3320 /* Map a single buffer of the indicated size for DMA in streaming mode.
3321 @@ -113,6 +130,13 @@ static inline void pci_dma_sync_single(s
3322 size_t size, int direction)
3323 {
3324 BUG_ON(direction == PCI_DMA_NONE);
3325 +
3326 +#ifdef CONFIG_SWIOTLB
3327 + if (swiotlb)
3328 + return swiotlb_sync_single(&hwdev->dev,dma_handle,size,direction);
3329 +#endif
3330 +
3331 + flush_write_buffers();
3332 }
3333
3334 static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
3335 @@ -120,6 +144,12 @@ static inline void pci_dma_sync_sg(struc
3336 int nelems, int direction)
3337 {
3338 BUG_ON(direction == PCI_DMA_NONE);
3339 +
3340 +#ifdef CONFIG_SWIOTLB
3341 + if (swiotlb)
3342 + return swiotlb_sync_sg(&hwdev->dev,sg,nelems,direction);
3343 +#endif
3344 + flush_write_buffers();
3345 }
3346
3347 /* The PCI address space does equal the physical memory
3348 @@ -272,4 +302,6 @@ static inline void pcibios_add_platform_
3349 /* generic pci stuff */
3350 #include <asm-generic/pci.h>
3351
3352 +#include <linux/dma-mapping.h>
3353 +
3354 #endif /* __x8664_PCI_H */
3355 diff -burpN -X ../KDIFX linux-vanilla/include/asm-x86_64/pgtable.h linux-2.6.3-amd64/include/asm-x86_64/pgtable.h
3356 --- linux-vanilla/include/asm-x86_64/pgtable.h 2004-02-05 08:10:43.000000000 +0100
3357 +++ linux-2.6.3-amd64/include/asm-x86_64/pgtable.h 2004-02-19 23:28:07.000000000 +0100
3358 @@ -36,7 +36,7 @@ extern unsigned long pgkern_mask;
3359 * ZERO_PAGE is a global shared page that is always zero: used
3360 * for zero-mapped memory areas etc..
3361 */
3362 -extern unsigned long empty_zero_page[1024];
3363 +extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
3364 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
3365
3366 #define PML4_SHIFT 39
3367 diff -burpN -X ../KDIFX linux-vanilla/include/asm-x86_64/processor.h linux-2.6.3-amd64/include/asm-x86_64/processor.h
3368 --- linux-vanilla/include/asm-x86_64/processor.h 2004-02-05 08:10:43.000000000 +0100
3369 +++ linux-2.6.3-amd64/include/asm-x86_64/processor.h 2004-02-19 23:28:07.000000000 +0100
3370 @@ -303,6 +303,67 @@ extern unsigned long get_wchan(struct ta
3371 (((struct pt_regs *)(tsk->thread.rsp0 - sizeof(struct pt_regs)))->rip)
3372 #define KSTK_ESP(tsk) -1 /* sorry. doesn't work for syscall. */
3373
3374 +
3375 +struct microcode_header {
3376 + unsigned int hdrver;
3377 + unsigned int rev;
3378 + unsigned int date;
3379 + unsigned int sig;
3380 + unsigned int cksum;
3381 + unsigned int ldrver;
3382 + unsigned int pf;
3383 + unsigned int datasize;
3384 + unsigned int totalsize;
3385 + unsigned int reserved[3];
3386 +};
3387 +
3388 +struct microcode {
3389 + struct microcode_header hdr;
3390 + unsigned int bits[0];
3391 +};
3392 +
3393 +typedef struct microcode microcode_t;
3394 +typedef struct microcode_header microcode_header_t;
3395 +
3396 +/* microcode format is extended from prescott processors */
3397 +struct extended_signature {
3398 + unsigned int sig;
3399 + unsigned int pf;
3400 + unsigned int cksum;
3401 +};
3402 +
3403 +struct extended_sigtable {
3404 + unsigned int count;
3405 + unsigned int cksum;
3406 + unsigned int reserved[3];
3407 + struct extended_signature sigs[0];
3408 +};
3409 +
3410 +/* '6' because it used to be for P6 only (but now covers Pentium 4 as well) */
3411 +#define MICROCODE_IOCFREE _IO('6',0)
3412 +
3413 +
3414 +#define ASM_NOP1 K8_NOP1
3415 +#define ASM_NOP2 K8_NOP2
3416 +#define ASM_NOP3 K8_NOP3
3417 +#define ASM_NOP4 K8_NOP4
3418 +#define ASM_NOP5 K8_NOP5
3419 +#define ASM_NOP6 K8_NOP6
3420 +#define ASM_NOP7 K8_NOP7
3421 +#define ASM_NOP8 K8_NOP8
3422 +
3423 +/* Opteron nops */
3424 +#define K8_NOP1 ".byte 0x90\n"
3425 +#define K8_NOP2 ".byte 0x66,0x90\n"
3426 +#define K8_NOP3 ".byte 0x66,0x66,0x90\n"
3427 +#define K8_NOP4 ".byte 0x66,0x66,0x66,0x90\n"
3428 +#define K8_NOP5 K8_NOP3 K8_NOP2
3429 +#define K8_NOP6 K8_NOP3 K8_NOP3
3430 +#define K8_NOP7 K8_NOP4 K8_NOP3
3431 +#define K8_NOP8 K8_NOP4 K8_NOP4
3432 +
3433 +#define ASM_NOP_MAX 8
3434 +
3435 /* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
3436 extern inline void rep_nop(void)
3437 {
3438 @@ -318,31 +379,25 @@ extern inline void sync_core(void)
3439
3440 #define cpu_has_fpu 1
3441
3442 -/* Some early Opteron versions incorrectly fault on prefetch (errata #91).
3443 - If this happens just jump back. */
3444 #define ARCH_HAS_PREFETCH
3445 static inline void prefetch(void *x)
3446 {
3447 - asm volatile("2: prefetcht0 %0\n1:\t"
3448 - ".section __ex_table,\"a\"\n\t"
3449 - " .align 8\n\t"
3450 - " .quad 2b,1b\n\t"
3451 - ".previous" :: "m" (*(unsigned long *)x));
3452 + asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
3453 }
3454
3455 -#define ARCH_HAS_PREFETCHW
3456 +#define ARCH_HAS_PREFETCHW 1
3457 static inline void prefetchw(void *x)
3458 {
3459 - asm volatile("2: prefetchw %0\n1:\t"
3460 - ".section __ex_table,\"a\"\n\t"
3461 - " .align 8\n\t"
3462 - " .quad 2b,1b\n\t"
3463 - ".previous" :: "m" (*(unsigned long *)x));
3464 + alternative_input(ASM_NOP4,
3465 + "prefetchw (%1)",
3466 + X86_FEATURE_3DNOW,
3467 + "r" (x));
3468 }
3469
3470 -#define ARCH_HAS_SPINLOCK_PREFETCH
3471 +#define ARCH_HAS_SPINLOCK_PREFETCH 1
3472
3473 #define spin_lock_prefetch(x) prefetchw(x)
3474 +
3475 #define cpu_relax() rep_nop()
3476
3477 /*
3478 @@ -372,6 +427,23 @@ static inline void prefetchw(void *x)
3479 outb((data), 0x23); \
3480 } while (0)
3481
3482 +static inline void __monitor(const void *eax, unsigned long ecx,
3483 + unsigned long edx)
3484 +{
3485 + /* "monitor %eax,%ecx,%edx;" */
3486 + asm volatile(
3487 + ".byte 0x0f,0x01,0xc8;"
3488 + : :"a" (eax), "c" (ecx), "d"(edx));
3489 +}
3490 +
3491 +static inline void __mwait(unsigned long eax, unsigned long ecx)
3492 +{
3493 + /* "mwait %eax,%ecx;" */
3494 + asm volatile(
3495 + ".byte 0x0f,0x01,0xc9;"
3496 + : :"a" (eax), "c" (ecx));
3497 +}
3498 +
3499 #define stack_current() \
3500 ({ \
3501 struct thread_info *ti; \
3502 @@ -379,25 +451,4 @@ static inline void prefetchw(void *x)
3503 ti->task; \
3504 })
3505
3506 -#define ASM_NOP1 K8_NOP1
3507 -#define ASM_NOP2 K8_NOP2
3508 -#define ASM_NOP3 K8_NOP3
3509 -#define ASM_NOP4 K8_NOP4
3510 -#define ASM_NOP5 K8_NOP5
3511 -#define ASM_NOP6 K8_NOP6
3512 -#define ASM_NOP7 K8_NOP7
3513 -#define ASM_NOP8 K8_NOP8
3514 -
3515 -/* Opteron nops */
3516 -#define K8_NOP1 ".byte 0x90\n"
3517 -#define K8_NOP2 ".byte 0x66,0x90\n"
3518 -#define K8_NOP3 ".byte 0x66,0x66,0x90\n"
3519 -#define K8_NOP4 ".byte 0x66,0x66,0x66,0x90\n"
3520 -#define K8_NOP5 K8_NOP3 K8_NOP2
3521 -#define K8_NOP6 K8_NOP3 K8_NOP3
3522 -#define K8_NOP7 K8_NOP4 K8_NOP3
3523 -#define K8_NOP8 K8_NOP4 K8_NOP4
3524 -
3525 -#define ASM_NOP_MAX 8
3526 -
3527 #endif /* __ASM_X86_64_PROCESSOR_H */
3528 diff -burpN -X ../KDIFX linux-vanilla/include/asm-x86_64/proto.h linux-2.6.3-amd64/include/asm-x86_64/proto.h
3529 --- linux-vanilla/include/asm-x86_64/proto.h 2004-02-05 08:10:43.000000000 +0100
3530 +++ linux-2.6.3-amd64/include/asm-x86_64/proto.h 2004-02-19 23:28:07.000000000 +0100
3531 @@ -76,6 +76,10 @@ extern void check_ioapic(void);
3532
3533 extern int unhandled_signal(struct task_struct *tsk, int sig);
3534
3535 +extern void select_idle_routine(const struct cpuinfo_x86 *c);
3536 +extern void swiotlb_init(void);
3537 +extern int swiotlb;
3538 +
3539 extern unsigned long max_mapnr;
3540 extern unsigned long end_pfn;
3541 extern unsigned long table_start, table_end;
3542 @@ -92,6 +96,7 @@ extern int acpi_disabled;
3543
3544 extern int fallback_aper_order;
3545 extern int fallback_aper_force;
3546 +extern int iommu_aperture;
3547
3548 extern void smp_local_timer_interrupt(struct pt_regs * regs);
3549
3550 diff -burpN -X ../KDIFX linux-vanilla/include/asm-x86_64/segment.h linux-2.6.3-amd64/include/asm-x86_64/segment.h
3551 --- linux-vanilla/include/asm-x86_64/segment.h 2003-08-23 02:00:32.000000000 +0200
3552 +++ linux-2.6.3-amd64/include/asm-x86_64/segment.h 2004-02-19 23:28:07.000000000 +0100
3553 @@ -1,6 +1,8 @@
3554 #ifndef _ASM_SEGMENT_H
3555 #define _ASM_SEGMENT_H
3556
3557 +#include <asm/cache.h>
3558 +
3559 #define __KERNEL_CS 0x10
3560 #define __KERNEL_DS 0x18
3561
3562 diff -burpN -X ../KDIFX linux-vanilla/include/asm-x86_64/smp.h linux-2.6.3-amd64/include/asm-x86_64/smp.h
3563 --- linux-vanilla/include/asm-x86_64/smp.h 2004-02-05 08:10:43.000000000 +0100
3564 +++ linux-2.6.3-amd64/include/asm-x86_64/smp.h 2004-02-19 23:28:07.000000000 +0100
3565 @@ -39,6 +39,7 @@ extern void smp_alloc_memory(void);
3566 extern cpumask_t cpu_online_map;
3567 extern volatile unsigned long smp_invalidate_needed;
3568 extern int pic_mode;
3569 +extern int smp_num_siblings;
3570 extern void smp_flush_tlb(void);
3571 extern void smp_message_irq(int cpl, void *dev_id, struct pt_regs *regs);
3572 extern void smp_send_reschedule(int cpu);
3573 @@ -46,7 +47,7 @@ extern void smp_invalidate_rcv(void); /
3574 extern void (*mtrr_hook) (void);
3575 extern void zap_low_mappings(void);
3576 void smp_stop_cpu(void);
3577 -
3578 +extern int cpu_sibling_map[];
3579
3580 #define SMP_TRAMPOLINE_BASE 0x6000
3581
3582 diff -burpN -X ../KDIFX linux-vanilla/include/asm-x86_64/system.h linux-2.6.3-amd64/include/asm-x86_64/system.h
3583 --- linux-vanilla/include/asm-x86_64/system.h 2004-02-05 08:10:43.000000000 +0100
3584 +++ linux-2.6.3-amd64/include/asm-x86_64/system.h 2004-02-19 23:28:07.000000000 +0100
3585 @@ -88,6 +88,56 @@ struct alt_instr {
3586 #endif
3587
3588 /*
3589 + * Alternative instructions for different CPU types or capabilities.
3590 + *
3591 + * This allows to use optimized instructions even on generic binary
3592 + * kernels.
3593 + *
3594 + * length of oldinstr must be longer or equal the length of newinstr
3595 + * It can be padded with nops as needed.
3596 + *
3597 + * For non barrier like inlines please define new variants
3598 + * without volatile and memory clobber.
3599 + */
3600 +#define alternative(oldinstr, newinstr, feature) \
3601 + asm volatile ("661:\n\t" oldinstr "\n662:\n" \
3602 + ".section .altinstructions,\"a\"\n" \
3603 + " .align 8\n" \
3604 + " .quad 661b\n" /* label */ \
3605 + " .quad 663f\n" /* new instruction */ \
3606 + " .byte %c0\n" /* feature bit */ \
3607 + " .byte 662b-661b\n" /* sourcelen */ \
3608 + " .byte 664f-663f\n" /* replacementlen */ \
3609 + ".previous\n" \
3610 + ".section .altinstr_replacement,\"ax\"\n" \
3611 + "663:\n\t" newinstr "\n664:\n" /* replacement */ \
3612 + ".previous" :: "i" (feature) : "memory")
3613 +
3614 +/*
3615 + * Alternative inline assembly with input.
3616 + *
3617 + * Pecularities:
3618 + * No memory clobber here.
3619 + * Argument numbers start with 1.
3620 + * Best is to use constraints that are fixed size (like (%1) ... "r")
3621 + * If you use variable sized constraints like "m" or "g" in the
3622 + * replacement maake sure to pad to the worst case length.
3623 + */
3624 +#define alternative_input(oldinstr, newinstr, feature, input) \
3625 + asm volatile ("661:\n\t" oldinstr "\n662:\n" \
3626 + ".section .altinstructions,\"a\"\n" \
3627 + " .align 8\n" \
3628 + " .quad 661b\n" /* label */ \
3629 + " .quad 663f\n" /* new instruction */ \
3630 + " .byte %c0\n" /* feature bit */ \
3631 + " .byte 662b-661b\n" /* sourcelen */ \
3632 + " .byte 664f-663f\n" /* replacementlen */ \
3633 + ".previous\n" \
3634 + ".section .altinstr_replacement,\"ax\"\n" \
3635 + "663:\n\t" newinstr "\n664:\n" /* replacement */ \
3636 + ".previous" :: "i" (feature), input)
3637 +
3638 +/*
3639 * Clear and set 'TS' bit respectively
3640 */
3641 #define clts() __asm__ __volatile__ ("clts")
3642 diff -burpN -X ../KDIFX linux-vanilla/include/linux/elf.h linux-2.6.3-amd64/include/linux/elf.h
3643 --- linux-vanilla/include/linux/elf.h 2003-10-25 22:57:42.000000000 +0200
3644 +++ linux-2.6.3-amd64/include/linux/elf.h 2004-02-19 23:28:07.000000000 +0100
3645 @@ -164,6 +164,7 @@ typedef __s64 Elf64_Sxword;
3646 #define AT_CLKTCK 17 /* frequency at which times() increments */
3647
3648 #define AT_SECURE 23 /* secure mode boolean */
3649 +#define AT_NUMCPUS 24 /* number of running cpus */
3650
3651 typedef struct dynamic{
3652 Elf32_Sword d_tag;
3653 diff -burpN -X ../KDIFX linux-vanilla/include/linux/pci_ids.h linux-2.6.3-amd64/include/linux/pci_ids.h
3654 --- linux-vanilla/include/linux/pci_ids.h 2004-02-19 23:57:48.000000000 +0100
3655 +++ linux-2.6.3-amd64/include/linux/pci_ids.h 2004-02-19 23:28:07.000000000 +0100
3656 @@ -1050,6 +1050,8 @@
3657 #define PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE 0x0085
3658 #define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA 0x008e
3659 #define PCI_DEVICE_ID_NVIDIA_ITNT2 0x00A0
3660 +#define PCI_DEVICE_ID_NVIDIA_NFORCE3 0x00d1
3661 +#define PCI_DEVICE_ID_NVIDIA_NFORCE3S 0x00e1
3662 #define PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE 0x00d5
3663 #define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA 0x00e3
3664 #define PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE 0x00e5
3665 diff -burpN -X ../KDIFX linux-vanilla/scripts/kconfig/Makefile linux-2.6.3-amd64/scripts/kconfig/Makefile
3666 --- linux-vanilla/scripts/kconfig/Makefile 2003-09-28 10:55:19.000000000 +0200
3667 +++ linux-2.6.3-amd64/scripts/kconfig/Makefile 2004-02-19 23:28:10.000000000 +0100
3668 @@ -95,7 +95,7 @@ clean-files := libkconfig.so lkc_defs.h
3669 HOSTCFLAGS_lex.zconf.o := -I$(src)
3670 HOSTCFLAGS_zconf.tab.o := -I$(src)
3671
3672 -HOSTLOADLIBES_qconf = -L$(QTDIR)/lib -Wl,-rpath,$(QTDIR)/lib -l$(QTLIB) -ldl
3673 +HOSTLOADLIBES_qconf = -L$(QTDIR)/lib -L$(QTDIR)/lib64 -Wl,-rpath,$(QTDIR)/lib -l$(QTLIB) -ldl
3674 HOSTCXXFLAGS_qconf.o = -I$(QTDIR)/include
3675
3676 HOSTLOADLIBES_gconf = `pkg-config gtk+-2.0 gmodule-2.0 libglade-2.0 --libs`

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