/[linux-patches]/genpatches-2.6/trunk/2.6.14/1815_ia64-assembler.patch
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Contents of /genpatches-2.6/trunk/2.6.14/1815_ia64-assembler.patch

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Revision 292 - (show annotations) (download) (as text)
Tue Jan 31 21:50:53 2006 UTC (14 years, 9 months ago) by johnm
File MIME type: text/x-diff
File size: 2142 byte(s)
Large update - thanks goes to Kerin Millar for the legwork.
1 From: H. J. Lu <hjl@lucon.org>
2 Date: Fri, 7 Oct 2005 18:01:19 +0000 (-0700)
3 Subject: [IA64] Fix 2.6 kernel for the new ia64 assembler
4 X-Git-Tag: v2.6.14
5 X-Git-Url: http://www.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=9c184a073bfd650cc791956d6ca79725bb682716
6
7 [IA64] Fix 2.6 kernel for the new ia64 assembler
8
9 The new ia64 assembler uses slot 1 for the offset of a long (2-slot)
10 instruction and the old assembler uses slot 2. The 2.6 kernel assumes
11 slot 2 and won't boot when the new assembler is used:
12
13 http://sources.redhat.com/bugzilla/show_bug.cgi?id=1433
14
15 This patch will work with either slot 1 or 2.
16
17 Patch provided by H.J. Lu
18
19 Signed-off-by: Tony Luck <tony.luck@intel.com>
20 ---
21
22 --- a/arch/ia64/kernel/patch.c
23 +++ b/arch/ia64/kernel/patch.c
24 @@ -64,22 +64,30 @@ ia64_patch (u64 insn_addr, u64 mask, u64
25 void
26 ia64_patch_imm64 (u64 insn_addr, u64 val)
27 {
28 - ia64_patch(insn_addr,
29 + /* The assembler may generate offset pointing to either slot 1
30 + or slot 2 for a long (2-slot) instruction, occupying slots 1
31 + and 2. */
32 + insn_addr &= -16UL;
33 + ia64_patch(insn_addr + 2,
34 0x01fffefe000UL, ( ((val & 0x8000000000000000UL) >> 27) /* bit 63 -> 36 */
35 | ((val & 0x0000000000200000UL) << 0) /* bit 21 -> 21 */
36 | ((val & 0x00000000001f0000UL) << 6) /* bit 16 -> 22 */
37 | ((val & 0x000000000000ff80UL) << 20) /* bit 7 -> 27 */
38 | ((val & 0x000000000000007fUL) << 13) /* bit 0 -> 13 */));
39 - ia64_patch(insn_addr - 1, 0x1ffffffffffUL, val >> 22);
40 + ia64_patch(insn_addr + 1, 0x1ffffffffffUL, val >> 22);
41 }
42
43 void
44 ia64_patch_imm60 (u64 insn_addr, u64 val)
45 {
46 - ia64_patch(insn_addr,
47 + /* The assembler may generate offset pointing to either slot 1
48 + or slot 2 for a long (2-slot) instruction, occupying slots 1
49 + and 2. */
50 + insn_addr &= -16UL;
51 + ia64_patch(insn_addr + 2,
52 0x011ffffe000UL, ( ((val & 0x0800000000000000UL) >> 23) /* bit 59 -> 36 */
53 | ((val & 0x00000000000fffffUL) << 13) /* bit 0 -> 13 */));
54 - ia64_patch(insn_addr - 1, 0x1fffffffffcUL, val >> 18);
55 + ia64_patch(insn_addr + 1, 0x1fffffffffcUL, val >> 18);
56 }
57
58 /*

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