/[linux-patches]/genpatches-2.6/trunk/2.6.18/4005_sky2-v1.7.patch
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Contents of /genpatches-2.6/trunk/2.6.18/4005_sky2-v1.7.patch

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Revision 672 - (show annotations) (download)
Sat Oct 14 18:56:59 2006 UTC (11 years, 7 months ago) by phreak
File size: 28674 byte(s)
Removing patches that went completly into 2.6.18.1.
1 Index: linux-2.6.18/drivers/net/sky2.c
2 ===================================================================
3 --- linux-2.6.18.orig/drivers/net/sky2.c
4 +++ linux-2.6.18/drivers/net/sky2.c
5 @@ -50,7 +50,7 @@
6 #include "sky2.h"
7
8 #define DRV_NAME "sky2"
9 -#define DRV_VERSION "1.5"
10 +#define DRV_VERSION "1.7"
11 #define PFX DRV_NAME " "
12
13 /*
14 @@ -190,7 +198,6 @@ static u16 gm_phy_read(struct sky2_hw *h
15 static void sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
16 {
17 u16 power_control;
18 - u32 reg1;
19 int vaux;
20
21 pr_debug("sky2_set_power_state %d\n", state);
22 @@ -223,20 +230,9 @@ static void sky2_set_power_state(struct
23 else
24 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
25
26 - /* Turn off phy power saving */
27 - reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
28 - reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
29 -
30 - /* looks like this XL is back asswards .. */
31 - if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) {
32 - reg1 |= PCI_Y2_PHY1_COMA;
33 - if (hw->ports > 1)
34 - reg1 |= PCI_Y2_PHY2_COMA;
35 - }
36 - sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
37 - udelay(100);
38 -
39 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
40 + u32 reg1;
41 +
42 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
43 reg1 = sky2_pci_read32(hw, PCI_DEV_REG4);
44 reg1 &= P_ASPM_CONTROL_MSK;
45 @@ -248,15 +244,6 @@ static void sky2_set_power_state(struct
46
47 case PCI_D3hot:
48 case PCI_D3cold:
49 - /* Turn on phy power saving */
50 - reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
51 - if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
52 - reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
53 - else
54 - reg1 |= (PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
55 - sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
56 - udelay(100);
57 -
58 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
59 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
60 else
61 @@ -280,7 +267,7 @@ static void sky2_set_power_state(struct
62 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
63 }
64
65 -static void sky2_phy_reset(struct sky2_hw *hw, unsigned port)
66 +static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
67 {
68 u16 reg;
69
70 @@ -302,7 +289,7 @@ static void sky2_phy_reset(struct sky2_h
71 static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
72 {
73 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
74 - u16 ctrl, ct1000, adv, pg, ledctrl, ledover;
75 + u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg;
76
77 if (sky2->autoneg == AUTONEG_ENABLE &&
78 !(hw->chip_id == CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U)) {
79 @@ -321,7 +308,7 @@ static void sky2_phy_init(struct sky2_hw
80 }
81
82 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
83 - if (hw->copper) {
84 + if (sky2_is_copper(hw)) {
85 if (hw->chip_id == CHIP_ID_YUKON_FE) {
86 /* enable automatic crossover */
87 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
88 @@ -338,25 +325,37 @@ static void sky2_phy_init(struct sky2_hw
89 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
90 }
91 }
92 - gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
93 } else {
94 /* workaround for deviation #4.88 (CRC errors) */
95 /* disable Automatic Crossover */
96
97 ctrl &= ~PHY_M_PC_MDIX_MSK;
98 - gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
99 + }
100
101 - if (hw->chip_id == CHIP_ID_YUKON_XL) {
102 - /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
103 - gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
104 - ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
105 - ctrl &= ~PHY_M_MAC_MD_MSK;
106 - ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
107 - gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
108 + gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
109
110 + /* special setup for PHY 88E1112 Fiber */
111 + if (hw->chip_id == CHIP_ID_YUKON_XL && !sky2_is_copper(hw)) {
112 + pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
113 +
114 + /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
115 + gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
116 + ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
117 + ctrl &= ~PHY_M_MAC_MD_MSK;
118 + ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
119 + gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
120 +
121 + if (hw->pmd_type == 'P') {
122 /* select page 1 to access Fiber registers */
123 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
124 +
125 + /* for SFP-module set SIGDET polarity to low */
126 + ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
127 + ctrl |= PHY_M_FIB_SIGD_POL;
128 + gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
129 }
130 +
131 + gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
132 }
133
134 ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL);
135 @@ -371,9 +370,10 @@ static void sky2_phy_init(struct sky2_hw
136 ctrl = 0;
137 ct1000 = 0;
138 adv = PHY_AN_CSMA;
139 + reg = 0;
140
141 if (sky2->autoneg == AUTONEG_ENABLE) {
142 - if (hw->copper) {
143 + if (sky2_is_copper(hw)) {
144 if (sky2->advertising & ADVERTISED_1000baseT_Full)
145 ct1000 |= PHY_M_1000C_AFD;
146 if (sky2->advertising & ADVERTISED_1000baseT_Half)
147 @@ -386,8 +386,12 @@ static void sky2_phy_init(struct sky2_hw
148 adv |= PHY_M_AN_10_FD;
149 if (sky2->advertising & ADVERTISED_10baseT_Half)
150 adv |= PHY_M_AN_10_HD;
151 - } else /* special defines for FIBER (88E1011S only) */
152 - adv |= PHY_M_AN_1000X_AHD | PHY_M_AN_1000X_AFD;
153 + } else { /* special defines for FIBER (88E1040S only) */
154 + if (sky2->advertising & ADVERTISED_1000baseT_Full)
155 + adv |= PHY_M_AN_1000X_AFD;
156 + if (sky2->advertising & ADVERTISED_1000baseT_Half)
157 + adv |= PHY_M_AN_1000X_AHD;
158 + }
159
160 /* Set Flow-control capabilities */
161 if (sky2->tx_pause && sky2->rx_pause)
162 @@ -403,21 +407,46 @@ static void sky2_phy_init(struct sky2_hw
163 /* forced speed/duplex settings */
164 ct1000 = PHY_M_1000C_MSE;
165
166 - if (sky2->duplex == DUPLEX_FULL)
167 - ctrl |= PHY_CT_DUP_MD;
168 + /* Disable auto update for duplex flow control and speed */
169 + reg |= GM_GPCR_AU_ALL_DIS;
170
171 switch (sky2->speed) {
172 case SPEED_1000:
173 ctrl |= PHY_CT_SP1000;
174 + reg |= GM_GPCR_SPEED_1000;
175 break;
176 case SPEED_100:
177 ctrl |= PHY_CT_SP100;
178 + reg |= GM_GPCR_SPEED_100;
179 break;
180 }
181
182 + if (sky2->duplex == DUPLEX_FULL) {
183 + reg |= GM_GPCR_DUP_FULL;
184 + ctrl |= PHY_CT_DUP_MD;
185 + } else if (sky2->speed != SPEED_1000 && hw->chip_id != CHIP_ID_YUKON_EC_U) {
186 + /* Turn off flow control for 10/100mbps */
187 + sky2->rx_pause = 0;
188 + sky2->tx_pause = 0;
189 + }
190 +
191 + if (!sky2->rx_pause)
192 + reg |= GM_GPCR_FC_RX_DIS;
193 +
194 + if (!sky2->tx_pause)
195 + reg |= GM_GPCR_FC_TX_DIS;
196 +
197 + /* Forward pause packets to GMAC? */
198 + if (sky2->tx_pause || sky2->rx_pause)
199 + sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
200 + else
201 + sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
202 +
203 ctrl |= PHY_CT_RESET;
204 }
205
206 + gma_write16(hw, port, GM_GP_CTRL, reg);
207 +
208 if (hw->chip_id != CHIP_ID_YUKON_FE)
209 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
210
211 @@ -521,6 +550,7 @@ static void sky2_phy_init(struct sky2_hw
212 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
213
214 }
215 +
216 /* Enable phy interrupt on auto-negotiation complete (or link up) */
217 if (sky2->autoneg == AUTONEG_ENABLE)
218 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
219 @@ -528,6 +558,29 @@ static void sky2_phy_init(struct sky2_hw
220 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
221 }
222
223 +static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
224 +{
225 + u32 reg1;
226 + static const u32 phy_power[]
227 + = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
228 +
229 + /* looks like this XL is back asswards .. */
230 + if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
231 + onoff = !onoff;
232 +
233 + reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
234 +
235 + if (onoff)
236 + /* Turn off phy power saving */
237 + reg1 &= ~phy_power[port];
238 + else
239 + reg1 |= phy_power[port];
240 +
241 + sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
242 + sky2_pci_read32(hw, PCI_DEV_REG1);
243 + udelay(100);
244 +}
245 +
246 /* Force a renegotiation */
247 static void sky2_phy_reinit(struct sky2_port *sky2)
248 {
249 @@ -560,49 +613,11 @@ static void sky2_mac_init(struct sky2_hw
250 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
251 }
252
253 - if (sky2->autoneg == AUTONEG_DISABLE) {
254 - reg = gma_read16(hw, port, GM_GP_CTRL);
255 - reg |= GM_GPCR_AU_ALL_DIS;
256 - gma_write16(hw, port, GM_GP_CTRL, reg);
257 - gma_read16(hw, port, GM_GP_CTRL);
258 -
259 - switch (sky2->speed) {
260 - case SPEED_1000:
261 - reg &= ~GM_GPCR_SPEED_100;
262 - reg |= GM_GPCR_SPEED_1000;
263 - break;
264 - case SPEED_100:
265 - reg &= ~GM_GPCR_SPEED_1000;
266 - reg |= GM_GPCR_SPEED_100;
267 - break;
268 - case SPEED_10:
269 - reg &= ~(GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100);
270 - break;
271 - }
272 -
273 - if (sky2->duplex == DUPLEX_FULL)
274 - reg |= GM_GPCR_DUP_FULL;
275 -
276 - /* turn off pause in 10/100mbps half duplex */
277 - else if (sky2->speed != SPEED_1000 &&
278 - hw->chip_id != CHIP_ID_YUKON_EC_U)
279 - sky2->tx_pause = sky2->rx_pause = 0;
280 - } else
281 - reg = GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100 | GM_GPCR_DUP_FULL;
282 -
283 - if (!sky2->tx_pause && !sky2->rx_pause) {
284 - sky2_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
285 - reg |=
286 - GM_GPCR_FC_TX_DIS | GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS;
287 - } else if (sky2->tx_pause && !sky2->rx_pause) {
288 - /* disable Rx flow-control */
289 - reg |= GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS;
290 - }
291 -
292 - gma_write16(hw, port, GM_GP_CTRL, reg);
293 -
294 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
295
296 + /* Enable Transmit FIFO Underrun */
297 + sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
298 +
299 spin_lock_bh(&sky2->phy_lock);
300 sky2_phy_init(hw, port);
301 spin_unlock_bh(&sky2->phy_lock);
302 @@ -760,9 +775,10 @@ static inline struct sky2_tx_le *get_tx_
303 /* Update chip's next pointer */
304 static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
305 {
306 + q = Y2_QADDR(q, PREF_UNIT_PUT_IDX);
307 wmb();
308 - sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx);
309 - mmiowb();
310 + sky2_write16(hw, q, idx);
311 + sky2_read16(hw, q);
312 }
313
314
315 @@ -811,7 +827,7 @@ static void rx_set_checksum(struct sky2_
316 struct sky2_rx_le *le;
317
318 le = sky2_next_rx(sky2);
319 - le->addr = (ETH_HLEN << 16) | ETH_HLEN;
320 + le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN);
321 le->ctrl = 0;
322 le->opcode = OP_TCPSTART | HW_OWNER;
323
324 @@ -949,14 +965,16 @@ static void sky2_vlan_rx_kill_vid(struct
325 /*
326 * It appears the hardware has a bug in the FIFO logic that
327 * cause it to hang if the FIFO gets overrun and the receive buffer
328 - * is not aligned. ALso alloc_skb() won't align properly if slab
329 - * debugging is enabled.
330 + * is not 64 byte aligned. The buffer returned from netdev_alloc_skb is
331 + * aligned except if slab debugging is enabled.
332 */
333 -static inline struct sk_buff *sky2_alloc_skb(unsigned int size, gfp_t gfp_mask)
334 +static inline struct sk_buff *sky2_alloc_skb(struct net_device *dev,
335 + unsigned int length,
336 + gfp_t gfp_mask)
337 {
338 struct sk_buff *skb;
339
340 - skb = alloc_skb(size + RX_SKB_ALIGN, gfp_mask);
341 + skb = __netdev_alloc_skb(dev, length + RX_SKB_ALIGN, gfp_mask);
342 if (likely(skb)) {
343 unsigned long p = (unsigned long) skb->data;
344 skb_reserve(skb, ALIGN(p, RX_SKB_ALIGN) - p);
345 @@ -992,7 +1010,8 @@ static int sky2_rx_start(struct sky2_por
346 for (i = 0; i < sky2->rx_pending; i++) {
347 struct ring_info *re = sky2->rx_ring + i;
348
349 - re->skb = sky2_alloc_skb(sky2->rx_bufsize, GFP_KERNEL);
350 + re->skb = sky2_alloc_skb(sky2->netdev, sky2->rx_bufsize,
351 + GFP_KERNEL);
352 if (!re->skb)
353 goto nomem;
354
355 @@ -1080,6 +1099,8 @@ static int sky2_up(struct net_device *de
356 if (!sky2->rx_ring)
357 goto err_out;
358
359 + sky2_phy_power(hw, port, 1);
360 +
361 sky2_mac_init(hw, port);
362
363 /* Determine available ram buffer space (in 4K blocks).
364 @@ -1184,7 +1205,6 @@ static int sky2_xmit_frame(struct sk_buf
365 struct sky2_tx_le *le = NULL;
366 struct tx_ring_info *re;
367 unsigned i, len;
368 - int avail;
369 dma_addr_t mapping;
370 u32 addr64;
371 u16 mss;
372 @@ -1225,7 +1245,7 @@ static int sky2_xmit_frame(struct sk_buf
373 /* Send high bits if changed or crosses boundary */
374 if (addr64 != sky2->tx_addr64 || high32(mapping + len) != sky2->tx_addr64) {
375 le = get_tx_le(sky2);
376 - le->tx.addr = cpu_to_le32(addr64);
377 + le->addr = cpu_to_le32(addr64);
378 le->ctrl = 0;
379 le->opcode = OP_ADDR64 | HW_OWNER;
380 sky2->tx_addr64 = high32(mapping + len);
381 @@ -1234,25 +1254,17 @@ static int sky2_xmit_frame(struct sk_buf
382 /* Check for TCP Segmentation Offload */
383 mss = skb_shinfo(skb)->gso_size;
384 if (mss != 0) {
385 - /* just drop the packet if non-linear expansion fails */
386 - if (skb_header_cloned(skb) &&
387 - pskb_expand_head(skb, 0, 0, GFP_ATOMIC)) {
388 - dev_kfree_skb(skb);
389 - goto out_unlock;
390 - }
391 -
392 mss += ((skb->h.th->doff - 5) * 4); /* TCP options */
393 mss += (skb->nh.iph->ihl * 4) + sizeof(struct tcphdr);
394 mss += ETH_HLEN;
395 - }
396
397 - if (mss != sky2->tx_last_mss) {
398 - le = get_tx_le(sky2);
399 - le->tx.tso.size = cpu_to_le16(mss);
400 - le->tx.tso.rsvd = 0;
401 - le->opcode = OP_LRGLEN | HW_OWNER;
402 - le->ctrl = 0;
403 - sky2->tx_last_mss = mss;
404 + if (mss != sky2->tx_last_mss) {
405 + le = get_tx_le(sky2);
406 + le->addr = cpu_to_le32(mss);
407 + le->opcode = OP_LRGLEN | HW_OWNER;
408 + le->ctrl = 0;
409 + sky2->tx_last_mss = mss;
410 + }
411 }
412
413 ctrl = 0;
414 @@ -1261,7 +1273,7 @@ static int sky2_xmit_frame(struct sk_buf
415 if (sky2->vlgrp && vlan_tx_tag_present(skb)) {
416 if (!le) {
417 le = get_tx_le(sky2);
418 - le->tx.addr = 0;
419 + le->addr = 0;
420 le->opcode = OP_VLAN|HW_OWNER;
421 le->ctrl = 0;
422 } else
423 @@ -1273,23 +1285,29 @@ static int sky2_xmit_frame(struct sk_buf
424
425 /* Handle TCP checksum offload */
426 if (skb->ip_summed == CHECKSUM_HW) {
427 - u16 hdr = skb->h.raw - skb->data;
428 - u16 offset = hdr + skb->csum;
429 + unsigned offset = skb->h.raw - skb->data;
430 + u32 tcpsum;
431 +
432 + tcpsum = offset << 16; /* sum start */
433 + tcpsum |= offset + skb->csum; /* sum write */
434
435 ctrl = CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
436 if (skb->nh.iph->protocol == IPPROTO_UDP)
437 ctrl |= UDPTCP;
438
439 - le = get_tx_le(sky2);
440 - le->tx.csum.start = cpu_to_le16(hdr);
441 - le->tx.csum.offset = cpu_to_le16(offset);
442 - le->length = 0; /* initial checksum value */
443 - le->ctrl = 1; /* one packet */
444 - le->opcode = OP_TCPLISW | HW_OWNER;
445 + if (tcpsum != sky2->tx_tcpsum) {
446 + sky2->tx_tcpsum = tcpsum;
447 +
448 + le = get_tx_le(sky2);
449 + le->addr = cpu_to_le32(tcpsum);
450 + le->length = 0; /* initial checksum value */
451 + le->ctrl = 1; /* one packet */
452 + le->opcode = OP_TCPLISW | HW_OWNER;
453 + }
454 }
455
456 le = get_tx_le(sky2);
457 - le->tx.addr = cpu_to_le32((u32) mapping);
458 + le->addr = cpu_to_le32((u32) mapping);
459 le->length = cpu_to_le16(len);
460 le->ctrl = ctrl;
461 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
462 @@ -1307,36 +1325,31 @@ static int sky2_xmit_frame(struct sk_buf
463 addr64 = high32(mapping);
464 if (addr64 != sky2->tx_addr64) {
465 le = get_tx_le(sky2);
466 - le->tx.addr = cpu_to_le32(addr64);
467 + le->addr = cpu_to_le32(addr64);
468 le->ctrl = 0;
469 le->opcode = OP_ADDR64 | HW_OWNER;
470 sky2->tx_addr64 = addr64;
471 }
472
473 le = get_tx_le(sky2);
474 - le->tx.addr = cpu_to_le32((u32) mapping);
475 + le->addr = cpu_to_le32((u32) mapping);
476 le->length = cpu_to_le16(frag->size);
477 le->ctrl = ctrl;
478 le->opcode = OP_BUFFER | HW_OWNER;
479
480 fre = sky2->tx_ring
481 - + RING_NEXT((re - sky2->tx_ring) + i, TX_RING_SIZE);
482 + + RING_NEXT((re - sky2->tx_ring) + i, TX_RING_SIZE);
483 pci_unmap_addr_set(fre, mapaddr, mapping);
484 }
485
486 re->idx = sky2->tx_prod;
487 le->ctrl |= EOP;
488
489 - avail = tx_avail(sky2);
490 - if (mss != 0 || avail < TX_MIN_PENDING) {
491 - le->ctrl |= FRC_STAT;
492 - if (avail <= MAX_SKB_TX_LE)
493 - netif_stop_queue(dev);
494 - }
495 + if (tx_avail(sky2) <= MAX_SKB_TX_LE)
496 + netif_stop_queue(dev);
497
498 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
499
500 -out_unlock:
501 spin_unlock(&sky2->tx_lock);
502
503 dev->trans_start = jiffies;
504 @@ -1421,7 +1434,7 @@ static int sky2_down(struct net_device *
505 /* Stop more packets from being queued */
506 netif_stop_queue(dev);
507
508 - sky2_phy_reset(hw, port);
509 + sky2_gmac_reset(hw, port);
510
511 /* Stop transmitter */
512 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
513 @@ -1469,6 +1482,8 @@ static int sky2_down(struct net_device *
514 imask &= ~portirq_msk[port];
515 sky2_write32(hw, B0_IMSK, imask);
516
517 + sky2_phy_power(hw, port, 0);
518 +
519 /* turn off LED's */
520 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
521
522 @@ -1497,7 +1512,7 @@ static int sky2_down(struct net_device *
523
524 static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
525 {
526 - if (!hw->copper)
527 + if (!sky2_is_copper(hw))
528 return SPEED_1000;
529
530 if (hw->chip_id == CHIP_ID_YUKON_FE)
531 @@ -1519,40 +1534,10 @@ static void sky2_link_up(struct sky2_por
532 unsigned port = sky2->port;
533 u16 reg;
534
535 - /* Enable Transmit FIFO Underrun */
536 - sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
537 -
538 - reg = gma_read16(hw, port, GM_GP_CTRL);
539 - if (sky2->autoneg == AUTONEG_DISABLE) {
540 - reg |= GM_GPCR_AU_ALL_DIS;
541 -
542 - /* Is write/read necessary? Copied from sky2_mac_init */
543 - gma_write16(hw, port, GM_GP_CTRL, reg);
544 - gma_read16(hw, port, GM_GP_CTRL);
545 -
546 - switch (sky2->speed) {
547 - case SPEED_1000:
548 - reg &= ~GM_GPCR_SPEED_100;
549 - reg |= GM_GPCR_SPEED_1000;
550 - break;
551 - case SPEED_100:
552 - reg &= ~GM_GPCR_SPEED_1000;
553 - reg |= GM_GPCR_SPEED_100;
554 - break;
555 - case SPEED_10:
556 - reg &= ~(GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100);
557 - break;
558 - }
559 - } else
560 - reg &= ~GM_GPCR_AU_ALL_DIS;
561 -
562 - if (sky2->duplex == DUPLEX_FULL || sky2->autoneg == AUTONEG_ENABLE)
563 - reg |= GM_GPCR_DUP_FULL;
564 -
565 /* enable Rx/Tx */
566 + reg = gma_read16(hw, port, GM_GP_CTRL);
567 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
568 gma_write16(hw, port, GM_GP_CTRL, reg);
569 - gma_read16(hw, port, GM_GP_CTRL);
570
571 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
572
573 @@ -1606,7 +1591,6 @@ static void sky2_link_down(struct sky2_p
574 reg = gma_read16(hw, port, GM_GP_CTRL);
575 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
576 gma_write16(hw, port, GM_GP_CTRL, reg);
577 - gma_read16(hw, port, GM_GP_CTRL); /* PCI post */
578
579 if (sky2->rx_pause && !sky2->tx_pause) {
580 /* restore Asymmetric Pause bit */
581 @@ -1623,6 +1607,7 @@ static void sky2_link_down(struct sky2_p
582
583 if (netif_msg_link(sky2))
584 printk(KERN_INFO PFX "%s: Link is down.\n", sky2->netdev->name);
585 +
586 sky2_phy_init(hw, port);
587 }
588
589 @@ -1663,8 +1648,11 @@ static int sky2_autoneg_done(struct sky2
590 sky2->rx_pause = (aux & PHY_M_PS_RX_P_EN) != 0;
591 sky2->tx_pause = (aux & PHY_M_PS_TX_P_EN) != 0;
592
593 - if ((sky2->tx_pause || sky2->rx_pause)
594 - && !(sky2->speed < SPEED_1000 && sky2->duplex == DUPLEX_HALF))
595 + if (sky2->duplex == DUPLEX_HALF && sky2->speed != SPEED_1000
596 + && hw->chip_id != CHIP_ID_YUKON_EC_U)
597 + sky2->rx_pause = sky2->tx_pause = 0;
598 +
599 + if (sky2->rx_pause || sky2->tx_pause)
600 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
601 else
602 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
603 @@ -1690,7 +1678,7 @@ static void sky2_phy_intr(struct sky2_hw
604 printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n",
605 sky2->netdev->name, istatus, phystat);
606
607 - if (istatus & PHY_M_IS_AN_COMPL) {
608 + if (sky2->autoneg == AUTONEG_ENABLE && (istatus & PHY_M_IS_AN_COMPL)) {
609 if (sky2_autoneg_done(sky2, phystat) == 0)
610 sky2_link_up(sky2);
611 goto out;
612 @@ -1832,15 +1820,16 @@ static int sky2_change_mtu(struct net_de
613 * For small packets or errors, just reuse existing skb.
614 * For larger packets, get new buffer.
615 */
616 -static struct sk_buff *sky2_receive(struct sky2_port *sky2,
617 +static struct sk_buff *sky2_receive(struct net_device *dev,
618 u16 length, u32 status)
619 {
620 + struct sky2_port *sky2 = netdev_priv(dev);
621 struct ring_info *re = sky2->rx_ring + sky2->rx_next;
622 struct sk_buff *skb = NULL;
623
624 if (unlikely(netif_msg_rx_status(sky2)))
625 printk(KERN_DEBUG PFX "%s: rx slot %u status 0x%x len %d\n",
626 - sky2->netdev->name, sky2->rx_next, status, length);
627 + dev->name, sky2->rx_next, status, length);
628
629 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending;
630 prefetch(sky2->rx_ring + sky2->rx_next);
631 @@ -1851,11 +1840,11 @@ static struct sk_buff *sky2_receive(stru
632 if (!(status & GMR_FS_RX_OK))
633 goto resubmit;
634
635 - if (length > sky2->netdev->mtu + ETH_HLEN)
636 + if (length > dev->mtu + ETH_HLEN)
637 goto oversize;
638
639 if (length < copybreak) {
640 - skb = alloc_skb(length + 2, GFP_ATOMIC);
641 + skb = netdev_alloc_skb(dev, length + 2);
642 if (!skb)
643 goto resubmit;
644
645 @@ -1870,7 +1859,7 @@ static struct sk_buff *sky2_receive(stru
646 } else {
647 struct sk_buff *nskb;
648
649 - nskb = sky2_alloc_skb(sky2->rx_bufsize, GFP_ATOMIC);
650 + nskb = sky2_alloc_skb(dev, sky2->rx_bufsize, GFP_ATOMIC);
651 if (!nskb)
652 goto resubmit;
653
654 @@ -1900,7 +1889,7 @@ error:
655
656 if (netif_msg_rx_err(sky2) && net_ratelimit())
657 printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n",
658 - sky2->netdev->name, status, length);
659 + dev->name, status, length);
660
661 if (status & (GMR_FS_LONG_ERR | GMR_FS_UN_SIZE))
662 sky2->net_stats.rx_length_errors++;
663 @@ -1926,12 +1915,6 @@ static inline void sky2_tx_done(struct n
664 }
665 }
666
667 -/* Is status ring empty or is there more to do? */
668 -static inline int sky2_more_work(const struct sky2_hw *hw)
669 -{
670 - return (hw->st_idx != sky2_read16(hw, STAT_PUT_IDX));
671 -}
672 -
673 /* Process status response ring */
674 static int sky2_status_intr(struct sky2_hw *hw, int to_do)
675 {
676 @@ -1955,16 +1938,15 @@ static int sky2_status_intr(struct sky2_
677 dev = hw->dev[le->link];
678
679 sky2 = netdev_priv(dev);
680 - length = le->length;
681 - status = le->status;
682 + length = le16_to_cpu(le->length);
683 + status = le32_to_cpu(le->status);
684
685 switch (le->opcode & ~HW_OWNER) {
686 case OP_RXSTAT:
687 - skb = sky2_receive(sky2, length, status);
688 + skb = sky2_receive(dev, length, status);
689 if (!skb)
690 break;
691
692 - skb->dev = dev;
693 skb->protocol = eth_type_trans(skb, dev);
694 dev->last_rx = jiffies;
695
696 @@ -2001,7 +1983,7 @@ static int sky2_status_intr(struct sky2_
697 case OP_RXCHKS:
698 skb = sky2->rx_ring[sky2->rx_next].skb;
699 skb->ip_summed = CHECKSUM_HW;
700 - skb->csum = le16_to_cpu(status);
701 + skb->csum = status & 0xffff;
702 break;
703
704 case OP_TXINDEXLE:
705 @@ -2022,6 +2004,9 @@ static int sky2_status_intr(struct sky2_
706 }
707 }
708
709 + /* Fully processed status ring so clear irq */
710 + sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
711 +
712 exit_loop:
713 if (buf_write[0]) {
714 sky2 = netdev_priv(hw->dev[0]);
715 @@ -2231,19 +2216,16 @@ static int sky2_poll(struct net_device *
716 sky2_descriptor_error(hw, 1, "transmit", Y2_IS_CHK_TXA2);
717
718 work_done = sky2_status_intr(hw, work_limit);
719 - *budget -= work_done;
720 - dev0->quota -= work_done;
721 -
722 - if (status & Y2_IS_STAT_BMU)
723 - sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
724 + if (work_done < work_limit) {
725 + netif_rx_complete(dev0);
726
727 - if (sky2_more_work(hw))
728 + sky2_read32(hw, B0_Y2_SP_LISR);
729 + return 0;
730 + } else {
731 + *budget -= work_done;
732 + dev0->quota -= work_done;
733 return 1;
734 -
735 - netif_rx_complete(dev0);
736 -
737 - sky2_read32(hw, B0_Y2_SP_LISR);
738 - return 0;
739 + }
740 }
741
742 static irqreturn_t sky2_intr(int irq, void *dev_id, struct pt_regs *regs)
743 @@ -2303,7 +2285,7 @@ static inline u32 sky2_clk2us(const stru
744 static int sky2_reset(struct sky2_hw *hw)
745 {
746 u16 status;
747 - u8 t8, pmd_type;
748 + u8 t8;
749 int i;
750
751 sky2_write8(hw, B0_CTST, CS_RST_CLR);
752 @@ -2349,9 +2331,7 @@ static int sky2_reset(struct sky2_hw *hw
753 sky2_pci_write32(hw, PEX_UNC_ERR_STAT, 0xffffffffUL);
754
755
756 - pmd_type = sky2_read8(hw, B2_PMD_TYP);
757 - hw->copper = !(pmd_type == 'L' || pmd_type == 'S');
758 -
759 + hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
760 hw->ports = 1;
761 t8 = sky2_read8(hw, B2_Y2_HW_RES);
762 if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
763 @@ -2409,7 +2389,7 @@ static int sky2_reset(struct sky2_hw *hw
764 sky2_write32(hw, B0_HWE_IMSK, Y2_HWE_ALL_MASK);
765
766 for (i = 0; i < hw->ports; i++)
767 - sky2_phy_reset(hw, i);
768 + sky2_gmac_reset(hw, i);
769
770 memset(hw->st_le, 0, STATUS_LE_BYTES);
771 hw->st_idx = 0;
772 @@ -2448,21 +2428,22 @@ static int sky2_reset(struct sky2_hw *hw
773
774 static u32 sky2_supported_modes(const struct sky2_hw *hw)
775 {
776 - u32 modes;
777 - if (hw->copper) {
778 - modes = SUPPORTED_10baseT_Half
779 - | SUPPORTED_10baseT_Full
780 - | SUPPORTED_100baseT_Half
781 - | SUPPORTED_100baseT_Full
782 - | SUPPORTED_Autoneg | SUPPORTED_TP;
783 + if (sky2_is_copper(hw)) {
784 + u32 modes = SUPPORTED_10baseT_Half
785 + | SUPPORTED_10baseT_Full
786 + | SUPPORTED_100baseT_Half
787 + | SUPPORTED_100baseT_Full
788 + | SUPPORTED_Autoneg | SUPPORTED_TP;
789
790 if (hw->chip_id != CHIP_ID_YUKON_FE)
791 modes |= SUPPORTED_1000baseT_Half
792 - | SUPPORTED_1000baseT_Full;
793 + | SUPPORTED_1000baseT_Full;
794 + return modes;
795 } else
796 - modes = SUPPORTED_1000baseT_Full | SUPPORTED_FIBRE
797 - | SUPPORTED_Autoneg;
798 - return modes;
799 + return SUPPORTED_1000baseT_Half
800 + | SUPPORTED_1000baseT_Full
801 + | SUPPORTED_Autoneg
802 + | SUPPORTED_FIBRE;
803 }
804
805 static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
806 @@ -2473,7 +2454,7 @@ static int sky2_get_settings(struct net_
807 ecmd->transceiver = XCVR_INTERNAL;
808 ecmd->supported = sky2_supported_modes(hw);
809 ecmd->phy_address = PHY_ADDR_MARV;
810 - if (hw->copper) {
811 + if (sky2_is_copper(hw)) {
812 ecmd->supported = SUPPORTED_10baseT_Half
813 | SUPPORTED_10baseT_Full
814 | SUPPORTED_100baseT_Half
815 @@ -2482,12 +2463,14 @@ static int sky2_get_settings(struct net_
816 | SUPPORTED_1000baseT_Full
817 | SUPPORTED_Autoneg | SUPPORTED_TP;
818 ecmd->port = PORT_TP;
819 - } else
820 + ecmd->speed = sky2->speed;
821 + } else {
822 + ecmd->speed = SPEED_1000;
823 ecmd->port = PORT_FIBRE;
824 + }
825
826 ecmd->advertising = sky2->advertising;
827 ecmd->autoneg = sky2->autoneg;
828 - ecmd->speed = sky2->speed;
829 ecmd->duplex = sky2->duplex;
830 return 0;
831 }
832 @@ -2886,7 +2869,6 @@ static int sky2_set_pauseparam(struct ne
833 struct ethtool_pauseparam *ecmd)
834 {
835 struct sky2_port *sky2 = netdev_priv(dev);
836 - int err = 0;
837
838 sky2->autoneg = ecmd->autoneg;
839 sky2->tx_pause = ecmd->tx_pause != 0;
840 @@ -2894,7 +2876,7 @@ static int sky2_set_pauseparam(struct ne
841
842 sky2_phy_reinit(sky2);
843
844 - return err;
845 + return 0;
846 }
847
848 static int sky2_get_coalesce(struct net_device *dev,
849 @@ -3200,6 +3182,8 @@ static int __devinit sky2_test_msi(struc
850 struct pci_dev *pdev = hw->pdev;
851 int err;
852
853 + init_waitqueue_head (&hw->msi_wait);
854 +
855 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
856
857 err = request_irq(pdev->irq, sky2_test_intr, IRQF_SHARED, DRV_NAME, hw);
858 @@ -3209,10 +3193,8 @@ static int __devinit sky2_test_msi(struc
859 return err;
860 }
861
862 - init_waitqueue_head (&hw->msi_wait);
863 -
864 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
865 - wmb();
866 + sky2_read8(hw, B0_CTST);
867
868 wait_event_timeout(hw->msi_wait, hw->msi_detected, HZ/10);
869
870 @@ -3304,12 +3286,13 @@ static int __devinit sky2_probe(struct p
871 hw->pm_cap = pm_cap;
872
873 #ifdef __BIG_ENDIAN
874 - /* byte swap descriptors in hardware */
875 + /* The sk98lin vendor driver uses hardware byte swapping but
876 + * this driver uses software swapping.
877 + */
878 {
879 u32 reg;
880 -
881 reg = sky2_pci_read32(hw, PCI_DEV_REG2);
882 - reg |= PCI_REV_DESC;
883 + reg &= ~PCI_REV_DESC;
884 sky2_pci_write32(hw, PCI_DEV_REG2, reg);
885 }
886 #endif
887 Index: linux-2.6.18/drivers/net/sky2.h
888 ===================================================================
889 --- linux-2.6.18.orig/drivers/net/sky2.h
890 +++ linux-2.6.18/drivers/net/sky2.h
891 @@ -1318,6 +1318,14 @@ enum {
892 };
893
894 /* for Yukon-2 Gigabit Ethernet PHY (88E1112 only) */
895 +/***** PHY_MARV_PHY_CTRL (page 1) 16 bit r/w Fiber Specific Ctrl *****/
896 +enum {
897 + PHY_M_FIB_FORCE_LNK = 1<<10,/* Force Link Good */
898 + PHY_M_FIB_SIGD_POL = 1<<9, /* SIGDET Polarity */
899 + PHY_M_FIB_TX_DIS = 1<<3, /* Transmitter Disable */
900 +};
901 +
902 +/* for Yukon-2 Gigabit Ethernet PHY (88E1112 only) */
903 /***** PHY_MARV_PHY_CTRL (page 2) 16 bit r/w MAC Specific Ctrl *****/
904 enum {
905 PHY_M_MAC_MD_MSK = 7<<7, /* Bit 9.. 7: Mode Select Mask */
906 @@ -1748,7 +1756,6 @@ enum {
907 INIT_SUM= 1<<3,
908 LOCK_SUM= 1<<4,
909 INS_VLAN= 1<<5,
910 - FRC_STAT= 1<<6,
911 EOP = 1<<7,
912 };
913
914 @@ -1784,21 +1791,9 @@ enum {
915 OP_TXINDEXLE = 0x68,
916 };
917
918 -/* Yukon 2 hardware interface
919 - * Not tested on big endian
920 - */
921 +/* Yukon 2 hardware interface */
922 struct sky2_tx_le {
923 - union {
924 - __le32 addr;
925 - struct {
926 - __le16 offset;
927 - __le16 start;
928 - } csum __attribute((packed));
929 - struct {
930 - __le16 size;
931 - __le16 rsvd;
932 - } tso __attribute((packed));
933 - } tx;
934 + __le32 addr;
935 __le16 length; /* also vlan tag or checksum start */
936 u8 ctrl;
937 u8 opcode;
938 @@ -1844,6 +1839,7 @@ struct sky2_port {
939 u32 tx_addr64;
940 u16 tx_pending;
941 u16 tx_last_mss;
942 + u32 tx_tcpsum;
943
944 struct ring_info *rx_ring ____cacheline_aligned_in_smp;
945 struct sky2_rx_le *rx_le;
946 @@ -1879,7 +1875,7 @@ struct sky2_hw {
947 int pm_cap;
948 u8 chip_id;
949 u8 chip_rev;
950 - u8 copper;
951 + u8 pmd_type;
952 u8 ports;
953
954 struct sky2_status_le *st_le;
955 @@ -1891,6 +1887,11 @@ struct sky2_hw {
956 wait_queue_head_t msi_wait;
957 };
958
959 +static inline int sky2_is_copper(const struct sky2_hw *hw)
960 +{
961 + return !(hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P');
962 +}
963 +
964 /* Register accessor for memory mapped device */
965 static inline u32 sky2_read32(const struct sky2_hw *hw, unsigned reg)
966 {

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