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authorAvi Kivity <avi@redhat.com>2009-01-18 12:36:25 +0200
committerAvi Kivity <avi@redhat.com>2009-01-18 12:36:25 +0200
commit931c5ab4bfd044e8dfc264ad4fda6ac62e078316 (patch)
treee75853dd4bfa7f1fee2fb1ddbce0510178b0f2a6
parentDevice-assignment: fix ROM writing (diff)
parentRemove unused info_str parameter to pcnet_common_init() (diff)
downloadqemu-kvm-931c5ab4bfd044e8dfc264ad4fda6ac62e078316.tar.gz
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qemu-kvm-931c5ab4bfd044e8dfc264ad4fda6ac62e078316.zip
Merge branch 'qemu-cvs'
Conflicts: qemu/hw/cirrus_vga.c qemu/hw/pc.c qemu/hw/pcnet.c qemu/hw/vga.c qemu/vl.c Signed-off-by: Avi Kivity <avi@redhat.com>
-rw-r--r--Makefile.target7
-rw-r--r--block-qcow2.c12
-rw-r--r--block-raw-posix.c13
-rw-r--r--block.c27
-rw-r--r--bsd-user/elfload.c4
-rw-r--r--bsd-user/main.c29
-rw-r--r--bswap.h2
-rw-r--r--cache-utils.c4
-rw-r--r--cache-utils.h4
-rwxr-xr-xconfigure81
-rw-r--r--console.c264
-rw-r--r--console.h162
-rw-r--r--cpu-all.h19
-rw-r--r--cpu-defs.h2
-rw-r--r--cpu-exec.c43
-rw-r--r--curses.c38
-rw-r--r--darwin-user/commpage.c6
-rw-r--r--darwin-user/machload.c4
-rw-r--r--darwin-user/main.c7
-rw-r--r--darwin-user/signal.c3
-rw-r--r--darwin-user/syscall.c4
-rw-r--r--disas.c2
-rw-r--r--dyngen-exec.h6
-rw-r--r--exec-all.h9
-rw-r--r--exec.c50
-rw-r--r--fpu/softfloat-native.c2
-rw-r--r--gdbstub.c6
-rw-r--r--hw/alpha_palcode.c15
-rw-r--r--hw/an5206.c2
-rw-r--r--hw/apic.c22
-rw-r--r--hw/blizzard.c14
-rw-r--r--hw/boards.h2
-rw-r--r--hw/cirrus_vga.c37
-rw-r--r--hw/cuda.c27
-rw-r--r--hw/devices.h8
-rw-r--r--hw/dummy_m68k.c2
-rw-r--r--hw/escc.c8
-rw-r--r--hw/escc.h5
-rw-r--r--hw/etraxfs.c2
-rw-r--r--hw/g364fb.c653
-rw-r--r--hw/g364fb_template.h42
-rw-r--r--hw/gumstix.c8
-rw-r--r--hw/hpet.c6
-rw-r--r--hw/hpet_emul.h2
-rw-r--r--hw/i2c.h2
-rw-r--r--hw/integratorcp.c4
-rw-r--r--hw/jazz_led.c16
-rw-r--r--hw/lsi53c895a.c13
-rw-r--r--hw/mainstone.c8
-rw-r--r--hw/mc146818rtc.c66
-rw-r--r--hw/mcf5208.c2
-rw-r--r--hw/mips.h9
-rw-r--r--hw/mips_jazz.c17
-rw-r--r--hw/mips_malta.c4
-rw-r--r--hw/mips_mipssim.c2
-rw-r--r--hw/mips_r4k.c4
-rw-r--r--hw/mips_timer.c4
-rw-r--r--hw/musicpal.c16
-rw-r--r--hw/nseries.c22
-rw-r--r--hw/omap.h8
-rw-r--r--hw/omap1.c4
-rw-r--r--hw/omap2.c4
-rw-r--r--hw/omap_dss.c8
-rw-r--r--hw/omap_lcdc.c12
-rw-r--r--hw/omap_sx1.c4
-rw-r--r--hw/openpic.c2
-rw-r--r--hw/palm.c8
-rw-r--r--hw/pc.c73
-rw-r--r--hw/pc.h12
-rw-r--r--hw/pci.h2
-rw-r--r--hw/pcnet.c6
-rw-r--r--hw/pl110.c15
-rw-r--r--hw/ppc.c307
-rw-r--r--hw/ppc405_boards.c4
-rw-r--r--hw/ppc440_bamboo.c9
-rw-r--r--hw/ppc4xx_devs.c55
-rw-r--r--hw/ppc_chrp.c8
-rw-r--r--hw/ppc_oldworld.c19
-rw-r--r--hw/ppc_prep.c15
-rw-r--r--hw/primecell.h2
-rw-r--r--hw/pxa.h7
-rw-r--r--hw/pxa2xx.c12
-rw-r--r--hw/pxa2xx_lcd.c15
-rw-r--r--hw/r2d.c4
-rw-r--r--hw/realview.c4
-rw-r--r--hw/scsi-disk.c2
-rw-r--r--hw/shix.c2
-rw-r--r--hw/sm501.c31
-rw-r--r--hw/spitz.c20
-rw-r--r--hw/ssd0303.c12
-rw-r--r--hw/ssd0323.c12
-rw-r--r--hw/stellaris.c14
-rw-r--r--hw/sun4m.c73
-rw-r--r--hw/sun4m.h2
-rw-r--r--hw/sun4u.c20
-rw-r--r--hw/tc6393xb.c27
-rw-r--r--hw/tcx.c41
-rw-r--r--hw/tosa.c7
-rw-r--r--hw/versatilepb.c12
-rw-r--r--hw/vga.c193
-rw-r--r--hw/vga_int.h8
-rw-r--r--hw/virtio-console.c147
-rw-r--r--hw/virtio-console.h22
-rw-r--r--hw/vmware_vga.c29
-rw-r--r--kqemu.c70
-rw-r--r--linux-user/elfload.c4
-rw-r--r--linux-user/main.c35
-rw-r--r--linux-user/signal.c3
-rw-r--r--linux-user/vm86.c39
-rw-r--r--pc-bios/README2
-rw-r--r--pc-bios/openbios-ppcbin259168 -> 259168 bytes
-rw-r--r--posix-aio-compat.c4
-rw-r--r--posix-aio-compat.h2
-rw-r--r--qemu-char.c10
-rw-r--r--qemu-common.h26
-rw-r--r--qemu-doc.texi5
-rw-r--r--qemu-img.c5
-rw-r--r--qemu-lock.h2
-rw-r--r--qemu-log.h86
-rw-r--r--qemu-sockets.c2
-rw-r--r--sdl.c102
-rw-r--r--slirp/slirp.h3
-rw-r--r--sparc-dis.c1
-rw-r--r--sysemu.h9
-rw-r--r--target-alpha/translate.c37
-rw-r--r--target-arm/translate.c10
-rw-r--r--target-cris/helper.c26
-rw-r--r--target-cris/mmu.c12
-rw-r--r--target-cris/op_helper.c28
-rw-r--r--target-cris/translate.c309
-rw-r--r--target-i386/exec.h5
-rw-r--r--target-i386/op_helper.c128
-rw-r--r--target-i386/translate.c24
-rw-r--r--target-m68k/translate.c12
-rw-r--r--target-mips/helper.c75
-rw-r--r--target-mips/op_helper.c90
-rw-r--r--target-mips/translate.c213
-rw-r--r--target-mips/translate_init.c84
-rw-r--r--target-ppc/helper.c381
-rw-r--r--target-ppc/kvm_ppc.c2
-rw-r--r--target-ppc/op_helper.c89
-rw-r--r--target-ppc/translate.c75
-rw-r--r--target-sh4/helper.c8
-rw-r--r--target-sh4/helper.h1
-rw-r--r--target-sh4/op_helper.c11
-rw-r--r--target-sh4/translate.c30
-rw-r--r--target-sparc/helper.c1
-rw-r--r--target-sparc/op_helper.c24
-rw-r--r--target-sparc/translate.c19
-rw-r--r--tcg/tcg.c12
-rw-r--r--tcg/tcg.h2
-rw-r--r--tests/qruncom.c4
-rw-r--r--translate-all.c10
-rw-r--r--usb-bsd.c12
-rw-r--r--vl.c297
-rw-r--r--vnc.c404
-rw-r--r--vnchextile.h10
157 files changed, 3137 insertions, 2865 deletions
diff --git a/Makefile.target b/Makefile.target
index 2b1aa37c9..5e1b936b3 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -105,11 +105,6 @@ HELPER_CFLAGS+=-fomit-frame-pointer
OP_CFLAGS+=-mpreferred-stack-boundary=2 -fomit-frame-pointer
endif
-ifeq ($(ARCH),ppc)
-CPPFLAGS+= -D__powerpc__
-OP_CFLAGS+= -mlongcall
-endif
-
ifeq ($(ARCH),sparc)
CFLAGS+=-ffixed-g2 -ffixed-g3
OP_CFLAGS+=-fno-delayed-branch -ffixed-i0
@@ -608,7 +603,7 @@ ifndef CONFIG_USER_ONLY
OBJS=vl.o osdep.o monitor.o pci.o loader.o isa_mmio.o machine.o
# virtio has to be here due to weird dependency between PCI and virtio-net.
# need to fix this properly
-OBJS+=virtio.o virtio-blk.o virtio-balloon.o virtio-net.o
+OBJS+=virtio.o virtio-blk.o virtio-balloon.o virtio-net.o virtio-console.o
OBJS+=fw_cfg.o
ifdef CONFIG_KVM
OBJS+=kvm.o kvm-all.o
diff --git a/block-qcow2.c b/block-qcow2.c
index 9aa7261e3..d4556efa4 100644
--- a/block-qcow2.c
+++ b/block-qcow2.c
@@ -1809,6 +1809,12 @@ static int qcow_read_snapshots(BlockDriverState *bs)
int64_t offset;
uint32_t extra_data_size;
+ if (!s->nb_snapshots) {
+ s->snapshots = NULL;
+ s->snapshots_size = 0;
+ return 0;
+ }
+
offset = s->snapshots_offset;
s->snapshots = qemu_mallocz(s->nb_snapshots * sizeof(QCowSnapshot));
if (!s->snapshots)
@@ -2023,8 +2029,10 @@ static int qcow_snapshot_create(BlockDriverState *bs,
snapshots1 = qemu_malloc((s->nb_snapshots + 1) * sizeof(QCowSnapshot));
if (!snapshots1)
goto fail;
- memcpy(snapshots1, s->snapshots, s->nb_snapshots * sizeof(QCowSnapshot));
- qemu_free(s->snapshots);
+ if (s->snapshots) {
+ memcpy(snapshots1, s->snapshots, s->nb_snapshots * sizeof(QCowSnapshot));
+ qemu_free(s->snapshots);
+ }
s->snapshots = snapshots1;
s->snapshots[s->nb_snapshots++] = *sn;
diff --git a/block-raw-posix.c b/block-raw-posix.c
index 820de243a..0c2578770 100644
--- a/block-raw-posix.c
+++ b/block-raw-posix.c
@@ -68,8 +68,8 @@
//#define DEBUG_BLOCK
#if defined(DEBUG_BLOCK)
-#define DEBUG_BLOCK_PRINT(formatCstr, args...) do { if (loglevel != 0) \
- { fprintf(logfile, formatCstr, ##args); fflush(logfile); } } while (0)
+#define DEBUG_BLOCK_PRINT(formatCstr, args...) do { if (qemu_log_enabled()) \
+ { qemu_log(formatCstr, ##args); qemu_log_flush(); } } while (0)
#else
#define DEBUG_BLOCK_PRINT(formatCstr, args...)
#endif
@@ -253,7 +253,7 @@ static int raw_pwrite_aligned(BlockDriverState *bs, int64_t offset,
ret = fd_open(bs);
if (ret < 0)
- return ret;
+ return -errno;
if (offset >= 0 && lseek(s->fd, offset, SEEK_SET) == (off_t)-1) {
++(s->lseek_err_cnt);
@@ -263,7 +263,7 @@ static int raw_pwrite_aligned(BlockDriverState *bs, int64_t offset,
s->fd, bs->filename, offset, buf, count,
bs->total_sectors, errno, strerror(errno));
}
- return -1;
+ return -EIO;
}
s->lseek_err_cnt = 0;
@@ -278,7 +278,7 @@ static int raw_pwrite_aligned(BlockDriverState *bs, int64_t offset,
label__raw_write__success:
- return ret;
+ return (ret < 0) ? -errno : ret;
}
@@ -577,8 +577,7 @@ static RawAIOCB *raw_aio_setup(BlockDriverState *bs,
if (!acb)
return NULL;
acb->aiocb.aio_fildes = s->fd;
- acb->aiocb.aio_sigevent.sigev_signo = SIGUSR2;
- acb->aiocb.aio_sigevent.sigev_notify = SIGEV_SIGNAL;
+ acb->aiocb.sigev_signo = SIGUSR2;
acb->aiocb.aio_buf = buf;
if (nb_sectors < 0)
acb->aiocb.aio_nbytes = -nb_sectors;
diff --git a/block.c b/block.c
index dc744dd31..62b1e934d 100644
--- a/block.c
+++ b/block.c
@@ -566,21 +566,22 @@ int bdrv_write(BlockDriverState *bs, int64_t sector_num,
if (bs->read_only)
return -EACCES;
if (drv->bdrv_pwrite) {
- int ret, len;
+ int ret, len, count = 0;
len = nb_sectors * 512;
- ret = drv->bdrv_pwrite(bs, sector_num * 512, buf, len);
- if (ret < 0)
- return ret;
- else if (ret != len)
- return -EIO;
- else {
- bs->wr_bytes += (unsigned) len;
- bs->wr_ops ++;
- return 0;
- }
- } else {
- return drv->bdrv_write(bs, sector_num, buf, nb_sectors);
+ do {
+ ret = drv->bdrv_pwrite(bs, sector_num * 512, buf, len - count);
+ if (ret < 0) {
+ printf("bdrv_write ret=%d\n", ret);
+ return ret;
+ }
+ count += ret;
+ buf += ret;
+ } while (count != len);
+ bs->wr_bytes += (unsigned) len;
+ bs->wr_ops ++;
+ return 0;
}
+ return drv->bdrv_write(bs, sector_num, buf, nb_sectors);
}
static int bdrv_pread_em(BlockDriverState *bs, int64_t offset,
diff --git a/bsd-user/elfload.c b/bsd-user/elfload.c
index a04552935..de7b4de7d 100644
--- a/bsd-user/elfload.c
+++ b/bsd-user/elfload.c
@@ -12,7 +12,7 @@
#include "qemu.h"
#include "disas.h"
-#ifdef __powerpc64__
+#ifdef _ARCH_PPC64
#undef ARCH_DLINFO
#undef ELF_PLATFORM
#undef ELF_HWCAP
@@ -1456,7 +1456,7 @@ int load_elf_binary(struct linux_binprm * bprm, struct target_pt_regs * regs,
free(elf_phdata);
- if (loglevel)
+ if (qemu_log_enabled())
load_symbols(&elf_ex, bprm->fd);
if (interpreter_type != INTERPRETER_AOUT) close(bprm->fd);
diff --git a/bsd-user/main.c b/bsd-user/main.c
index 636f1dca0..b809f4326 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -533,21 +533,19 @@ int main(int argc, char **argv)
free(target_environ);
- if (loglevel) {
- page_dump(logfile);
-
- fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
- fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
- fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n",
- info->start_code);
- fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n",
- info->start_data);
- fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
- fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n",
- info->start_stack);
- fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
- fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
- }
+ log_page_dump();
+
+ qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
+ qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
+ qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
+ info->start_code);
+ qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
+ info->start_data);
+ qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
+ qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
+ info->start_stack);
+ qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
+ qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
target_set_brk(info->brk);
syscall_init();
@@ -558,7 +556,6 @@ int main(int argc, char **argv)
init_task_state(ts);
ts->info = info;
env->opaque = ts;
- env->user_mode_only = 1;
#if defined(TARGET_SPARC)
{
diff --git a/bswap.h b/bswap.h
index 08b77d937..63b81cc43 100644
--- a/bswap.h
+++ b/bswap.h
@@ -134,7 +134,7 @@ CPU_CONVERT(le, 64, uint64_t)
/* unaligned versions (optimized for frequent unaligned accesses)*/
-#if defined(__i386__) || defined(__powerpc__)
+#if defined(__i386__) || defined(_ARCH_PPC)
#define cpu_to_le16wu(p, v) cpu_to_le16w(p, v)
#define cpu_to_le32wu(p, v) cpu_to_le32w(p, v)
diff --git a/cache-utils.c b/cache-utils.c
index 73a824a07..b37ddd499 100644
--- a/cache-utils.c
+++ b/cache-utils.c
@@ -1,6 +1,6 @@
#include "cache-utils.h"
-#ifdef HOST_PPC
+#if defined(_ARCH_PPC)
struct qemu_cache_conf qemu_cache_conf = {
.dcache_bsize = 16,
.icache_bsize = 16
@@ -68,4 +68,4 @@ void qemu_cache_utils_init(char **envp)
}
#endif
-#endif /* HOST_PPC */
+#endif /* _ARCH_PPC */
diff --git a/cache-utils.h b/cache-utils.h
index 19b24ab4e..b45fde44e 100644
--- a/cache-utils.h
+++ b/cache-utils.h
@@ -1,9 +1,7 @@
#ifndef QEMU_CACHE_UTILS_H
#define QEMU_CACHE_UTILS_H
-#include "config-host.h"
-
-#ifdef HOST_PPC
+#if defined(_ARCH_PPC)
struct qemu_cache_conf {
unsigned long dcache_bsize;
unsigned long icache_bsize;
diff --git a/configure b/configure
index e2c83fdf6..ff4a46231 100755
--- a/configure
+++ b/configure
@@ -88,8 +88,14 @@ elif check_define __sparc__ ; then
else
cpu="sparc"
fi
+elif check_define _ARCH_PPC ; then
+ if check_define _ARCH_PPC64 ; then
+ cpu="ppc64"
+ else
+ cpu="ppc"
+ fi
else
- cpu=`test $(uname -s) = AIX && uname -p || uname -m`
+ cpu=`uname -m`
fi
target_list=""
@@ -127,8 +133,11 @@ case "$cpu" in
mips64)
cpu="mips64"
;;
- "Power Macintosh"|ppc|ppc64|powerpc)
- cpu="powerpc"
+ ppc)
+ cpu="ppc"
+ ;;
+ ppc64)
+ cpu="ppc64"
;;
s390*)
cpu="s390"
@@ -697,7 +706,8 @@ if test "$cpu" = "armv4b" \
-o "$cpu" = "m68k" \
-o "$cpu" = "mips" \
-o "$cpu" = "mips64" \
- -o "$cpu" = "powerpc" \
+ -o "$cpu" = "ppc" \
+ -o "$cpu" = "ppc64" \
-o "$cpu" = "s390" \
-o "$cpu" = "sparc" \
-o "$cpu" = "sparc64"; then
@@ -711,20 +721,11 @@ hostlongbits="32"
if test "$cpu" = "x86_64" \
-o "$cpu" = "alpha" \
-o "$cpu" = "ia64" \
- -o "$cpu" = "sparc64"; then
+ -o "$cpu" = "sparc64" \
+ -o "$cpu" = "ppc64"; then
hostlongbits="64"
fi
-# ppc specific hostlongbits selection
-if test "$cpu" = "powerpc" ; then
- if $cc $ARCH_CFLAGS -dM -E - -o $TMPI 2>/dev/null </dev/null; then
- grep -q __powerpc64__ $TMPI && hostlongbits=64
- else
- echo hostlongbits test failed
- exit 1
- fi
-fi
-
# check gcc options support
cat > $TMPC <<EOF
int main(void) {
@@ -1003,14 +1004,18 @@ fi
if test "$kvm" = "yes" ; then
cat > $TMPC <<EOF
#include <linux/kvm.h>
-#if !defined(KVM_API_VERSION) || \
- KVM_API_VERSION < 12 || \
- KVM_API_VERSION > 12 || \
- !defined(KVM_CAP_USER_MEMORY) || \
- !defined(KVM_CAP_SET_TSS_ADDR) || \
- !defined(KVM_CAP_DESTROY_MEMORY_REGION_WORKS)
+#if !defined(KVM_API_VERSION) || KVM_API_VERSION < 12 || KVM_API_VERSION > 12
#error Invalid KVM version
#endif
+#if !defined(KVM_CAP_USER_MEMORY)
+#error Missing KVM capability KVM_CAP_USER_MEMORY
+#endif
+#if !defined(KVM_CAP_SET_TSS_ADDR)
+#error Missing KVM capability KVM_CAP_SET_TSS_ADDR
+#endif
+#if !defined(KVM_CAP_DESTROY_MEMORY_REGION_WORKS)
+#error Missing KVM capability KVM_CAP_DESTROY_MEMORY_REGION_WORKS
+#endif
int main(void) { return 0; }
EOF
if test "$kerneldir" != "" ; then
@@ -1018,6 +1023,8 @@ EOF
if test \( "$cpu" = "i386" -o "$cpu" = "x86_64" \) \
-a -d "$kerneldir/arch/x86/include" ; then
kvm_cflags="$kvm_cflags -I$kerneldir/arch/x86/include"
+ elif test "$cpu" = "ppc" -a -d "$kerneldir/arch/powerpc/include" ; then
+ kvm_cflags="$kvm_cflags -I$kerneldir/arch/powerpc/include"
elif test -d "$kerneldir/arch/$cpu/include" ; then
kvm_cflags="$kvm_cflags -I$kerneldir/arch/$cpu/include"
fi
@@ -1028,7 +1035,16 @@ EOF
> /dev/null 2>/dev/null ; then
:
else
- kvm="no"
+ kvm="no";
+ if [ -x "`which awk 2>/dev/null`" ] && \
+ [ -x "`which grep 2>/dev/null`" ]; then
+ kvmerr=`$cc $ARCH_CFLAGS -o $TMPE ${OS_CFLAGS} $kvm_cflags $TMPC 2>&1 \
+ | grep "error: " \
+ | awk -F "error: " '{if (NR>1) printf(", "); printf("%s",$2);}'`
+ if test "$kvmerr" != "" ; then
+ kvm="no - (${kvmerr})"
+ fi
+ fi
fi
fi
@@ -1040,7 +1056,7 @@ if test "$aio" = "yes" ; then
aio=no
cat > $TMPC << EOF
#include <pthread.h>
-int main(void) { pthread_mutex_t lock; return 0; }
+int main(void) { pthread_mutex_t lock; return 0; }
EOF
if $cc $ARCH_CFLAGS -o $TMPE $AIOLIBS $TMPC 2> /dev/null ; then
aio=yes
@@ -1051,7 +1067,9 @@ fi
##########################################
# iovec probe
cat > $TMPC <<EOF
+#include <sys/types.h>
#include <sys/uio.h>
+#include <unistd.h>
int main(void) { struct iovec iov; return 0; }
EOF
iovec=no
@@ -1288,14 +1306,13 @@ case "$cpu" in
echo "ARCH=mips64" >> $config_mak
echo "#define HOST_MIPS64 1" >> $config_h
;;
- powerpc)
- if test "$hostlongbits" = "32"; then
- echo "ARCH=ppc" >> $config_mak
- echo "#define HOST_PPC 1" >> $config_h
- else
- echo "ARCH=ppc64" >> $config_mak
- echo "#define HOST_PPC64 1" >> $config_h
- fi
+ ppc)
+ echo "ARCH=ppc" >> $config_mak
+ echo "#define HOST_PPC 1" >> $config_h
+ ;;
+ ppc64)
+ echo "ARCH=ppc64" >> $config_mak
+ echo "#define HOST_PPC64 1" >> $config_h
;;
s390)
echo "ARCH=s390" >> $config_mak
@@ -1646,7 +1663,7 @@ if [ use_upstream_kvm = yes ]; then
# Make sure the target and host cpus are compatible
if test "$kvm" = "yes" -a ! \( "$target_cpu" = "$cpu" -o \
- \( "$target_cpu" = "ppcemb" -a "$cpu" = "powerpc" \) -o \
+ \( "$target_cpu" = "ppcemb" -a "$cpu" = "ppc" \) -o \
\( "$target_cpu" = "x86_64" -a "$cpu" = "i386" \) -o \
\( "$target_cpu" = "i386" -a "$cpu" = "x86_64" \) \) ; then
kvm="no"
diff --git a/console.c b/console.c
index 4e088d7a6..b452bca10 100644
--- a/console.c
+++ b/console.c
@@ -1044,12 +1044,15 @@ void console_select(unsigned int index)
if (index >= MAX_CONSOLES)
return;
+ active_console->g_width = ds_get_width(active_console->ds);
+ active_console->g_height = ds_get_height(active_console->ds);
s = consoles[index];
if (s) {
+ DisplayState *ds = s->ds;
active_console = s;
- if (s->console_type != TEXT_CONSOLE && s->g_width && s->g_height
- && (s->g_width != ds_get_width(s->ds) || s->g_height != ds_get_height(s->ds)))
- dpy_resize(s->ds, s->g_width, s->g_height);
+ ds->surface = qemu_resize_displaysurface(ds->surface, s->g_width,
+ s->g_height, 32, 4 * s->g_width);
+ dpy_resize(s->ds);
vga_hw_invalidate();
}
}
@@ -1157,16 +1160,6 @@ void kbd_put_keysym(int keysym)
static void text_console_invalidate(void *opaque)
{
TextConsole *s = (TextConsole *) opaque;
-
- if (s->g_width != ds_get_width(s->ds) || s->g_height != ds_get_height(s->ds)) {
- if (s->console_type == TEXT_CONSOLE_FIXED_SIZE)
- dpy_resize(s->ds, s->g_width, s->g_height);
- else {
- s->g_width = ds_get_width(s->ds);
- s->g_height = ds_get_height(s->ds);
- text_console_resize(s);
- }
- }
console_refresh(s);
}
@@ -1197,6 +1190,18 @@ static void text_console_update(void *opaque, console_ch_t *chardata)
}
}
+static TextConsole *get_graphic_console(DisplayState *ds)
+{
+ int i;
+ TextConsole *s;
+ for (i = 0; i < nb_consoles; i++) {
+ s = consoles[i];
+ if (s->console_type == GRAPHIC_CONSOLE && s->ds == ds)
+ return s;
+ }
+ return NULL;
+}
+
static TextConsole *new_console(DisplayState *ds, console_type_t console_type)
{
TextConsole *s;
@@ -1224,27 +1229,39 @@ static TextConsole *new_console(DisplayState *ds, console_type_t console_type)
consoles[i] = consoles[i - 1];
}
consoles[i] = s;
+ nb_consoles++;
}
return s;
}
-TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
- vga_hw_invalidate_ptr invalidate,
- vga_hw_screen_dump_ptr screen_dump,
- vga_hw_text_update_ptr text_update,
- void *opaque)
+DisplayState *graphic_console_init(vga_hw_update_ptr update,
+ vga_hw_invalidate_ptr invalidate,
+ vga_hw_screen_dump_ptr screen_dump,
+ vga_hw_text_update_ptr text_update,
+ void *opaque)
{
TextConsole *s;
+ DisplayState *ds;
+
+ ds = (DisplayState *) qemu_mallocz(sizeof(DisplayState));
+ if (ds == NULL)
+ return NULL;
+ ds->surface = qemu_create_displaysurface(640, 480, 32, 640 * 4);
s = new_console(ds, GRAPHIC_CONSOLE);
- if (!s)
- return NULL;
+ if (s == NULL) {
+ qemu_free_displaysurface(ds->surface);
+ qemu_free(ds);
+ return NULL;
+ }
s->hw_update = update;
s->hw_invalidate = invalidate;
s->hw_screen_dump = screen_dump;
s->hw_text_update = text_update;
s->hw = opaque;
- return s;
+
+ register_displaystate(ds);
+ return ds;
}
int is_graphic_console(void)
@@ -1262,27 +1279,27 @@ void console_color_init(DisplayState *ds)
int i, j;
for (j = 0; j < 2; j++) {
for (i = 0; i < 8; i++) {
- color_table[j][i] = col_expand(ds,
+ color_table[j][i] = col_expand(ds,
vga_get_color(ds, color_table_rgb[j][i]));
}
}
}
-CharDriverState *text_console_init(DisplayState *ds, const char *p)
+static int n_text_consoles;
+static CharDriverState *text_consoles[128];
+static char *text_console_strs[128];
+
+static void text_console_do_init(CharDriverState *chr, DisplayState *ds, const char *p)
{
- CharDriverState *chr;
TextConsole *s;
unsigned width;
unsigned height;
static int color_inited;
- chr = qemu_mallocz(sizeof(CharDriverState));
- if (!chr)
- return NULL;
s = new_console(ds, (p == 0) ? TEXT_CONSOLE : TEXT_CONSOLE_FIXED_SIZE);
if (!s) {
free(chr);
- return NULL;
+ return;
}
chr->opaque = s;
chr->chr_write = console_puts;
@@ -1292,6 +1309,7 @@ CharDriverState *text_console_init(DisplayState *ds, const char *p)
s->out_fifo.buf = s->out_fifo_buf;
s->out_fifo.buf_size = sizeof(s->out_fifo_buf);
s->kbd_timer = qemu_new_timer(rt_clock, kbd_send_chars, s);
+ s->ds = ds;
if (!color_inited) {
color_inited = 1;
@@ -1334,38 +1352,190 @@ CharDriverState *text_console_init(DisplayState *ds, const char *p)
s->t_attrib_default.unvisible = 0;
s->t_attrib_default.fgcol = COLOR_WHITE;
s->t_attrib_default.bgcol = COLOR_BLACK;
-
/* set current text attributes to default */
s->t_attrib = s->t_attrib_default;
text_console_resize(s);
qemu_chr_reset(chr);
+}
+
+CharDriverState *text_console_init(const char *p)
+{
+ CharDriverState *chr;
+
+ chr = qemu_mallocz(sizeof(CharDriverState));
+ if (!chr)
+ return NULL;
+
+ if (n_text_consoles == 128) {
+ fprintf(stderr, "Too many text consoles\n");
+ exit(1);
+ }
+ text_consoles[n_text_consoles] = chr;
+ text_console_strs[n_text_consoles] = p ? qemu_strdup(p) : NULL;
+ n_text_consoles++;
return chr;
}
-void qemu_console_resize(QEMUConsole *console, int width, int height)
+void text_consoles_set_display(DisplayState *ds)
{
- if (console->g_width != width || console->g_height != height
- || !ds_get_data(console->ds)) {
- console->g_width = width;
- console->g_height = height;
- if (active_console == console) {
- dpy_resize(console->ds, width, height);
- }
+ int i;
+
+ for (i = 0; i < n_text_consoles; i++) {
+ text_console_do_init(text_consoles[i], ds, text_console_strs[i]);
+ qemu_free(text_console_strs[i]);
}
+
+ n_text_consoles = 0;
}
-void qemu_console_copy(QEMUConsole *console, int src_x, int src_y,
- int dst_x, int dst_y, int w, int h)
+void qemu_console_resize(DisplayState *ds, int width, int height)
{
- if (active_console == console) {
- if (console->ds->dpy_copy)
- console->ds->dpy_copy(console->ds,
- src_x, src_y, dst_x, dst_y, w, h);
- else {
- /* TODO */
- console->ds->dpy_update(console->ds, dst_x, dst_y, w, h);
- }
+ TextConsole *s = get_graphic_console(ds);
+ s->g_width = width;
+ s->g_height = height;
+ if (is_graphic_console()) {
+ ds->surface = qemu_resize_displaysurface(ds->surface, width, height, 32, 4 * width);
+ dpy_resize(ds);
}
}
+
+void qemu_console_copy(DisplayState *ds, int src_x, int src_y,
+ int dst_x, int dst_y, int w, int h)
+{
+ if (is_graphic_console()) {
+ dpy_copy(ds, src_x, src_y, dst_x, dst_y, w, h);
+ }
+}
+
+static PixelFormat qemu_default_pixelformat(int bpp)
+{
+ PixelFormat pf;
+
+ memset(&pf, 0x00, sizeof(PixelFormat));
+
+ pf.bits_per_pixel = bpp;
+ pf.bytes_per_pixel = bpp / 8;
+ pf.depth = bpp == 32 ? 24 : bpp;
+
+ switch (bpp) {
+ case 8:
+ pf.rmask = 0x000000E0;
+ pf.gmask = 0x0000001C;
+ pf.bmask = 0x00000003;
+ pf.rmax = 7;
+ pf.gmax = 7;
+ pf.bmax = 3;
+ pf.rshift = 5;
+ pf.gshift = 2;
+ pf.bshift = 0;
+ break;
+ case 16:
+ pf.rmask = 0x0000F800;
+ pf.gmask = 0x000007E0;
+ pf.bmask = 0x0000001F;
+ pf.rmax = 31;
+ pf.gmax = 63;
+ pf.bmax = 31;
+ pf.rshift = 11;
+ pf.gshift = 5;
+ pf.bshift = 0;
+ break;
+ case 24:
+ case 32:
+ pf.rmask = 0x00FF0000;
+ pf.gmask = 0x0000FF00;
+ pf.bmask = 0x000000FF;
+ pf.rmax = 255;
+ pf.gmax = 255;
+ pf.bmax = 255;
+ pf.rshift = 16;
+ pf.gshift = 8;
+ pf.bshift = 0;
+ break;
+ default:
+ break;
+ }
+ return pf;
+}
+
+DisplaySurface* qemu_create_displaysurface(int width, int height, int bpp, int linesize)
+{
+ DisplaySurface *surface = (DisplaySurface*) qemu_mallocz(sizeof(DisplaySurface));
+ if (surface == NULL) {
+ fprintf(stderr, "qemu_create_displaysurface: malloc failed\n");
+ exit(1);
+ }
+
+ surface->width = width;
+ surface->height = height;
+ surface->linesize = linesize;
+ surface->pf = qemu_default_pixelformat(bpp);
+#ifdef WORDS_BIGENDIAN
+ surface->flags = QEMU_ALLOCATED_FLAG | QEMU_BIG_ENDIAN_FLAG;
+#else
+ surface->flags = QEMU_ALLOCATED_FLAG;
+#endif
+ surface->data = (uint8_t*) qemu_mallocz(surface->linesize * surface->height);
+ if (surface->data == NULL) {
+ fprintf(stderr, "qemu_create_displaysurface: malloc failed\n");
+ exit(1);
+ }
+
+ return surface;
+}
+
+DisplaySurface* qemu_resize_displaysurface(DisplaySurface *surface,
+ int width, int height, int bpp, int linesize)
+{
+ surface->width = width;
+ surface->height = height;
+ surface->linesize = linesize;
+ surface->pf = qemu_default_pixelformat(bpp);
+ if (surface->flags & QEMU_ALLOCATED_FLAG)
+ surface->data = (uint8_t*) qemu_realloc(surface->data, surface->linesize * surface->height);
+ else
+ surface->data = (uint8_t*) qemu_malloc(surface->linesize * surface->height);
+ if (surface->data == NULL) {
+ fprintf(stderr, "qemu_resize_displaysurface: malloc failed\n");
+ exit(1);
+ }
+#ifdef WORDS_BIGENDIAN
+ surface->flags = QEMU_ALLOCATED_FLAG | QEMU_BIG_ENDIAN_FLAG;
+#else
+ surface->flags = QEMU_ALLOCATED_FLAG;
+#endif
+
+ return surface;
+}
+
+DisplaySurface* qemu_create_displaysurface_from(int width, int height, int bpp,
+ int linesize, uint8_t *data)
+{
+ DisplaySurface *surface = (DisplaySurface*) qemu_mallocz(sizeof(DisplaySurface));
+ if (surface == NULL) {
+ fprintf(stderr, "qemu_create_displaysurface_from: malloc failed\n");
+ exit(1);
+ }
+
+ surface->width = width;
+ surface->height = height;
+ surface->linesize = linesize;
+ surface->pf = qemu_default_pixelformat(bpp);
+#ifdef WORDS_BIGENDIAN
+ surface->flags = QEMU_BIG_ENDIAN_FLAG;
+#endif
+ surface->data = data;
+
+ return surface;
+}
+
+void qemu_free_displaysurface(DisplaySurface *surface)
+{
+ if (surface == NULL)
+ return;
+ if (surface->flags & QEMU_ALLOCATED_FLAG)
+ qemu_free(surface->data);
+ qemu_free(surface);
+}
diff --git a/console.h b/console.h
index 6ee40cc2a..383ea1a39 100644
--- a/console.h
+++ b/console.h
@@ -73,70 +73,172 @@ void kbd_put_keysym(int keysym);
/* consoles */
-struct DisplayState {
- uint8_t *data;
- int linesize;
- int depth;
- int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
+#define QEMU_BIG_ENDIAN_FLAG 0x01
+#define QEMU_ALLOCATED_FLAG 0x02
+
+struct PixelFormat {
+ uint8_t bits_per_pixel;
+ uint8_t bytes_per_pixel;
+ uint8_t depth; /* color depth in bits */
+ uint32_t rmask, gmask, bmask, amask;
+ uint8_t rshift, gshift, bshift, ashift;
+ uint8_t rmax, gmax, bmax, amax;
+};
+
+struct DisplaySurface {
+ uint8_t flags;
int width;
int height;
- void *opaque;
- struct QEMUTimer *gui_timer;
+ int linesize; /* bytes per line */
+ uint8_t *data;
+
+ struct PixelFormat pf;
+};
+
+struct DisplayChangeListener {
+ int idle;
uint64_t gui_timer_interval;
- int idle; /* there is nothing to update (window invisible), set by vnc/sdl */
void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
- void (*dpy_resize)(struct DisplayState *s, int w, int h);
+ void (*dpy_resize)(struct DisplayState *s);
+ void (*dpy_setdata)(struct DisplayState *s);
void (*dpy_refresh)(struct DisplayState *s);
void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y,
int dst_x, int dst_y, int w, int h);
void (*dpy_fill)(struct DisplayState *s, int x, int y,
int w, int h, uint32_t c);
void (*dpy_text_cursor)(struct DisplayState *s, int x, int y);
+
+ struct DisplayChangeListener *next;
+};
+
+struct DisplayState {
+ struct DisplaySurface *surface;
+ void *opaque;
+ struct QEMUTimer *gui_timer;
+
+ struct DisplayChangeListener* listeners;
+
void (*mouse_set)(int x, int y, int on);
void (*cursor_define)(int width, int height, int bpp, int hot_x, int hot_y,
uint8_t *image, uint8_t *mask);
+
+ struct DisplayState *next;
};
+void register_displaystate(DisplayState *ds);
+DisplayState *get_displaystate(void);
+DisplaySurface* qemu_create_displaysurface(int width, int height, int bpp, int linesize);
+DisplaySurface* qemu_resize_displaysurface(DisplaySurface *surface,
+ int width, int height, int bpp, int linesize);
+DisplaySurface* qemu_create_displaysurface_from(int width, int height, int bpp,
+ int linesize, uint8_t *data);
+void qemu_free_displaysurface(DisplaySurface *surface);
+
+static inline int is_buffer_shared(DisplaySurface *surface)
+{
+ return (!(surface->flags & QEMU_ALLOCATED_FLAG));
+}
+
+static inline void register_displaychangelistener(DisplayState *ds, DisplayChangeListener *dcl)
+{
+ dcl->next = ds->listeners;
+ ds->listeners = dcl;
+}
+
static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
{
- s->dpy_update(s, x, y, w, h);
+ struct DisplayChangeListener *dcl = s->listeners;
+ while (dcl != NULL) {
+ dcl->dpy_update(s, x, y, w, h);
+ dcl = dcl->next;
+ }
}
-static inline void dpy_resize(DisplayState *s, int w, int h)
+static inline void dpy_resize(DisplayState *s)
{
- s->dpy_resize(s, w, h);
+ struct DisplayChangeListener *dcl = s->listeners;
+ while (dcl != NULL) {
+ dcl->dpy_resize(s);
+ dcl = dcl->next;
+ }
}
-static inline void dpy_cursor(DisplayState *s, int x, int y)
+static inline void dpy_setdata(DisplayState *s)
{
- if (s->dpy_text_cursor)
- s->dpy_text_cursor(s, x, y);
+ struct DisplayChangeListener *dcl = s->listeners;
+ while (dcl != NULL) {
+ if (dcl->dpy_setdata) dcl->dpy_setdata(s);
+ dcl = dcl->next;
+ }
+}
+
+static inline void dpy_refresh(DisplayState *s)
+{
+ struct DisplayChangeListener *dcl = s->listeners;
+ while (dcl != NULL) {
+ if (dcl->dpy_refresh) dcl->dpy_refresh(s);
+ dcl = dcl->next;
+ }
+}
+
+static inline void dpy_copy(struct DisplayState *s, int src_x, int src_y,
+ int dst_x, int dst_y, int w, int h) {
+ struct DisplayChangeListener *dcl = s->listeners;
+ while (dcl != NULL) {
+ if (dcl->dpy_copy)
+ dcl->dpy_copy(s, src_x, src_y, dst_x, dst_y, w, h);
+ else /* TODO */
+ dcl->dpy_update(s, dst_x, dst_y, w, h);
+ dcl = dcl->next;
+ }
+}
+
+static inline void dpy_fill(struct DisplayState *s, int x, int y,
+ int w, int h, uint32_t c) {
+ struct DisplayChangeListener *dcl = s->listeners;
+ while (dcl != NULL) {
+ if (dcl->dpy_fill) dcl->dpy_fill(s, x, y, w, h, c);
+ dcl = dcl->next;
+ }
+}
+
+static inline void dpy_cursor(struct DisplayState *s, int x, int y) {
+ struct DisplayChangeListener *dcl = s->listeners;
+ while (dcl != NULL) {
+ if (dcl->dpy_text_cursor) dcl->dpy_text_cursor(s, x, y);
+ dcl = dcl->next;
+ }
}
static inline int ds_get_linesize(DisplayState *ds)
{
- return ds->linesize;
+ return ds->surface->linesize;
}
static inline uint8_t* ds_get_data(DisplayState *ds)
{
- return ds->data;
+ return ds->surface->data;
}
static inline int ds_get_width(DisplayState *ds)
{
- return ds->width;
+ return ds->surface->width;
}
static inline int ds_get_height(DisplayState *ds)
{
- return ds->height;
+ return ds->surface->height;
}
static inline int ds_get_bits_per_pixel(DisplayState *ds)
{
- return ds->depth;
+ return ds->surface->pf.bits_per_pixel;
+}
+
+static inline int ds_get_bytes_per_pixel(DisplayState *ds)
+{
+ return ds->surface->pf.bytes_per_pixel;
}
typedef unsigned long console_ch_t;
@@ -150,11 +252,12 @@ typedef void (*vga_hw_invalidate_ptr)(void *);
typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
typedef void (*vga_hw_text_update_ptr)(void *, console_ch_t *);
-TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
- vga_hw_invalidate_ptr invalidate,
- vga_hw_screen_dump_ptr screen_dump,
- vga_hw_text_update_ptr text_update,
- void *opaque);
+DisplayState *graphic_console_init(vga_hw_update_ptr update,
+ vga_hw_invalidate_ptr invalidate,
+ vga_hw_screen_dump_ptr screen_dump,
+ vga_hw_text_update_ptr text_update,
+ void *opaque);
+
void vga_hw_update(void);
void vga_hw_invalidate(void);
void vga_hw_screen_dump(const char *filename);
@@ -162,12 +265,13 @@ void vga_hw_text_update(console_ch_t *chardata);
int is_graphic_console(void);
int is_fixedsize_console(void);
-CharDriverState *text_console_init(DisplayState *ds, const char *p);
+CharDriverState *text_console_init(const char *p);
+void text_consoles_set_display(DisplayState *ds);
void console_select(unsigned int index);
void console_color_init(DisplayState *ds);
-void qemu_console_resize(QEMUConsole *console, int width, int height);
-void qemu_console_copy(QEMUConsole *console, int src_x, int src_y,
- int dst_x, int dst_y, int w, int h);
+void qemu_console_resize(DisplayState *ds, int width, int height);
+void qemu_console_copy(DisplayState *ds, int src_x, int src_y,
+ int dst_x, int dst_y, int w, int h);
/* sdl.c */
void sdl_display_init(DisplayState *ds, int full_screen, int no_frame);
diff --git a/cpu-all.h b/cpu-all.h
index 7a0539ba2..2b27ab81b 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -20,6 +20,8 @@
#ifndef CPU_ALL_H
#define CPU_ALL_H
+#include "qemu-common.h"
+
#if defined(__arm__) || defined(__sparc__) || defined(__mips__) || defined(__hppa__)
#define WORDS_ALIGNED
#endif
@@ -229,7 +231,7 @@ static inline void stb_p(void *ptr, int v)
/* conservative code for little endian unaligned accesses */
static inline int lduw_le_p(const void *ptr)
{
-#ifdef __powerpc__
+#ifdef _ARCH_PPC
int val;
__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
return val;
@@ -241,7 +243,7 @@ static inline int lduw_le_p(const void *ptr)
static inline int ldsw_le_p(const void *ptr)
{
-#ifdef __powerpc__
+#ifdef _ARCH_PPC
int val;
__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
return (int16_t)val;
@@ -253,7 +255,7 @@ static inline int ldsw_le_p(const void *ptr)
static inline int ldl_le_p(const void *ptr)
{
-#ifdef __powerpc__
+#ifdef _ARCH_PPC
int val;
__asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (ptr));
return val;
@@ -274,7 +276,7 @@ static inline uint64_t ldq_le_p(const void *ptr)
static inline void stw_le_p(void *ptr, int v)
{
-#ifdef __powerpc__
+#ifdef _ARCH_PPC
__asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*(uint16_t *)ptr) : "r" (v), "r" (ptr));
#else
uint8_t *p = ptr;
@@ -285,7 +287,7 @@ static inline void stw_le_p(void *ptr, int v)
static inline void stl_le_p(void *ptr, int v)
{
-#ifdef __powerpc__
+#ifdef _ARCH_PPC
__asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*(uint32_t *)ptr) : "r" (v), "r" (ptr));
#else
uint8_t *p = ptr;
@@ -751,9 +753,8 @@ void cpu_dump_statistics (CPUState *env, FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
int flags);
-void cpu_abort(CPUState *env, const char *fmt, ...)
- __attribute__ ((__format__ (__printf__, 2, 3)))
- __attribute__ ((__noreturn__));
+void noreturn cpu_abort(CPUState *env, const char *fmt, ...)
+ __attribute__ ((__format__ (__printf__, 2, 3)));
extern CPUState *first_cpu;
extern CPUState *cpu_single_env;
extern int64_t qemu_icount;
@@ -987,7 +988,7 @@ void qemu_unregister_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
/*******************************************/
/* host CPU ticks (if available) */
-#if defined(__powerpc__)
+#if defined(_ARCH_PPC)
static inline uint32_t get_tbl(void)
{
diff --git a/cpu-defs.h b/cpu-defs.h
index acbe380c2..2021c6ea6 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -216,8 +216,6 @@ struct KVMCPUState {
jmp_buf jmp_env; \
int exception_index; \
\
- int user_mode_only; \
- \
void *next_cpu; /* next CPU sharing TB cache */ \
int cpu_index; /* CPU index (informative) */ \
int running; /* Nonzero if cpu is currently running(usermode). */ \
diff --git a/cpu-exec.c b/cpu-exec.c
index 430187f1c..2132d64da 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -268,7 +268,8 @@ int cpu_exec(CPUState *env1)
if (ret == EXCP_DEBUG)
cpu_handle_debug_exception(env);
break;
- } else if (env->user_mode_only) {
+ } else {
+#if defined(CONFIG_USER_ONLY)
/* if user mode only, we simulate a fake exception
which will be handled outside the cpu execution
loop */
@@ -282,7 +283,7 @@ int cpu_exec(CPUState *env1)
#endif
ret = env->exception_index;
break;
- } else {
+#else
#if defined(TARGET_I386)
/* simulate a real cpu exception. On i386, it can
trigger new exceptions, but we do not handle
@@ -312,6 +313,7 @@ int cpu_exec(CPUState *env1)
#elif defined(TARGET_IA64)
do_interrupt(env);
#endif
+#endif
}
env->exception_index = -1;
}
@@ -401,9 +403,7 @@ int cpu_exec(CPUState *env1)
svm_check_intercept(SVM_EXIT_INTR);
env->interrupt_request &= ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIRQ);
intno = cpu_get_pic_interrupt(env);
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "Servicing hardware INT=0x%02x\n", intno);
- }
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=0x%02x\n", intno);
do_interrupt(intno, 0, 0, 0, 1);
/* ensure that no TB jump will be modified as
the program flow was changed */
@@ -416,8 +416,7 @@ int cpu_exec(CPUState *env1)
/* FIXME: this should respect TPR */
svm_check_intercept(SVM_EXIT_VINTR);
intno = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_vector));
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile, "Servicing virtual hardware INT=0x%02x\n", intno);
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing virtual hardware INT=0x%02x\n", intno);
do_interrupt(intno, 0, 0, 0, 1);
env->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
next_tb = 0;
@@ -546,33 +545,33 @@ int cpu_exec(CPUState *env1)
}
}
#ifdef DEBUG_EXEC
- if ((loglevel & CPU_LOG_TB_CPU)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
/* restore flags in standard format */
regs_to_env();
#if defined(TARGET_I386)
env->eflags = env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
- cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
+ log_cpu_state(env, X86_DUMP_CCOP);
env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
#elif defined(TARGET_ARM)
- cpu_dump_state(env, logfile, fprintf, 0);
+ log_cpu_state(env, 0);
#elif defined(TARGET_SPARC)
- cpu_dump_state(env, logfile, fprintf, 0);
+ log_cpu_state(env, 0);
#elif defined(TARGET_PPC)
- cpu_dump_state(env, logfile, fprintf, 0);
+ log_cpu_state(env, 0);
#elif defined(TARGET_M68K)
cpu_m68k_flush_flags(env, env->cc_op);
env->cc_op = CC_OP_FLAGS;
env->sr = (env->sr & 0xffe0)
| env->cc_dest | (env->cc_x << 4);
- cpu_dump_state(env, logfile, fprintf, 0);
+ log_cpu_state(env, 0);
#elif defined(TARGET_MIPS)
- cpu_dump_state(env, logfile, fprintf, 0);
+ log_cpu_state(env, 0);
#elif defined(TARGET_SH4)
- cpu_dump_state(env, logfile, fprintf, 0);
+ log_cpu_state(env, 0);
#elif defined(TARGET_ALPHA)
- cpu_dump_state(env, logfile, fprintf, 0);
+ log_cpu_state(env, 0);
#elif defined(TARGET_CRIS)
- cpu_dump_state(env, logfile, fprintf, 0);
+ log_cpu_state(env, 0);
#else
#error unsupported target CPU
#endif
@@ -590,11 +589,9 @@ int cpu_exec(CPUState *env1)
tb_invalidated_flag = 0;
}
#ifdef DEBUG_EXEC
- if ((loglevel & CPU_LOG_EXEC)) {
- fprintf(logfile, "Trace 0x%08lx [" TARGET_FMT_lx "] %s\n",
- (long)tb->tc_ptr, tb->pc,
- lookup_symbol(tb->pc));
- }
+ qemu_log_mask(CPU_LOG_EXEC, "Trace 0x%08lx [" TARGET_FMT_lx "] %s\n",
+ (long)tb->tc_ptr, tb->pc,
+ lookup_symbol(tb->pc));
#endif
/* see if we can patch the calling TB. When the TB
spans two pages, we cannot safely do a direct
@@ -1232,7 +1229,7 @@ int cpu_signal_handler(int host_signum, void *pinfo,
&uc->uc_sigmask, puc);
}
-#elif defined(__powerpc__)
+#elif defined(_ARCH_PPC)
/***********************************************************************
* signal context platform-specific definitions
diff --git a/curses.c b/curses.c
index 7c82377ef..b3aa01192 100644
--- a/curses.c
+++ b/curses.c
@@ -97,13 +97,13 @@ static void curses_calc_pad(void)
}
}
-static void curses_resize(DisplayState *ds, int w, int h)
+static void curses_resize(DisplayState *ds)
{
- if (w == gwidth && h == gheight)
+ if (ds_get_width(ds) == gwidth && ds_get_height(ds) == gheight)
return;
- gwidth = w;
- gheight = h;
+ gwidth = ds_get_width(ds);
+ gheight = ds_get_height(ds);
curses_calc_pad();
}
@@ -169,8 +169,8 @@ static void curses_refresh(DisplayState *ds)
clear();
refresh();
curses_calc_pad();
- ds->width = FONT_WIDTH * width;
- ds->height = FONT_HEIGHT * height;
+ ds->surface->width = FONT_WIDTH * width;
+ ds->surface->height = FONT_HEIGHT * height;
vga_hw_invalidate();
invalidate = 0;
}
@@ -197,8 +197,8 @@ static void curses_refresh(DisplayState *ds)
refresh();
curses_calc_pad();
curses_update(ds, 0, 0, width, height);
- ds->width = FONT_WIDTH * width;
- ds->height = FONT_HEIGHT * height;
+ ds->surface->width = FONT_WIDTH * width;
+ ds->surface->height = FONT_HEIGHT * height;
continue;
}
#endif
@@ -338,6 +338,7 @@ static void curses_keyboard_setup(void)
void curses_display_init(DisplayState *ds, int full_screen)
{
+ DisplayChangeListener *dcl;
#ifndef _WIN32
if (!isatty(1)) {
fprintf(stderr, "We need a terminal output\n");
@@ -357,18 +358,19 @@ void curses_display_init(DisplayState *ds, int full_screen)
#endif
#endif
- ds->data = (void *) screen;
- ds->linesize = 0;
- ds->depth = 0;
- ds->width = 640;
- ds->height = 400;
- ds->dpy_update = curses_update;
- ds->dpy_resize = curses_resize;
- ds->dpy_refresh = curses_refresh;
- ds->dpy_text_cursor = curses_cursor_position;
+ dcl = (DisplayChangeListener *) qemu_mallocz(sizeof(DisplayChangeListener));
+ if (!dcl)
+ exit(1);
+ dcl->dpy_update = curses_update;
+ dcl->dpy_resize = curses_resize;
+ dcl->dpy_refresh = curses_refresh;
+ dcl->dpy_text_cursor = curses_cursor_position;
+ register_displaychangelistener(ds, dcl);
+ qemu_free_displaysurface(ds->surface);
+ ds->surface = qemu_create_displaysurface_from(80, 25, 0, 0, (uint8_t*) screen);
invalidate = 1;
/* Standard VGA initial text mode dimensions */
- curses_resize(ds, 80, 25);
+ curses_resize(ds);
}
diff --git a/darwin-user/commpage.c b/darwin-user/commpage.c
index 2b920b528..8961bef44 100644
--- a/darwin-user/commpage.c
+++ b/darwin-user/commpage.c
@@ -35,9 +35,9 @@
//#define DEBUG_COMMPAGE
#ifdef DEBUG_COMMPAGE
-# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); printf(__VA_ARGS__); } while(0)
+# define DPRINTF(...) do { qemu_log(__VA_ARGS__); printf(__VA_ARGS__); } while(0)
#else
-# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); } while(0)
+# define DPRINTF(...) do { qemu_log(__VA_ARGS__); } while(0)
#endif
/********************************************************************
@@ -181,7 +181,7 @@ static inline void install_commpage_backdoor_for_entry(struct commpage_entry ent
*/
void commpage_init(void)
{
-#if (defined(__i386__) ^ defined(TARGET_I386)) || (defined(__powerpc__) ^ defined(TARGET_PPC))
+#if (defined(__i386__) ^ defined(TARGET_I386)) || (defined(_ARCH_PPC) ^ defined(TARGET_PPC))
int i;
void * commpage = (void *)target_mmap( COMMPAGE_START, COMMPAGE_SIZE,
PROT_WRITE | PROT_READ, MAP_ANONYMOUS | MAP_FIXED, -1, 0);
diff --git a/darwin-user/machload.c b/darwin-user/machload.c
index 9d7aaf540..794aefa17 100644
--- a/darwin-user/machload.c
+++ b/darwin-user/machload.c
@@ -39,9 +39,9 @@
//#define DEBUG_MACHLOAD
#ifdef DEBUG_MACHLOAD
-# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); printf(__VA_ARGS__); } while(0)
+# define DPRINTF(...) do { qemu_log(__VA_ARGS__); printf(__VA_ARGS__); } while(0)
#else
-# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); } while(0)
+# define DPRINTF(...) do { qemu_log(__VA_ARGS__); } while(0)
#endif
# define check_mach_header(x) (x.magic == MH_CIGAM)
diff --git a/darwin-user/main.c b/darwin-user/main.c
index 3edad73d2..24e738b3a 100644
--- a/darwin-user/main.c
+++ b/darwin-user/main.c
@@ -160,10 +160,8 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
do { \
fprintf(stderr, fmt , ##args); \
cpu_dump_state(env, stderr, fprintf, 0); \
- if (loglevel != 0) { \
- fprintf(logfile, fmt , ##args); \
- cpu_dump_state(env, logfile, fprintf, 0); \
- } \
+ qemu_log(fmt, ##args); \
+ log_cpu_state(env, 0); \
} while (0)
void cpu_loop(CPUPPCState *env)
@@ -896,7 +894,6 @@ int main(int argc, char **argv)
memset(ts, 0, sizeof(TaskState));
env->opaque = ts;
ts->used = 1;
- env->user_mode_only = 1;
#if defined(TARGET_I386)
cpu_x86_set_cpl(env, 3);
diff --git a/darwin-user/signal.c b/darwin-user/signal.c
index 1337cd2b1..d32142547 100644
--- a/darwin-user/signal.c
+++ b/darwin-user/signal.c
@@ -37,6 +37,7 @@
#include <signal.h>
#include "qemu.h"
+#include "qemu-common.h"
#define DEBUG_SIGNAL
@@ -132,7 +133,7 @@ static inline void free_sigqueue(struct sigqueue *q)
}
/* abort execution with signal */
-void __attribute((noreturn)) force_sig(int sig)
+void noreturn force_sig(int sig)
{
int host_sig;
host_sig = target_to_host_signal(sig);
diff --git a/darwin-user/syscall.c b/darwin-user/syscall.c
index 8d56de7ed..130d33c6b 100644
--- a/darwin-user/syscall.c
+++ b/darwin-user/syscall.c
@@ -69,7 +69,7 @@
# define DEBUG_ENABLE_ALL() static int __DEBUG_qemu_user_force_enable = 1
DEBUG_ENABLE_ALL();
-# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); \
+# define DPRINTF(...) do { qemu_log(__VA_ARGS__); \
if(__DEBUG_qemu_user_force_enable) fprintf(stderr, __VA_ARGS__); \
} while(0)
#else
@@ -77,7 +77,7 @@
# define DEBUG_BEGIN_ENABLE
# define DEBUG_END_ENABLE
-# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); } while(0)
+# define DPRINTF(...) do { qemu_log(__VA_ARGS__); } while(0)
#endif
enum {
diff --git a/disas.c b/disas.c
index 715c7d2d6..83c8826b4 100644
--- a/disas.c
+++ b/disas.c
@@ -250,7 +250,7 @@ void disas(FILE *out, void *code, unsigned long size)
#elif defined(__x86_64__)
disasm_info.mach = bfd_mach_x86_64;
print_insn = print_insn_i386;
-#elif defined(__powerpc__)
+#elif defined(_ARCH_PPC)
print_insn = print_insn_ppc;
#elif defined(__alpha__)
print_insn = print_insn_alpha;
diff --git a/dyngen-exec.h b/dyngen-exec.h
index 11e6dea35..4693eac83 100644
--- a/dyngen-exec.h
+++ b/dyngen-exec.h
@@ -41,7 +41,7 @@ typedef unsigned int uint32_t;
// Linux/Sparc64 defines uint64_t
#if !(defined (__sparc_v9__) && defined(__linux__)) && !(defined(__APPLE__) && defined(__x86_64__))
/* XXX may be done for all 64 bits targets ? */
-#if defined (__x86_64__) || defined(__ia64) || defined(__s390x__) || defined(__alpha__) || defined(__powerpc64__)
+#if defined (__x86_64__) || defined(__ia64) || defined(__s390x__) || defined(__alpha__) || defined(_ARCH_PPC64)
typedef unsigned long uint64_t;
#else
typedef unsigned long long uint64_t;
@@ -58,7 +58,7 @@ typedef signed short int16_t;
typedef signed int int32_t;
// Linux/Sparc64 defines int64_t
#if !(defined (__sparc_v9__) && defined(__linux__)) && !(defined(__APPLE__) && defined(__x86_64__))
-#if defined (__x86_64__) || defined(__ia64) || defined(__s390x__) || defined(__alpha__) || defined(__powerpc64__)
+#if defined (__x86_64__) || defined(__ia64) || defined(__s390x__) || defined(__alpha__) || defined(_ARCH_PPC64)
typedef signed long int64_t;
#else
typedef signed long long int64_t;
@@ -105,7 +105,7 @@ extern int printf(const char *, ...);
#define AREG3 "r13"
//#define AREG4 "rbp"
//#define AREG5 "rbx"
-#elif defined(__powerpc__)
+#elif defined(_ARCH_PPC)
#define AREG0 "r27"
#define AREG1 "r24"
#define AREG2 "r25"
diff --git a/exec-all.h b/exec-all.h
index 4b828c591..1b28bbcf1 100644
--- a/exec-all.h
+++ b/exec-all.h
@@ -20,6 +20,9 @@
#ifndef _EXEC_ALL_H_
#define _EXEC_ALL_H_
+
+#include "qemu-common.h"
+
/* allow to see translation results - the slowdown should be negligible, so we leave it */
#define DEBUG_DISAS
@@ -82,7 +85,7 @@ TranslationBlock *tb_gen_code(CPUState *env,
target_ulong pc, target_ulong cs_base, int flags,
int cflags);
void cpu_exec_init(CPUState *env);
-void cpu_loop_exit(void);
+void noreturn cpu_loop_exit(void);
int page_unprotect(target_ulong address, unsigned long pc, void *puc);
void tb_invalidate_phys_page_range(target_phys_addr_t start, target_phys_addr_t end,
int is_cpu_write_access);
@@ -117,7 +120,7 @@ static inline int tlb_set_page(CPUState *env1, target_ulong vaddr,
#define CODE_GEN_AVG_BLOCK_SIZE 64
#endif
-#if defined(__powerpc__) || defined(__x86_64__) || defined(__arm__)
+#if defined(_ARCH_PPC) || defined(__x86_64__) || defined(__arm__)
#define USE_DIRECT_JUMP
#endif
#if defined(__i386__) && !defined(_WIN32)
@@ -192,7 +195,7 @@ extern int code_gen_max_blocks;
#if defined(USE_DIRECT_JUMP)
-#if defined(__powerpc__)
+#if defined(_ARCH_PPC)
extern void ppc_tb_set_jmp_target(unsigned long jmp_addr, unsigned long addr);
#define tb_set_jmp_target1 ppc_tb_set_jmp_target
#elif defined(__i386__) || defined(__x86_64__)
diff --git a/exec.c b/exec.c
index 545e86411..e2660f11c 100644
--- a/exec.c
+++ b/exec.c
@@ -1020,12 +1020,10 @@ static inline void tb_invalidate_phys_page_fast(target_phys_addr_t start, int le
int offset, b;
#if 0
if (1) {
- if (loglevel) {
- fprintf(logfile, "modifying code at 0x%x size=%d EIP=%x PC=%08x\n",
- cpu_single_env->mem_io_vaddr, len,
- cpu_single_env->eip,
- cpu_single_env->eip + (long)cpu_single_env->segs[R_CS].base);
- }
+ qemu_log("modifying code at 0x%x size=%d EIP=%x PC=%08x\n",
+ cpu_single_env->mem_io_vaddr, len,
+ cpu_single_env->eip,
+ cpu_single_env->eip + (long)cpu_single_env->segs[R_CS].base);
}
#endif
p = page_find(start >> TARGET_PAGE_BITS);
@@ -1656,17 +1654,17 @@ void cpu_abort(CPUState *env, const char *fmt, ...)
#else
cpu_dump_state(env, stderr, fprintf, 0);
#endif
- if (logfile) {
- fprintf(logfile, "qemu: fatal: ");
- vfprintf(logfile, fmt, ap2);
- fprintf(logfile, "\n");
+ if (qemu_log_enabled()) {
+ qemu_log("qemu: fatal: ");
+ qemu_log_vprintf(fmt, ap2);
+ qemu_log("\n");
#ifdef TARGET_I386
- cpu_dump_state(env, logfile, fprintf, X86_DUMP_FPU | X86_DUMP_CCOP);
+ log_cpu_state(env, X86_DUMP_FPU | X86_DUMP_CCOP);
#else
- cpu_dump_state(env, logfile, fprintf, 0);
+ log_cpu_state(env, 0);
#endif
- fflush(logfile);
- fclose(logfile);
+ qemu_log_flush();
+ qemu_log_close();
}
va_end(ap2);
va_end(ap);
@@ -1676,12 +1674,34 @@ void cpu_abort(CPUState *env, const char *fmt, ...)
CPUState *cpu_copy(CPUState *env)
{
CPUState *new_env = cpu_init(env->cpu_model_str);
- /* preserve chaining and index */
CPUState *next_cpu = new_env->next_cpu;
int cpu_index = new_env->cpu_index;
+#if defined(TARGET_HAS_ICE)
+ CPUBreakpoint *bp;
+ CPUWatchpoint *wp;
+#endif
+
memcpy(new_env, env, sizeof(CPUState));
+
+ /* Preserve chaining and index. */
new_env->next_cpu = next_cpu;
new_env->cpu_index = cpu_index;
+
+ /* Clone all break/watchpoints.
+ Note: Once we support ptrace with hw-debug register access, make sure
+ BP_CPU break/watchpoints are handled correctly on clone. */
+ TAILQ_INIT(&env->breakpoints);
+ TAILQ_INIT(&env->watchpoints);
+#if defined(TARGET_HAS_ICE)
+ TAILQ_FOREACH(bp, &env->breakpoints, entry) {
+ cpu_breakpoint_insert(new_env, bp->pc, bp->flags, NULL);
+ }
+ TAILQ_FOREACH(wp, &env->watchpoints, entry) {
+ cpu_watchpoint_insert(new_env, wp->vaddr, (~wp->len_mask) + 1,
+ wp->flags, NULL);
+ }
+#endif
+
return new_env;
}
diff --git a/fpu/softfloat-native.c b/fpu/softfloat-native.c
index 7273ae5b4..9eba03540 100644
--- a/fpu/softfloat-native.c
+++ b/fpu/softfloat-native.c
@@ -51,7 +51,7 @@ ldexpl(long double x, int n) {
#endif
#endif
-#if defined(__powerpc__)
+#if defined(_ARCH_PPC)
/* correct (but slow) PowerPC rint() (glibc version is incorrect) */
double qemu_rint(double x)
diff --git a/gdbstub.c b/gdbstub.c
index 470138265..ce3ea490b 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -88,7 +88,11 @@ static int gdb_signal_table[] = {
-1, /* SIGLOST */
TARGET_SIGUSR1,
TARGET_SIGUSR2,
+#ifdef TARGET_SIGPWR
TARGET_SIGPWR,
+#else
+ -1,
+#endif
-1, /* SIGPOLL */
-1,
-1,
@@ -101,6 +105,7 @@ static int gdb_signal_table[] = {
-1,
-1,
-1,
+#ifdef __SIGRTMIN
__SIGRTMIN + 1,
__SIGRTMIN + 2,
__SIGRTMIN + 3,
@@ -207,6 +212,7 @@ static int gdb_signal_table[] = {
-1,
-1,
-1
+#endif
};
#else
/* In system mode we only need SIGINT and SIGTRAP; other signals
diff --git a/hw/alpha_palcode.c b/hw/alpha_palcode.c
index 151f3c2ab..bfffb5d29 100644
--- a/hw/alpha_palcode.c
+++ b/hw/alpha_palcode.c
@@ -1061,13 +1061,11 @@ void call_pal (CPUState *env, int palcode)
{
target_long ret;
- if (logfile != NULL)
- fprintf(logfile, "%s: palcode %02x\n", __func__, palcode);
+ qemu_log("%s: palcode %02x\n", __func__, palcode);
switch (palcode) {
case 0x83:
/* CALLSYS */
- if (logfile != NULL)
- fprintf(logfile, "CALLSYS n " TARGET_FMT_ld "\n", env->ir[0]);
+ qemu_log("CALLSYS n " TARGET_FMT_ld "\n", env->ir[0]);
ret = do_syscall(env, env->ir[IR_V0], env->ir[IR_A0], env->ir[IR_A1],
env->ir[IR_A2], env->ir[IR_A3], env->ir[IR_A4],
env->ir[IR_A5]);
@@ -1082,18 +1080,15 @@ void call_pal (CPUState *env, int palcode)
case 0x9E:
/* RDUNIQUE */
env->ir[IR_V0] = env->unique;
- if (logfile != NULL)
- fprintf(logfile, "RDUNIQUE: " TARGET_FMT_lx "\n", env->unique);
+ qemu_log("RDUNIQUE: " TARGET_FMT_lx "\n", env->unique);
break;
case 0x9F:
/* WRUNIQUE */
env->unique = env->ir[IR_A0];
- if (logfile != NULL)
- fprintf(logfile, "WRUNIQUE: " TARGET_FMT_lx "\n", env->unique);
+ qemu_log("WRUNIQUE: " TARGET_FMT_lx "\n", env->unique);
break;
default:
- if (logfile != NULL)
- fprintf(logfile, "%s: unhandled palcode %02x\n",
+ qemu_log("%s: unhandled palcode %02x\n",
__func__, palcode);
exit(1);
}
diff --git a/hw/an5206.c b/hw/an5206.c
index 98f35e332..419d41615 100644
--- a/hw/an5206.c
+++ b/hw/an5206.c
@@ -27,7 +27,7 @@ void irq_info(void)
/* Board init. */
static void an5206_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
diff --git a/hw/apic.c b/hw/apic.c
index f9ef9955e..782b3986a 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -105,6 +105,8 @@ struct IOAPICState {
static int apic_io_memory;
static APICState *local_apics[MAX_APICS + 1];
static int last_apic_id = 0;
+static int apic_irq_delivered;
+
static void apic_init_ipi(APICState *s);
static void apic_set_irq(APICState *s, int vector_num, int trigger_mode);
@@ -138,6 +140,14 @@ static inline void reset_bit(uint32_t *tab, int index)
tab[i] &= ~mask;
}
+static inline int get_bit(uint32_t *tab, int index)
+{
+ int i, mask;
+ i = index >> 5;
+ mask = 1 << (index & 0x1f);
+ return !!(tab[i] & mask);
+}
+
static void apic_local_deliver(CPUState *env, int vector)
{
APICState *s = env->apic_state;
@@ -357,8 +367,20 @@ static void apic_update_irq(APICState *s)
cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD);
}
+void apic_reset_irq_delivered(void)
+{
+ apic_irq_delivered = 0;
+}
+
+int apic_get_irq_delivered(void)
+{
+ return apic_irq_delivered;
+}
+
static void apic_set_irq(APICState *s, int vector_num, int trigger_mode)
{
+ apic_irq_delivered += !get_bit(s->irr, vector_num);
+
set_bit(s->irr, vector_num);
if (trigger_mode)
set_bit(s->tmr, vector_num);
diff --git a/hw/blizzard.c b/hw/blizzard.c
index eeaacdd3f..83f13bca5 100644
--- a/hw/blizzard.c
+++ b/hw/blizzard.c
@@ -72,7 +72,6 @@ struct blizzard_s {
uint8_t iformat;
uint8_t source;
DisplayState *state;
- QEMUConsole *console;
blizzard_fn_t *line_fn_tab[2];
void *fb;
@@ -896,7 +895,7 @@ static void blizzard_update_display(void *opaque)
if (s->x != ds_get_width(s->state) || s->y != ds_get_height(s->state)) {
s->invalidate = 1;
- qemu_console_resize(s->console, s->x, s->y);
+ qemu_console_resize(s->state, s->x, s->y);
}
if (s->invalidate) {
@@ -940,7 +939,7 @@ static void blizzard_screen_dump(void *opaque, const char *filename) {
blizzard_update_display(opaque);
if (s && ds_get_data(s->state))
- ppm_save(filename, ds_get_data(s->state), s->x, s->y, ds_get_linesize(s->state));
+ ppm_save(filename, s->state->surface);
}
#define DEPTH 8
@@ -954,11 +953,10 @@ static void blizzard_screen_dump(void *opaque, const char *filename) {
#define DEPTH 32
#include "blizzard_template.h"
-void *s1d13745_init(qemu_irq gpio_int, DisplayState *ds)
+void *s1d13745_init(qemu_irq gpio_int)
{
struct blizzard_s *s = (struct blizzard_s *) qemu_mallocz(sizeof(*s));
- s->state = ds;
s->fb = qemu_malloc(0x180000);
switch (ds_get_bits_per_pixel(s->state)) {
@@ -993,9 +991,9 @@ void *s1d13745_init(qemu_irq gpio_int, DisplayState *ds)
blizzard_reset(s);
- s->console = graphic_console_init(s->state, blizzard_update_display,
- blizzard_invalidate_display,
- blizzard_screen_dump, NULL, s);
+ s->state = graphic_console_init(blizzard_update_display,
+ blizzard_invalidate_display,
+ blizzard_screen_dump, NULL, s);
return s;
}
diff --git a/hw/boards.h b/hw/boards.h
index 6211c8b4f..c291efa4d 100644
--- a/hw/boards.h
+++ b/hw/boards.h
@@ -4,7 +4,7 @@
#define HW_BOARDS_H
typedef void QEMUMachineInitFunc(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c
index fc55b6fac..8b8783be7 100644
--- a/hw/cirrus_vga.c
+++ b/hw/cirrus_vga.c
@@ -775,7 +775,7 @@ static void cirrus_do_copy(CirrusVGAState *s, int dst, int src, int w, int h)
s->cirrus_blt_width, s->cirrus_blt_height);
if (notify)
- qemu_console_copy(s->console,
+ qemu_console_copy(s->ds,
sx, sy, dx, dy,
s->cirrus_blt_width / depth,
s->cirrus_blt_height);
@@ -794,22 +794,9 @@ static int cirrus_bitblt_videotovideo_copy(CirrusVGAState * s)
if (BLTUNSAFE(s))
return 0;
- if (s->ds->dpy_copy) {
- cirrus_do_copy(s, s->cirrus_blt_dstaddr - s->start_addr,
- s->cirrus_blt_srcaddr - s->start_addr,
- s->cirrus_blt_width, s->cirrus_blt_height);
- } else {
- (*s->cirrus_rop) (s, s->vram_ptr +
- (s->cirrus_blt_dstaddr & s->cirrus_addr_mask),
- s->vram_ptr +
- (s->cirrus_blt_srcaddr & s->cirrus_addr_mask),
- s->cirrus_blt_dstpitch, s->cirrus_blt_srcpitch,
- s->cirrus_blt_width, s->cirrus_blt_height);
-
- cirrus_invalidate_region(s, s->cirrus_blt_dstaddr,
- s->cirrus_blt_dstpitch, s->cirrus_blt_width,
- s->cirrus_blt_height);
- }
+ cirrus_do_copy(s, s->cirrus_blt_dstaddr - s->start_addr,
+ s->cirrus_blt_srcaddr - s->start_addr,
+ s->cirrus_blt_width, s->cirrus_blt_height);
return 1;
}
@@ -3318,7 +3305,7 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci)
*
***************************************/
-void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
+void isa_cirrus_vga_init(uint8_t *vga_ram_base,
ram_addr_t vga_ram_offset, int vga_ram_size)
{
CirrusVGAState *s;
@@ -3326,10 +3313,10 @@ void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
s = qemu_mallocz(sizeof(CirrusVGAState));
vga_common_init((VGAState *)s,
- ds, vga_ram_base, vga_ram_offset, vga_ram_size);
+ vga_ram_base, vga_ram_offset, vga_ram_size);
cirrus_init_common(s, CIRRUS_ID_CLGD5430, 0);
- s->console = graphic_console_init(s->ds, s->update, s->invalidate,
- s->screen_dump, s->text_update, s);
+ s->ds = graphic_console_init(s->update, s->invalidate,
+ s->screen_dump, s->text_update, s);
/* XXX ISA-LFB support */
}
@@ -3383,7 +3370,7 @@ static void pci_cirrus_write_config(PCIDevice *d,
vga_dirty_log_start((VGAState *)s);
}
-void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
+void pci_cirrus_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
ram_addr_t vga_ram_offset, int vga_ram_size)
{
PCICirrusVGAState *d;
@@ -3410,11 +3397,11 @@ void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
/* setup VGA */
s = &d->cirrus_vga;
vga_common_init((VGAState *)s,
- ds, vga_ram_base, vga_ram_offset, vga_ram_size);
+ vga_ram_base, vga_ram_offset, vga_ram_size);
cirrus_init_common(s, device_id, 1);
- s->console = graphic_console_init(s->ds, s->update, s->invalidate,
- s->screen_dump, s->text_update, s);
+ s->ds = graphic_console_init(s->update, s->invalidate,
+ s->screen_dump, s->text_update, s);
s->pci_dev = (PCIDevice *)d;
diff --git a/hw/cuda.c b/hw/cuda.c
index 92fd69bda..8657b21a5 100644
--- a/hw/cuda.c
+++ b/hw/cuda.c
@@ -131,6 +131,8 @@ typedef struct CUDAState {
CUDATimer timers[2];
+ uint32_t tick_offset;
+
uint8_t last_b; /* last value of B register */
uint8_t last_acr; /* last value of B register */
@@ -510,7 +512,8 @@ static void cuda_receive_packet(CUDAState *s,
const uint8_t *data, int len)
{
uint8_t obuf[16];
- int ti, autopoll;
+ int autopoll;
+ uint32_t ti;
switch(data[0]) {
case CUDA_AUTOPOLL:
@@ -529,10 +532,16 @@ static void cuda_receive_packet(CUDAState *s,
obuf[1] = data[1];
cuda_send_packet_to_host(s, obuf, 2);
break;
- case CUDA_GET_TIME:
case CUDA_SET_TIME:
- /* XXX: add time support ? */
- ti = time(NULL) + RTC_OFFSET;
+ ti = (((uint32_t)data[1]) << 24) + (((uint32_t)data[2]) << 16) + (((uint32_t)data[3]) << 8) + data[4];
+ s->tick_offset = ti - (qemu_get_clock(vm_clock) / ticks_per_sec);
+ obuf[0] = CUDA_PACKET;
+ obuf[1] = 0;
+ obuf[2] = 0;
+ cuda_send_packet_to_host(s, obuf, 3);
+ break;
+ case CUDA_GET_TIME:
+ ti = s->tick_offset + (qemu_get_clock(vm_clock) / ticks_per_sec);
obuf[0] = CUDA_PACKET;
obuf[1] = 0;
obuf[2] = 0;
@@ -554,8 +563,8 @@ static void cuda_receive_packet(CUDAState *s,
obuf[0] = CUDA_PACKET;
obuf[1] = 0;
cuda_send_packet_to_host(s, obuf, 2);
- qemu_system_shutdown_request();
- break;
+ qemu_system_shutdown_request();
+ break;
case CUDA_RESET_SYSTEM:
obuf[0] = CUDA_PACKET;
obuf[1] = 0;
@@ -663,6 +672,7 @@ static void cuda_save(QEMUFile *f, void *opaque)
qemu_put_ubyte(f, s->autopoll);
qemu_put_buffer(f, s->data_in, sizeof(s->data_in));
qemu_put_buffer(f, s->data_out, sizeof(s->data_out));
+ qemu_put_be32s(f, &s->tick_offset);
cuda_save_timer(f, &s->timers[0]);
cuda_save_timer(f, &s->timers[1]);
}
@@ -700,6 +710,7 @@ static int cuda_load(QEMUFile *f, void *opaque, int version_id)
s->autopoll = qemu_get_ubyte(f);
qemu_get_buffer(f, s->data_in, sizeof(s->data_in));
qemu_get_buffer(f, s->data_out, sizeof(s->data_out));
+ qemu_get_be32s(f, &s->tick_offset);
cuda_load_timer(f, &s->timers[0]);
cuda_load_timer(f, &s->timers[1]);
@@ -735,6 +746,7 @@ static void cuda_reset(void *opaque)
void cuda_init (int *cuda_mem_index, qemu_irq irq)
{
+ struct tm tm;
CUDAState *s = &cuda_state;
s->irq = irq;
@@ -744,6 +756,9 @@ void cuda_init (int *cuda_mem_index, qemu_irq irq)
s->timers[1].index = 1;
+ qemu_get_timedate(&tm, RTC_OFFSET);
+ s->tick_offset = mktimegm(&tm);
+
s->adb_poll_timer = qemu_new_timer(vm_clock, cuda_adb_poll, s);
*cuda_mem_index = cpu_register_io_memory(0, cuda_read, cuda_write, s);
register_savevm("cuda", -1, 1, cuda_save, cuda_load, s);
diff --git a/hw/devices.h b/hw/devices.h
index 4f872611a..a8afa947a 100644
--- a/hw/devices.h
+++ b/hw/devices.h
@@ -8,7 +8,7 @@ void smc91c111_init(NICInfo *, uint32_t, qemu_irq);
/* ssd0323.c */
int ssd0323_xfer_ssi(void *opaque, int data);
-void *ssd0323_init(DisplayState *ds, qemu_irq *cmd_p);
+void *ssd0323_init(qemu_irq *cmd_p);
/* ads7846.c */
struct ads7846_state_s;
@@ -37,7 +37,7 @@ void tsc2005_set_transform(void *opaque, struct mouse_transform_info_s *info);
void stellaris_gamepad_init(int n, qemu_irq *irq, const int *keycode);
/* blizzard.c */
-void *s1d13745_init(qemu_irq gpio_int, DisplayState *ds);
+void *s1d13745_init(qemu_irq gpio_int);
void s1d13745_write(void *opaque, int dc, uint16_t value);
void s1d13745_write_block(void *opaque, int dc,
void *buf, size_t len, int pitch);
@@ -67,13 +67,13 @@ void tusb6010_power(struct tusb_s *s, int on);
/* tc6393xb.c */
struct tc6393xb_s;
#define TC6393XB_RAM 0x110000 /* amount of ram for Video and USB */
-struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq, DisplayState *ds);
+struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq);
void tc6393xb_gpio_out_set(struct tc6393xb_s *s, int line,
qemu_irq handler);
qemu_irq *tc6393xb_gpio_in_get(struct tc6393xb_s *s);
qemu_irq tc6393xb_l3v_get(struct tc6393xb_s *s);
/* sm501.c */
-void sm501_init(DisplayState *ds, uint32_t base, unsigned long local_mem_base,
+void sm501_init(uint32_t base, unsigned long local_mem_base,
uint32_t local_mem_bytes, CharDriverState *chr);
#endif
diff --git a/hw/dummy_m68k.c b/hw/dummy_m68k.c
index 7931b6dba..9c0a9dcf7 100644
--- a/hw/dummy_m68k.c
+++ b/hw/dummy_m68k.c
@@ -15,7 +15,7 @@
/* Board init. */
static void dummy_m68k_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
diff --git a/hw/escc.c b/hw/escc.c
index d68f90b54..372ad5acf 100644
--- a/hw/escc.c
+++ b/hw/escc.c
@@ -719,8 +719,9 @@ static int escc_load(QEMUFile *f, void *opaque, int version_id)
}
-int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chrA,
- CharDriverState *chrB, int clock, int it_shift)
+int escc_init(target_phys_addr_t base, qemu_irq irqA, qemu_irq irqB,
+ CharDriverState *chrA, CharDriverState *chrB,
+ int clock, int it_shift)
{
int escc_io_memory, i;
SerialState *s;
@@ -741,9 +742,10 @@ int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chrA,
s->chn[1].chr = chrA;
s->chn[0].disabled = 0;
s->chn[1].disabled = 0;
+ s->chn[0].irq = irqB;
+ s->chn[1].irq = irqA;
for (i = 0; i < 2; i++) {
- s->chn[i].irq = irq;
s->chn[i].chn = 1 - i;
s->chn[i].type = ser;
s->chn[i].clock = clock / 2;
diff --git a/hw/escc.h b/hw/escc.h
index 2f3ae3116..015b9d008 100644
--- a/hw/escc.h
+++ b/hw/escc.h
@@ -1,7 +1,8 @@
/* escc.c */
#define ESCC_SIZE 4
-int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chrA,
- CharDriverState *chrB, int clock, int it_shift);
+int escc_init(target_phys_addr_t base, qemu_irq irqA, qemu_irq irqB,
+ CharDriverState *chrA, CharDriverState *chrB,
+ int clock, int it_shift);
void slavio_serial_ms_kbd_init(target_phys_addr_t base, qemu_irq irq,
int disabled, int clock, int it_shift);
diff --git a/hw/etraxfs.c b/hw/etraxfs.c
index e409a94e2..eda992971 100644
--- a/hw/etraxfs.c
+++ b/hw/etraxfs.c
@@ -47,7 +47,7 @@ static void main_cpu_reset(void *opaque)
static
void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
diff --git a/hw/g364fb.c b/hw/g364fb.c
index b2aeaabc3..fc76b4a3e 100644
--- a/hw/g364fb.c
+++ b/hw/g364fb.c
@@ -1,7 +1,7 @@
/*
* QEMU G364 framebuffer Emulator.
*
- * Copyright (c) 2007-2008 Hervé Poussineau
+ * Copyright (c) 2007-2009 Herve Poussineau
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -25,141 +25,275 @@
//#define DEBUG_G364
+#ifdef DEBUG_G364
+#define DPRINTF(fmt, args...) \
+do { printf("g364: " fmt , ##args); } while (0)
+#else
+#define DPRINTF(fmt, args...) do {} while (0)
+#endif
+#define BADF(fmt, args...) \
+do { fprintf(stderr, "g364 ERROR: " fmt , ##args);} while (0)
+
typedef struct G364State {
- unsigned int vram_size;
- uint8_t *vram_buffer;
+ /* hardware */
+ uint8_t *vram;
+ ram_addr_t vram_offset;
+ int vram_size;
+ qemu_irq irq;
+ /* registers */
+ uint8_t color_palette[256][3];
+ uint8_t cursor_palette[3][3];
+ uint16_t cursor[512];
+ uint32_t cursor_position;
uint32_t ctla;
- uint8_t palette[256][3];
+ uint32_t top_of_screen;
+ uint32_t width, height; /* in pixels */
/* display refresh support */
DisplayState *ds;
- QEMUConsole *console;
- int graphic_mode;
- uint32_t scr_width, scr_height; /* in pixels */
+ int depth;
+ int blanked;
} G364State;
-/*
- * graphic modes
- */
-#define BPP 8
-#define PIXEL_WIDTH 8
-#include "g364fb_template.h"
-#undef BPP
-#undef PIXEL_WIDTH
-
-#define BPP 15
-#define PIXEL_WIDTH 16
-#include "g364fb_template.h"
-#undef BPP
-#undef PIXEL_WIDTH
-
-#define BPP 16
-#define PIXEL_WIDTH 16
-#include "g364fb_template.h"
-#undef BPP
-#undef PIXEL_WIDTH
-
-#define BPP 32
-#define PIXEL_WIDTH 32
-#include "g364fb_template.h"
-#undef BPP
-#undef PIXEL_WIDTH
-
-#define REG_DISPLAYX 0x0918
-#define REG_DISPLAYY 0x0940
-
-#define CTLA_FORCE_BLANK 0x400
-
-static void g364fb_draw_graphic(G364State *s, int full_update)
+#define REG_ID 0x000000
+#define REG_BOOT 0x080000
+#define REG_DISPLAY 0x080118
+#define REG_VDISPLAY 0x080150
+#define REG_CTLA 0x080300
+#define REG_TOP 0x080400
+#define REG_CURS_PAL 0x080508
+#define REG_CURS_POS 0x080638
+#define REG_CLR_PAL 0x080800
+#define REG_CURS_PAT 0x081000
+#define REG_RESET 0x180000
+
+#define CTLA_FORCE_BLANK 0x00000400
+#define CTLA_NO_CURSOR 0x00800000
+
+static inline int check_dirty(ram_addr_t page)
+{
+ return cpu_physical_memory_get_dirty(page, VGA_DIRTY_FLAG);
+}
+
+static inline void reset_dirty(G364State *s,
+ ram_addr_t page_min, ram_addr_t page_max)
+{
+ cpu_physical_memory_reset_dirty(page_min, page_max + TARGET_PAGE_SIZE - 1,
+ VGA_DIRTY_FLAG);
+}
+
+static void g364fb_draw_graphic8(G364State *s)
{
+ int i, w;
+ uint8_t *vram;
+ uint8_t *data_display, *dd;
+ ram_addr_t page, page_min, page_max;
+ int x, y;
+ int xmin, xmax;
+ int ymin, ymax;
+ int xcursor, ycursor;
+ unsigned int (*rgb_to_pixel)(unsigned int r, unsigned int g, unsigned int b);
+
switch (ds_get_bits_per_pixel(s->ds)) {
case 8:
- g364fb_draw_graphic8(s, full_update);
+ rgb_to_pixel = rgb_to_pixel8;
+ w = 1;
break;
case 15:
- g364fb_draw_graphic15(s, full_update);
+ rgb_to_pixel = rgb_to_pixel15;
+ w = 2;
break;
case 16:
- g364fb_draw_graphic16(s, full_update);
+ rgb_to_pixel = rgb_to_pixel16;
+ w = 2;
break;
case 32:
- g364fb_draw_graphic32(s, full_update);
+ rgb_to_pixel = rgb_to_pixel32;
+ w = 4;
break;
default:
- printf("g364fb: unknown depth %d\n", ds_get_bits_per_pixel(s->ds));
+ BADF("unknown host depth %d\n", ds_get_bits_per_pixel(s->ds));
return;
}
- dpy_update(s->ds, 0, 0, s->scr_width, s->scr_height);
+ page = s->vram_offset;
+ page_min = (ram_addr_t)-1;
+ page_max = 0;
+
+ x = y = 0;
+ xmin = s->width;
+ xmax = 0;
+ ymin = s->height;
+ ymax = 0;
+
+ if (!(s->ctla & CTLA_NO_CURSOR)) {
+ xcursor = s->cursor_position >> 12;
+ ycursor = s->cursor_position & 0xfff;
+ } else {
+ xcursor = ycursor = -65;
+ }
+
+ vram = s->vram + s->top_of_screen;
+ /* XXX: out of range in vram? */
+ data_display = dd = ds_get_data(s->ds);
+ while (y < s->height) {
+ if (check_dirty(page)) {
+ if (y < ymin)
+ ymin = ymax = y;
+ if (page_min == (ram_addr_t)-1)
+ page_min = page;
+ page_max = page;
+ if (x < xmin)
+ xmin = x;
+ for (i = 0; i < TARGET_PAGE_SIZE; i++) {
+ uint8_t index;
+ unsigned int color;
+ if (unlikely((y >= ycursor && y < ycursor + 64) &&
+ (x >= xcursor && x < xcursor + 64))) {
+ /* pointer area */
+ int xdiff = x - xcursor;
+ uint16_t curs = s->cursor[(y - ycursor) * 8 + xdiff / 8];
+ int op = (curs >> ((xdiff & 7) * 2)) & 3;
+ if (likely(op == 0)) {
+ /* transparent */
+ index = *vram;
+ color = (*rgb_to_pixel)(
+ s->color_palette[index][0],
+ s->color_palette[index][1],
+ s->color_palette[index][2]);
+ } else {
+ /* get cursor color */
+ index = op - 1;
+ color = (*rgb_to_pixel)(
+ s->cursor_palette[index][0],
+ s->cursor_palette[index][1],
+ s->cursor_palette[index][2]);
+ }
+ } else {
+ /* normal area */
+ index = *vram;
+ color = (*rgb_to_pixel)(
+ s->color_palette[index][0],
+ s->color_palette[index][1],
+ s->color_palette[index][2]);
+ }
+ memcpy(dd, &color, w);
+ dd += w;
+ x++;
+ vram++;
+ if (x == s->width) {
+ xmax = s->width - 1;
+ y++;
+ if (y == s->height) {
+ ymax = s->height - 1;
+ goto done;
+ }
+ data_display = dd = data_display + ds_get_linesize(s->ds);
+ xmin = 0;
+ x = 0;
+ }
+ }
+ if (x > xmax)
+ xmax = x;
+ if (y > ymax)
+ ymax = y;
+ } else {
+ int dy;
+ if (page_min != (ram_addr_t)-1) {
+ reset_dirty(s, page_min, page_max);
+ page_min = (ram_addr_t)-1;
+ page_max = 0;
+ dpy_update(s->ds, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1);
+ xmin = s->width;
+ xmax = 0;
+ ymin = s->height;
+ ymax = 0;
+ }
+ x += TARGET_PAGE_SIZE;
+ dy = x / s->width;
+ x = x % s->width;
+ y += dy;
+ vram += TARGET_PAGE_SIZE;
+ data_display += dy * ds_get_linesize(s->ds);
+ dd = data_display + x * w;
+ }
+ page += TARGET_PAGE_SIZE;
+ }
+
+done:
+ if (page_min != (ram_addr_t)-1) {
+ dpy_update(s->ds, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1);
+ reset_dirty(s, page_min, page_max);
+ }
}
-static void g364fb_draw_blank(G364State *s, int full_update)
+static void g364fb_draw_blank(G364State *s)
{
int i, w;
uint8_t *d;
- if (!full_update)
+ if (s->blanked) {
+ /* Screen is already blank. No need to redraw it */
return;
+ }
- w = s->scr_width * ((ds_get_bits_per_pixel(s->ds) + 7) >> 3);
+ w = s->width * ((ds_get_bits_per_pixel(s->ds) + 7) >> 3);
d = ds_get_data(s->ds);
- for(i = 0; i < s->scr_height; i++) {
+ for (i = 0; i < s->height; i++) {
memset(d, 0, w);
d += ds_get_linesize(s->ds);
}
- dpy_update(s->ds, 0, 0, s->scr_width, s->scr_height);
+ dpy_update(s->ds, 0, 0, s->width, s->height);
+ s->blanked = 1;
}
-#define GMODE_GRAPH 0
-#define GMODE_BLANK 1
-
static void g364fb_update_display(void *opaque)
{
G364State *s = opaque;
- int full_update, graphic_mode;
- if (s->scr_width == 0 || s->scr_height == 0)
+ if (s->width == 0 || s->height == 0)
return;
- if (s->ctla & CTLA_FORCE_BLANK)
- graphic_mode = GMODE_BLANK;
- else
- graphic_mode = GMODE_GRAPH;
- full_update = 0;
- if (graphic_mode != s->graphic_mode) {
- s->graphic_mode = graphic_mode;
- full_update = 1;
- }
- if (s->scr_width != ds_get_width(s->ds) || s->scr_height != ds_get_height(s->ds)) {
- qemu_console_resize(s->console, s->scr_width, s->scr_height);
- full_update = 1;
+ if (s->width != ds_get_width(s->ds) || s->height != ds_get_height(s->ds)) {
+ qemu_console_resize(s->ds, s->width, s->height);
}
- switch(graphic_mode) {
- case GMODE_GRAPH:
- g364fb_draw_graphic(s, full_update);
- break;
- case GMODE_BLANK:
- default:
- g364fb_draw_blank(s, full_update);
- break;
+
+ if (s->ctla & CTLA_FORCE_BLANK) {
+ g364fb_draw_blank(s);
+ } else if (s->depth == 8) {
+ g364fb_draw_graphic8(s);
+ } else {
+ BADF("unknown guest depth %d\n", s->depth);
}
+
+ qemu_irq_raise(s->irq);
}
-/* force a full display refresh */
-static void g364fb_invalidate_display(void *opaque)
+static void inline g364fb_invalidate_display(void *opaque)
{
G364State *s = opaque;
- s->graphic_mode = -1; /* force full update */
+ int i;
+
+ s->blanked = 0;
+ for (i = 0; i < s->vram_size; i += TARGET_PAGE_SIZE) {
+ cpu_physical_memory_set_dirty(s->vram_offset + i);
+ }
}
static void g364fb_reset(void *opaque)
{
G364State *s = opaque;
-
- memset(s->palette, 0, sizeof(s->palette));
- s->scr_width = s->scr_height = 0;
- memset(s->vram_buffer, 0, s->vram_size);
- s->graphic_mode = -1; /* force full update */
+ qemu_irq_lower(s->irq);
+
+ memset(s->color_palette, 0, sizeof(s->color_palette));
+ memset(s->cursor_palette, 0, sizeof(s->cursor_palette));
+ memset(s->cursor, 0, sizeof(s->cursor));
+ s->cursor_position = 0;
+ s->ctla = 0;
+ s->top_of_screen = 0;
+ s->width = s->height = 0;
+ memset(s->vram, 0, s->vram_size);
+ g364fb_invalidate_display(opaque);
}
static void g364fb_screen_dump(void *opaque, const char *filename)
@@ -170,117 +304,223 @@ static void g364fb_screen_dump(void *opaque, const char *filename)
uint8_t *data_buffer;
FILE *f;
+ if (s->depth != 8) {
+ BADF("unknown guest depth %d\n", s->depth);
+ return;
+ }
+
f = fopen(filename, "wb");
if (!f)
return;
- data_buffer = s->vram_buffer;
- fprintf(f, "P6\n%d %d\n%d\n",
- s->scr_width, s->scr_height, 255);
- for(y = 0; y < s->scr_height; y++)
- for(x = 0; x < s->scr_width; x++, data_buffer++) {
- index = *data_buffer;
- fputc(s->palette[index][0], f);
- fputc(s->palette[index][1], f);
- fputc(s->palette[index][2], f);
+ if (s->ctla & CTLA_FORCE_BLANK) {
+ /* blank screen */
+ fprintf(f, "P4\n%d %d\n",
+ s->width, s->height);
+ for (y = 0; y < s->height; y++)
+ for (x = 0; x < s->width; x++)
+ fputc(0, f);
+ } else {
+ data_buffer = s->vram + s->top_of_screen;
+ fprintf(f, "P6\n%d %d\n%d\n",
+ s->width, s->height, 255);
+ for (y = 0; y < s->height; y++)
+ for (x = 0; x < s->width; x++, data_buffer++) {
+ index = *data_buffer;
+ fputc(s->color_palette[index][0], f);
+ fputc(s->color_palette[index][1], f);
+ fputc(s->color_palette[index][2], f);
}
+ }
+
fclose(f);
}
/* called for accesses to io ports */
-static uint32_t g364fb_ctrl_readb(void *opaque, target_phys_addr_t addr)
+static uint32_t g364fb_ctrl_readl(void *opaque, target_phys_addr_t addr)
{
- //G364State *s = opaque;
+ G364State *s = opaque;
uint32_t val;
- addr &= 0xffff;
-
- switch (addr) {
- default:
-#ifdef DEBUG_G364
- printf("g364fb/ctrl: invalid read at [" TARGET_FMT_lx "]\n", addr);
-#endif
- val = 0;
- break;
+ if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) {
+ /* cursor pattern */
+ int idx = (addr - REG_CURS_PAT) >> 3;
+ val = s->cursor[idx];
+ } else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) {
+ /* cursor palette */
+ int idx = (addr - REG_CURS_PAL) >> 3;
+ val = ((uint32_t)s->cursor_palette[idx][0] << 16);
+ val |= ((uint32_t)s->cursor_palette[idx][1] << 8);
+ val |= ((uint32_t)s->cursor_palette[idx][2] << 0);
+ } else {
+ switch (addr) {
+ case REG_ID:
+ val = 0x10; /* Mips G364 */
+ break;
+ case REG_DISPLAY:
+ val = s->width / 4;
+ break;
+ case REG_VDISPLAY:
+ val = s->height * 2;
+ break;
+ case REG_CTLA:
+ val = s->ctla;
+ break;
+ default:
+ {
+ BADF("invalid read at [" TARGET_FMT_plx "]\n", addr);
+ val = 0;
+ break;
+ }
+ }
}
-#ifdef DEBUG_G364
- printf("g364fb/ctrl: read 0x%02x at [" TARGET_FMT_lx "]\n", val, addr);
-#endif
+ DPRINTF("read 0x%08x at [" TARGET_FMT_plx "]\n", val, addr);
return val;
}
static uint32_t g364fb_ctrl_readw(void *opaque, target_phys_addr_t addr)
{
- uint32_t v;
- v = g364fb_ctrl_readb(opaque, addr);
- v |= g364fb_ctrl_readb(opaque, addr + 1) << 8;
- return v;
+ uint32_t v = g364fb_ctrl_readl(opaque, addr & ~0x3);
+ if (addr & 0x2)
+ return v >> 16;
+ else
+ return v & 0xffff;
}
-static uint32_t g364fb_ctrl_readl(void *opaque, target_phys_addr_t addr)
+static uint32_t g364fb_ctrl_readb(void *opaque, target_phys_addr_t addr)
{
- uint32_t v;
- v = g364fb_ctrl_readb(opaque, addr);
- v |= g364fb_ctrl_readb(opaque, addr + 1) << 8;
- v |= g364fb_ctrl_readb(opaque, addr + 2) << 16;
- v |= g364fb_ctrl_readb(opaque, addr + 3) << 24;
- return v;
+ uint32_t v = g364fb_ctrl_readl(opaque, addr & ~0x3);
+ return (v >> (8 * (addr & 0x3))) & 0xff;
}
-static void g364fb_ctrl_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
+static void g364fb_update_depth(G364State *s)
{
- G364State *s = opaque;
+ const static int depths[8] = { 1, 2, 4, 8, 15, 16, 0 };
+ s->depth = depths[(s->ctla & 0x00700000) >> 20];
+}
- addr &= 0xffff;
+static void g364_invalidate_cursor_position(G364State *s)
+{
+ int ymin, ymax, start, end, i;
-#ifdef DEBUG_G364
- printf("g364fb/ctrl: write 0x%02x at [" TARGET_FMT_lx "]\n", val, addr);
-#endif
+ /* invalidate only near the cursor */
+ ymin = s->cursor_position & 0xfff;
+ ymax = MIN(s->height, ymin + 64);
+ start = ymin * ds_get_linesize(s->ds);
+ end = (ymax + 1) * ds_get_linesize(s->ds);
- if (addr < 0x0800) {
+ for (i = start; i < end; i += TARGET_PAGE_SIZE) {
+ cpu_physical_memory_set_dirty(s->vram_offset + i);
+ }
+}
+
+static void g364fb_ctrl_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+ G364State *s = opaque;
+
+ DPRINTF("write 0x%08x at [" TARGET_FMT_plx "]\n", val, addr);
+
+ if (addr >= REG_CLR_PAL && addr < REG_CLR_PAL + 0x800) {
/* color palette */
- int idx = addr >> 3;
- int c = addr & 7;
- if (c < 3)
- s->palette[idx][c] = (uint8_t)val;
+ int idx = (addr - REG_CLR_PAL) >> 3;
+ s->color_palette[idx][0] = (val >> 16) & 0xff;
+ s->color_palette[idx][1] = (val >> 8) & 0xff;
+ s->color_palette[idx][2] = val & 0xff;
+ g364fb_invalidate_display(s);
+ } else if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) {
+ /* cursor pattern */
+ int idx = (addr - REG_CURS_PAT) >> 3;
+ s->cursor[idx] = val;
+ g364fb_invalidate_display(s);
+ } else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) {
+ /* cursor palette */
+ int idx = (addr - REG_CURS_PAL) >> 3;
+ s->cursor_palette[idx][0] = (val >> 16) & 0xff;
+ s->cursor_palette[idx][1] = (val >> 8) & 0xff;
+ s->cursor_palette[idx][2] = val & 0xff;
+ g364fb_invalidate_display(s);
} else {
switch (addr) {
- case REG_DISPLAYX:
- s->scr_width = (s->scr_width & 0xfffffc03) | (val << 2);
+ case REG_ID: /* Card identifier; read-only */
+ case REG_BOOT: /* Boot timing */
+ case 0x80108: /* Line timing: half sync */
+ case 0x80110: /* Line timing: back porch */
+ case 0x80120: /* Line timing: short display */
+ case 0x80128: /* Frame timing: broad pulse */
+ case 0x80130: /* Frame timing: v sync */
+ case 0x80138: /* Frame timing: v preequalise */
+ case 0x80140: /* Frame timing: v postequalise */
+ case 0x80148: /* Frame timing: v blank */
+ case 0x80158: /* Line timing: line time */
+ case 0x80160: /* Frame store: line start */
+ case 0x80168: /* vram cycle: mem init */
+ case 0x80170: /* vram cycle: transfer delay */
+ case 0x80200: /* vram cycle: mask register */
+ /* ignore */
+ break;
+ case REG_TOP:
+ s->top_of_screen = val;
+ g364fb_invalidate_display(s);
+ break;
+ case REG_DISPLAY:
+ s->width = val * 4;
+ break;
+ case REG_VDISPLAY:
+ s->height = val / 2;
break;
- case REG_DISPLAYX + 1:
- s->scr_width = (s->scr_width & 0xfffc03ff) | (val << 10);
+ case REG_CTLA:
+ s->ctla = val;
+ g364fb_update_depth(s);
+ g364fb_invalidate_display(s);
break;
- case REG_DISPLAYY:
- s->scr_height = (s->scr_height & 0xffffff80) | (val >> 1);
+ case REG_CURS_POS:
+ g364_invalidate_cursor_position(s);
+ s->cursor_position = val;
+ g364_invalidate_cursor_position(s);
break;
- case REG_DISPLAYY + 1:
- s->scr_height = (s->scr_height & 0xffff801f) | (val << 7);
+ case REG_RESET:
+ g364fb_reset(s);
break;
default:
-#ifdef DEBUG_G364
- printf("g364fb/ctrl: invalid write of 0x%02x at [" TARGET_FMT_lx "]\n", val, addr);
-#endif
+ BADF("invalid write of 0x%08x at [" TARGET_FMT_plx "]\n", val, addr);
break;
}
}
- s->graphic_mode = -1; /* force full update */
+ qemu_irq_lower(s->irq);
}
static void g364fb_ctrl_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
{
- g364fb_ctrl_writeb(opaque, addr, val & 0xff);
- g364fb_ctrl_writeb(opaque, addr + 1, (val >> 8) & 0xff);
+ uint32_t old_val = g364fb_ctrl_readl(opaque, addr & ~0x3);
+
+ if (addr & 0x2)
+ val = (val << 16) | (old_val & 0x0000ffff);
+ else
+ val = val | (old_val & 0xffff0000);
+ g364fb_ctrl_writel(opaque, addr & ~0x3, val);
}
-static void g364fb_ctrl_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
+static void g364fb_ctrl_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
{
- g364fb_ctrl_writeb(opaque, addr, val & 0xff);
- g364fb_ctrl_writeb(opaque, addr + 1, (val >> 8) & 0xff);
- g364fb_ctrl_writeb(opaque, addr + 2, (val >> 16) & 0xff);
- g364fb_ctrl_writeb(opaque, addr + 3, (val >> 24) & 0xff);
+ uint32_t old_val = g364fb_ctrl_readl(opaque, addr & ~0x3);
+
+ switch (addr & 3) {
+ case 0:
+ val = val | (old_val & 0xffffff00);
+ break;
+ case 1:
+ val = (val << 8) | (old_val & 0xffff00ff);
+ break;
+ case 2:
+ val = (val << 16) | (old_val & 0xff00ffff);
+ break;
+ case 3:
+ val = (val << 24) | (old_val & 0x00ffffff);
+ break;
+ }
+ g364fb_ctrl_writel(opaque, addr & ~0x3, val);
}
static CPUReadMemoryFunc *g364fb_ctrl_read[3] = {
@@ -295,93 +535,84 @@ static CPUWriteMemoryFunc *g364fb_ctrl_write[3] = {
g364fb_ctrl_writel,
};
-/* called for accesses to video ram */
-static uint32_t g364fb_mem_readb(void *opaque, target_phys_addr_t addr)
+static int g364fb_load(QEMUFile *f, void *opaque, int version_id)
{
G364State *s = opaque;
+ unsigned int i, vram_size;
+
+ if (version_id != 1)
+ return -EINVAL;
+
+ vram_size = qemu_get_be32(f);
+ if (vram_size < s->vram_size)
+ return -EINVAL;
+ qemu_get_buffer(f, s->vram, s->vram_size);
+ for (i = 0; i < 256; i++)
+ qemu_get_buffer(f, s->color_palette[i], 3);
+ for (i = 0; i < 3; i++)
+ qemu_get_buffer(f, s->cursor_palette[i], 3);
+ qemu_get_buffer(f, (uint8_t *)s->cursor, sizeof(s->cursor));
+ s->cursor_position = qemu_get_be32(f);
+ s->ctla = qemu_get_be32(f);
+ s->top_of_screen = qemu_get_be32(f);
+ s->width = qemu_get_be32(f);
+ s->height = qemu_get_be32(f);
+
+ /* force refresh */
+ g364fb_update_depth(s);
+ g364fb_invalidate_display(s);
- return s->vram_buffer[addr];
-}
-
-static uint32_t g364fb_mem_readw(void *opaque, target_phys_addr_t addr)
-{
- uint32_t v;
- v = g364fb_mem_readb(opaque, addr);
- v |= g364fb_mem_readb(opaque, addr + 1) << 8;
- return v;
-}
-
-static uint32_t g364fb_mem_readl(void *opaque, target_phys_addr_t addr)
-{
- uint32_t v;
- v = g364fb_mem_readb(opaque, addr);
- v |= g364fb_mem_readb(opaque, addr + 1) << 8;
- v |= g364fb_mem_readb(opaque, addr + 2) << 16;
- v |= g364fb_mem_readb(opaque, addr + 3) << 24;
- return v;
+ return 0;
}
-static void g364fb_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
+static void g364fb_save(QEMUFile *f, void *opaque)
{
G364State *s = opaque;
-
- s->vram_buffer[addr] = val;
+ int i;
+
+ qemu_put_be32(f, s->vram_size);
+ qemu_put_buffer(f, s->vram, s->vram_size);
+ for (i = 0; i < 256; i++)
+ qemu_put_buffer(f, s->color_palette[i], 3);
+ for (i = 0; i < 3; i++)
+ qemu_put_buffer(f, s->cursor_palette[i], 3);
+ qemu_put_buffer(f, (uint8_t *)s->cursor, sizeof(s->cursor));
+ qemu_put_be32(f, s->cursor_position);
+ qemu_put_be32(f, s->ctla);
+ qemu_put_be32(f, s->top_of_screen);
+ qemu_put_be32(f, s->width);
+ qemu_put_be32(f, s->height);
}
-static void g364fb_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
-{
- g364fb_mem_writeb(opaque, addr, val & 0xff);
- g364fb_mem_writeb(opaque, addr + 1, (val >> 8) & 0xff);
-}
-
-static void g364fb_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
-{
- g364fb_mem_writeb(opaque, addr, val & 0xff);
- g364fb_mem_writeb(opaque, addr + 1, (val >> 8) & 0xff);
- g364fb_mem_writeb(opaque, addr + 2, (val >> 16) & 0xff);
- g364fb_mem_writeb(opaque, addr + 3, (val >> 24) & 0xff);
-}
-
-static CPUReadMemoryFunc *g364fb_mem_read[3] = {
- g364fb_mem_readb,
- g364fb_mem_readw,
- g364fb_mem_readl,
-};
-
-static CPUWriteMemoryFunc *g364fb_mem_write[3] = {
- g364fb_mem_writeb,
- g364fb_mem_writew,
- g364fb_mem_writel,
-};
-
-int g364fb_mm_init(DisplayState *ds,
- int vram_size, int it_shift,
- target_phys_addr_t vram_base, target_phys_addr_t ctrl_base)
+int g364fb_mm_init(uint8_t *vram, ram_addr_t vram_offset,
+ int vram_size, target_phys_addr_t vram_base,
+ target_phys_addr_t ctrl_base, int it_shift,
+ qemu_irq irq)
{
G364State *s;
- int io_vram, io_ctrl;
+ int io_ctrl;
s = qemu_mallocz(sizeof(G364State));
if (!s)
return -1;
+ s->vram = vram;
+ s->vram_offset = vram_offset;
s->vram_size = vram_size;
- s->vram_buffer = qemu_mallocz(s->vram_size);
+ s->irq = irq;
qemu_register_reset(g364fb_reset, s);
+ register_savevm("g364fb", 0, 1, g364fb_save, g364fb_load, s);
g364fb_reset(s);
- s->ds = ds;
-
- s->console = graphic_console_init(ds, g364fb_update_display,
- g364fb_invalidate_display,
- g364fb_screen_dump, NULL, s);
+ s->ds = graphic_console_init(g364fb_update_display,
+ g364fb_invalidate_display,
+ g364fb_screen_dump, NULL, s);
- io_vram = cpu_register_io_memory(0, g364fb_mem_read, g364fb_mem_write, s);
- cpu_register_physical_memory(vram_base, vram_size, io_vram);
+ cpu_register_physical_memory(vram_base, s->vram_size, s->vram_offset);
io_ctrl = cpu_register_io_memory(0, g364fb_ctrl_read, g364fb_ctrl_write, s);
- cpu_register_physical_memory(ctrl_base, 0x10000, io_ctrl);
+ cpu_register_physical_memory(ctrl_base, 0x200000, io_ctrl);
return 0;
}
diff --git a/hw/g364fb_template.h b/hw/g364fb_template.h
deleted file mode 100644
index 49796fa34..000000000
--- a/hw/g364fb_template.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * QEMU G364 framebuffer Emulator.
- *
- * Copyright (c) 2007 Hervé Poussineau
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- */
-
-static void glue(g364fb_draw_graphic, BPP)(G364State *s, int full_update)
-{
- int i, j;
- int w_display;
- uint8_t *data_buffer;
- uint8_t *data_display, *dd;
-
- data_buffer = s->vram_buffer;
- w_display = s->scr_width * PIXEL_WIDTH / 8;
- data_display = ds_get_data(s->ds);
- for(i = 0; i < s->scr_height; i++) {
- dd = data_display;
- for (j = 0; j < s->scr_width; j++, dd += PIXEL_WIDTH / 8, data_buffer++) {
- uint8_t index = *data_buffer;
- *((glue(glue(uint, PIXEL_WIDTH), _t) *)dd) = glue(rgb_to_pixel, BPP)(
- s->palette[index][0],
- s->palette[index][1],
- s->palette[index][2]);
- }
- data_display += ds_get_linesize(s->ds);
- }
-}
diff --git a/hw/gumstix.c b/hw/gumstix.c
index 29cd69df2..70abbdc27 100644
--- a/hw/gumstix.c
+++ b/hw/gumstix.c
@@ -42,7 +42,7 @@
static const int sector_len = 128 * 1024;
static void connex_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
@@ -58,7 +58,7 @@ static void connex_init(ram_addr_t ram_size, int vga_ram_size,
exit(1);
}
- cpu = pxa255_init(connex_ram, ds);
+ cpu = pxa255_init(connex_ram);
index = drive_get_index(IF_PFLASH, 0, 0);
if (index == -1) {
@@ -82,7 +82,7 @@ static void connex_init(ram_addr_t ram_size, int vga_ram_size,
}
static void verdex_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
@@ -98,7 +98,7 @@ static void verdex_init(ram_addr_t ram_size, int vga_ram_size,
exit(1);
}
- cpu = pxa270_init(verdex_ram, ds, cpu_model ?: "pxa270-c0");
+ cpu = pxa270_init(verdex_ram, cpu_model ?: "pxa270-c0");
index = drive_get_index(IF_PFLASH, 0, 0);
if (index == -1) {
diff --git a/hw/hpet.c b/hw/hpet.c
index 5c1aca253..7df2d0515 100644
--- a/hw/hpet.c
+++ b/hw/hpet.c
@@ -388,7 +388,8 @@ static void hpet_ram_writel(void *opaque, target_phys_addr_t addr,
switch ((addr - 0x100) % 0x20) {
case HPET_TN_CFG:
dprintf("qemu: hpet_ram_writel HPET_TN_CFG\n");
- timer->config = hpet_fixup_reg(new_val, old_val, 0x3e4e);
+ timer->config = hpet_fixup_reg(new_val, old_val,
+ HPET_TN_CFG_WRITE_MASK);
if (new_val & HPET_TN_32BIT) {
timer->cmp = (uint32_t)timer->cmp;
timer->period = (uint32_t)timer->period;
@@ -456,7 +457,8 @@ static void hpet_ram_writel(void *opaque, target_phys_addr_t addr,
case HPET_ID:
return;
case HPET_CFG:
- s->config = hpet_fixup_reg(new_val, old_val, 0x3);
+ s->config = hpet_fixup_reg(new_val, old_val,
+ HPET_CFG_WRITE_MASK);
if (activating_bit(old_val, new_val, HPET_CFG_ENABLE)) {
/* Enable main counter and interrupt generation. */
s->hpet_offset = ticks_to_ns(s->hpet_counter)
diff --git a/hw/hpet_emul.h b/hw/hpet_emul.h
index fbe7a4453..60893b65d 100644
--- a/hw/hpet_emul.h
+++ b/hw/hpet_emul.h
@@ -36,6 +36,7 @@
#define HPET_TN_CFG 0x000
#define HPET_TN_CMP 0x008
#define HPET_TN_ROUTE 0x010
+#define HPET_CFG_WRITE_MASK 0x3
#define HPET_TN_ENABLE 0x004
@@ -45,6 +46,7 @@
#define HPET_TN_SETVAL 0x040
#define HPET_TN_32BIT 0x100
#define HPET_TN_INT_ROUTE_MASK 0x3e00
+#define HPET_TN_CFG_WRITE_MASK 0x3f4e
#define HPET_TN_INT_ROUTE_SHIFT 9
#define HPET_TN_INT_ROUTE_CAP_SHIFT 32
#define HPET_TN_CFG_BITS_READONLY_OR_RESERVED 0xffff80b1U
diff --git a/hw/i2c.h b/hw/i2c.h
index 68553758c..396c5627b 100644
--- a/hw/i2c.h
+++ b/hw/i2c.h
@@ -71,7 +71,7 @@ void wm8750_dac_commit(void *opaque);
void wm8750_set_bclk_in(void *opaque, int new_hz);
/* ssd0303.c */
-void ssd0303_init(DisplayState *ds, i2c_bus *bus, int address);
+void ssd0303_init(i2c_bus *bus, int address);
/* twl92230.c */
i2c_slave *twl92230_init(i2c_bus *bus, qemu_irq irq);
diff --git a/hw/integratorcp.c b/hw/integratorcp.c
index fdbfe202f..4c5623a17 100644
--- a/hw/integratorcp.c
+++ b/hw/integratorcp.c
@@ -454,7 +454,7 @@ static struct arm_boot_info integrator_binfo = {
};
static void integratorcp_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
@@ -499,7 +499,7 @@ static void integratorcp_init(ram_addr_t ram_size, int vga_ram_size,
pl181_init(0x1c000000, drives_table[sd].bdrv, pic[23], pic[24]);
if (nd_table[0].vlan)
smc91c111_init(&nd_table[0], 0xc8000000, pic[27]);
- pl110_init(ds, 0xc0000000, pic[22], 0);
+ pl110_init(0xc0000000, pic[22], 0);
integrator_binfo.ram_size = ram_size;
integrator_binfo.kernel_filename = kernel_filename;
diff --git a/hw/jazz_led.c b/hw/jazz_led.c
index a3aaec7a0..fdef9d815 100644
--- a/hw/jazz_led.c
+++ b/hw/jazz_led.c
@@ -36,7 +36,6 @@ typedef enum {
typedef struct LedState {
uint8_t segments;
DisplayState *ds;
- QEMUConsole *console;
screen_state_t state;
} LedState;
@@ -289,7 +288,7 @@ static void jazz_led_text_update(void *opaque, console_ch_t *chardata)
char buf[2];
dpy_cursor(s->ds, -1, -1);
- qemu_console_resize(s->console, 2, 1);
+ qemu_console_resize(s->ds, 2, 1);
/* TODO: draw the segments */
snprintf(buf, 2, "%02hhx\n", s->segments);
@@ -299,7 +298,7 @@ static void jazz_led_text_update(void *opaque, console_ch_t *chardata)
dpy_update(s->ds, 0, 0, 2, 1);
}
-void jazz_led_init(DisplayState *ds, target_phys_addr_t base)
+void jazz_led_init(target_phys_addr_t base)
{
LedState *s;
int io;
@@ -308,15 +307,14 @@ void jazz_led_init(DisplayState *ds, target_phys_addr_t base)
if (!s)
return;
- s->ds = ds;
s->state = REDRAW_SEGMENTS | REDRAW_BACKGROUND;
io = cpu_register_io_memory(0, led_read, led_write, s);
cpu_register_physical_memory(base, 1, io);
- s->console = graphic_console_init(ds, jazz_led_update_display,
- jazz_led_invalidate_display,
- jazz_led_screen_dump,
- jazz_led_text_update, s);
- qemu_console_resize(s->console, 60, 80);
+ s->ds = graphic_console_init(jazz_led_update_display,
+ jazz_led_invalidate_display,
+ jazz_led_screen_dump,
+ jazz_led_text_update, s);
+ qemu_console_resize(s->ds, 60, 80);
}
diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c
index 9622c6cfe..6aec059d6 100644
--- a/hw/lsi53c895a.c
+++ b/hw/lsi53c895a.c
@@ -1315,6 +1315,11 @@ again:
static uint8_t lsi_reg_readb(LSIState *s, int offset)
{
uint8_t tmp;
+#define CASE_GET_REG24(name, addr) \
+ case addr: return s->name & 0xff; \
+ case addr + 1: return (s->name >> 8) & 0xff; \
+ case addr + 2: return (s->name >> 16) & 0xff;
+
#define CASE_GET_REG32(name, addr) \
case addr: return s->name & 0xff; \
case addr + 1: return (s->name >> 8) & 0xff; \
@@ -1390,12 +1395,7 @@ static uint8_t lsi_reg_readb(LSIState *s, int offset)
return s->ctest5;
case 0x23: /* CTEST6 */
return 0;
- case 0x24: /* DBC[0:7] */
- return s->dbc & 0xff;
- case 0x25: /* DBC[8:15] */
- return (s->dbc >> 8) & 0xff;
- case 0x26: /* DBC[16->23] */
- return (s->dbc >> 16) & 0xff;
+ CASE_GET_REG24(dbc, 0x24)
case 0x27: /* DCMD */
return s->dcmd;
CASE_GET_REG32(dsp, 0x2c)
@@ -1478,6 +1478,7 @@ static uint8_t lsi_reg_readb(LSIState *s, int offset)
}
BADF("readb 0x%x\n", offset);
exit(1);
+#undef CASE_GET_REG24
#undef CASE_GET_REG32
}
diff --git a/hw/mainstone.c b/hw/mainstone.c
index 892338535..5f4cc91f4 100644
--- a/hw/mainstone.c
+++ b/hw/mainstone.c
@@ -69,7 +69,7 @@ static struct arm_boot_info mainstone_binfo = {
};
static void mainstone_common_init(ram_addr_t ram_size, int vga_ram_size,
- DisplayState *ds, const char *kernel_filename,
+ const char *kernel_filename,
const char *kernel_cmdline, const char *initrd_filename,
const char *cpu_model, enum mainstone_model_e model, int arm_id)
{
@@ -91,7 +91,7 @@ static void mainstone_common_init(ram_addr_t ram_size, int vga_ram_size,
exit(1);
}
- cpu = pxa270_init(mainstone_binfo.ram_size, ds, cpu_model);
+ cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model);
cpu_register_physical_memory(0, MAINSTONE_ROM,
qemu_ram_alloc(MAINSTONE_ROM) | IO_MEM_ROM);
@@ -135,11 +135,11 @@ static void mainstone_common_init(ram_addr_t ram_size, int vga_ram_size,
}
static void mainstone_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- mainstone_common_init(ram_size, vga_ram_size, ds, kernel_filename,
+ mainstone_common_init(ram_size, vga_ram_size, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196);
}
diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c
index faf847dca..cd57bf376 100644
--- a/hw/mc146818rtc.c
+++ b/hw/mc146818rtc.c
@@ -54,6 +54,7 @@
#define REG_B_PIE 0x40
#define REG_B_AIE 0x20
#define REG_B_UIE 0x10
+#define REG_B_DM 0x04
struct RTCState {
uint8_t cmos_data[128];
@@ -66,6 +67,10 @@ struct RTCState {
int64_t next_periodic_time;
/* second update */
int64_t next_second_time;
+#ifdef TARGET_I386
+ uint32_t irq_coalesced;
+ uint32_t period;
+#endif
QEMUTimer *second_timer;
QEMUTimer *second_timer2;
};
@@ -103,12 +108,20 @@ static void rtc_timer_update(RTCState *s, int64_t current_time)
period_code += 7;
/* period in 32 Khz cycles */
period = 1 << (period_code - 1);
+#ifdef TARGET_I386
+ if(period != s->period)
+ s->irq_coalesced = (s->irq_coalesced * s->period) / period;
+ s->period = period;
+#endif
/* compute 32 khz clock */
cur_clock = muldiv64(current_time, 32768, ticks_per_sec);
next_irq_clock = (cur_clock & ~(period - 1)) + period;
s->next_periodic_time = muldiv64(next_irq_clock, ticks_per_sec, 32768) + 1;
qemu_mod_timer(s->periodic_timer, s->next_periodic_time);
} else {
+#ifdef TARGET_I386
+ s->irq_coalesced = 0;
+#endif
qemu_del_timer(s->periodic_timer);
}
}
@@ -118,6 +131,12 @@ static void rtc_periodic_timer(void *opaque)
RTCState *s = opaque;
rtc_timer_update(s, s->next_periodic_time);
+#ifdef TARGET_I386
+ if ((s->cmos_data[RTC_REG_C] & 0xc0) && rtc_td_hack) {
+ s->irq_coalesced++;
+ return;
+ }
+#endif
s->cmos_data[RTC_REG_C] |= 0xc0;
rtc_irq_raise(s->irq);
}
@@ -186,7 +205,7 @@ static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data)
static inline int to_bcd(RTCState *s, int a)
{
- if (s->cmos_data[RTC_REG_B] & 0x04) {
+ if (s->cmos_data[RTC_REG_B] & REG_B_DM) {
return a;
} else {
return ((a / 10) << 4) | (a % 10);
@@ -195,7 +214,7 @@ static inline int to_bcd(RTCState *s, int a)
static inline int from_bcd(RTCState *s, int a)
{
- if (s->cmos_data[RTC_REG_B] & 0x04) {
+ if (s->cmos_data[RTC_REG_B] & REG_B_DM) {
return a;
} else {
return ((a >> 4) * 10) + (a & 0x0f);
@@ -213,7 +232,7 @@ static void rtc_set_time(RTCState *s)
(s->cmos_data[RTC_HOURS] & 0x80)) {
tm->tm_hour += 12;
}
- tm->tm_wday = from_bcd(s, s->cmos_data[RTC_DAY_OF_WEEK]);
+ tm->tm_wday = from_bcd(s, s->cmos_data[RTC_DAY_OF_WEEK]) - 1;
tm->tm_mday = from_bcd(s, s->cmos_data[RTC_DAY_OF_MONTH]);
tm->tm_mon = from_bcd(s, s->cmos_data[RTC_MONTH]) - 1;
tm->tm_year = from_bcd(s, s->cmos_data[RTC_YEAR]) + 100;
@@ -234,7 +253,7 @@ static void rtc_copy_date(RTCState *s)
if (tm->tm_hour >= 12)
s->cmos_data[RTC_HOURS] |= 0x80;
}
- s->cmos_data[RTC_DAY_OF_WEEK] = to_bcd(s, tm->tm_wday);
+ s->cmos_data[RTC_DAY_OF_WEEK] = to_bcd(s, tm->tm_wday + 1);
s->cmos_data[RTC_DAY_OF_MONTH] = to_bcd(s, tm->tm_mday);
s->cmos_data[RTC_MONTH] = to_bcd(s, tm->tm_mon + 1);
s->cmos_data[RTC_YEAR] = to_bcd(s, tm->tm_year % 100);
@@ -378,6 +397,15 @@ static uint32_t cmos_ioport_read(void *opaque, uint32_t addr)
case RTC_REG_C:
ret = s->cmos_data[s->cmos_index];
qemu_irq_lower(s->irq);
+#ifdef TARGET_I386
+ if(s->irq_coalesced) {
+ apic_reset_irq_delivered();
+ qemu_irq_raise(s->irq);
+ if (apic_get_irq_delivered())
+ s->irq_coalesced--;
+ break;
+ }
+#endif
s->cmos_data[RTC_REG_C] = 0x00;
break;
default:
@@ -472,6 +500,28 @@ static int rtc_load(QEMUFile *f, void *opaque, int version_id)
return 0;
}
+#ifdef TARGET_I386
+static void rtc_save_td(QEMUFile *f, void *opaque)
+{
+ RTCState *s = opaque;
+
+ qemu_put_be32(f, s->irq_coalesced);
+ qemu_put_be32(f, s->period);
+}
+
+static int rtc_load_td(QEMUFile *f, void *opaque, int version_id)
+{
+ RTCState *s = opaque;
+
+ if (version_id != 1)
+ return -EINVAL;
+
+ s->irq_coalesced = qemu_get_be32(f);
+ s->period = qemu_get_be32(f);
+ return 0;
+}
+#endif
+
RTCState *rtc_init(int base, qemu_irq irq)
{
RTCState *s;
@@ -502,6 +552,10 @@ RTCState *rtc_init(int base, qemu_irq irq)
register_ioport_read(base, 2, 1, cmos_ioport_read, s);
register_savevm("mc146818rtc", base, 1, rtc_save, rtc_load, s);
+#ifdef TARGET_I386
+ if (rtc_td_hack)
+ register_savevm("mc146818rtc-td", base, 1, rtc_save_td, rtc_load_td, s);
+#endif
return s;
}
@@ -608,5 +662,9 @@ RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq)
cpu_register_physical_memory(base, 2 << it_shift, io_memory);
register_savevm("mc146818rtc", base, 1, rtc_save, rtc_load, s);
+#ifdef TARGET_I386
+ if (rtc_td_hack)
+ register_savevm("mc146818rtc-td", base, 1, rtc_save_td, rtc_load_td, s);
+#endif
return s;
}
diff --git a/hw/mcf5208.c b/hw/mcf5208.c
index f06c25a54..dae9a61c2 100644
--- a/hw/mcf5208.c
+++ b/hw/mcf5208.c
@@ -198,7 +198,7 @@ static void mcf5208_sys_init(qemu_irq *pic)
}
static void mcf5208evb_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
diff --git a/hw/mips.h b/hw/mips.h
index 589be9da9..84d5792f2 100644
--- a/hw/mips.h
+++ b/hw/mips.h
@@ -10,15 +10,16 @@ void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
void ds1225y_set_protection(void *opaque, int protection);
/* g364fb.c */
-int g364fb_mm_init(DisplayState *ds,
- int vram_size, int it_shift,
- target_phys_addr_t vram_base, target_phys_addr_t ctrl_base);
+int g364fb_mm_init(uint8_t *vram, ram_addr_t vram_offset,
+ int vram_size, target_phys_addr_t vram_base,
+ target_phys_addr_t ctrl_base, int it_shift,
+ qemu_irq irq);
/* mipsnet.c */
void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
/* jazz_led.c */
-extern void jazz_led_init(DisplayState *ds, target_phys_addr_t base);
+extern void jazz_led_init(target_phys_addr_t base);
/* mips_int.c */
extern void cpu_mips_irq_init_cpu(CPUState *env);
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index dc08deb30..eb4d15bcc 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -125,7 +125,7 @@ static void audio_init(qemu_irq *pic)
static
void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
- DisplayState *ds, const char *cpu_model,
+ const char *cpu_model,
enum jazz_model_e jazz_model)
{
char buf[1024];
@@ -201,10 +201,11 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
/* Video card */
switch (jazz_model) {
case JAZZ_MAGNUM:
- g364fb_mm_init(ds, vga_ram_size, 0, 0x40000000, 0x60000000);
+ g364fb_mm_init(phys_ram_base + ram_size, ram_size, vga_ram_size,
+ 0x40000000, 0x60000000, 0, rc4030[3]);
break;
case JAZZ_PICA61:
- isa_vga_mm_init(ds, phys_ram_base + ram_size, ram_size, vga_ram_size,
+ isa_vga_mm_init(phys_ram_base + ram_size, ram_size, vga_ram_size,
0x40000000, 0x60000000, 0);
break;
default:
@@ -267,25 +268,25 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
ds1225y_init(0x80009000, "nvram");
/* LED indicator */
- jazz_led_init(ds, 0x8000f000);
+ jazz_led_init(0x8000f000);
}
static
void mips_magnum_init (ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- mips_jazz_init(ram_size, vga_ram_size, ds, cpu_model, JAZZ_MAGNUM);
+ mips_jazz_init(ram_size, vga_ram_size, cpu_model, JAZZ_MAGNUM);
}
static
void mips_pica61_init (ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- mips_jazz_init(ram_size, vga_ram_size, ds, cpu_model, JAZZ_PICA61);
+ mips_jazz_init(ram_size, vga_ram_size, cpu_model, JAZZ_PICA61);
}
QEMUMachine mips_magnum_machine = {
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 3ca036bba..42f77f1ee 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -763,7 +763,7 @@ static void main_cpu_reset(void *opaque)
static
void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
@@ -938,7 +938,7 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
network_init(pci_bus);
/* Optional PCI video card */
- pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + ram_size,
+ pci_cirrus_vga_init(pci_bus, phys_ram_base + ram_size,
ram_size, vga_ram_size);
}
diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c
index 83f1a63e5..3f5490069 100644
--- a/hw/mips_mipssim.c
+++ b/hw/mips_mipssim.c
@@ -108,7 +108,7 @@ static void main_cpu_reset(void *opaque)
static void
mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c
index c12ab54b0..34b385329 100644
--- a/hw/mips_r4k.c
+++ b/hw/mips_r4k.c
@@ -148,7 +148,7 @@ static void main_cpu_reset(void *opaque)
static const int sector_len = 32 * 1024;
static
void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
@@ -244,7 +244,7 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
}
}
- isa_vga_init(ds, phys_ram_base + ram_size, ram_size,
+ isa_vga_init(phys_ram_base + ram_size, ram_size,
vga_ram_size);
if (nd_table[0].vlan)
diff --git a/hw/mips_timer.c b/hw/mips_timer.c
index 67b873511..d341e5165 100644
--- a/hw/mips_timer.c
+++ b/hw/mips_timer.c
@@ -84,9 +84,7 @@ static void mips_timer_cb (void *opaque)
env = opaque;
#if 0
- if (logfile) {
- fprintf(logfile, "%s\n", __func__);
- }
+ qemu_log("%s\n", __func__);
#endif
if (env->CP0_Cause & (1 << CP0Ca_DC))
diff --git a/hw/musicpal.c b/hw/musicpal.c
index f64bb1c89..09eafb0eb 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -752,7 +752,6 @@ typedef struct musicpal_lcd_state {
int page;
int page_off;
DisplayState *ds;
- QEMUConsole *console;
uint8_t video_ram[128*64/8];
} musicpal_lcd_state;
@@ -829,7 +828,7 @@ static void lcd_refresh(void *opaque)
break;
LCD_REFRESH(8, rgb_to_pixel8)
LCD_REFRESH(16, rgb_to_pixel16)
- LCD_REFRESH(32, (s->ds->bgr ? rgb_to_pixel32bgr : rgb_to_pixel32))
+ LCD_REFRESH(32, rgb_to_pixel32)
default:
cpu_abort(cpu_single_env, "unsupported colour depth %i\n",
ds_get_bits_per_pixel(s->ds));
@@ -906,7 +905,7 @@ static CPUWriteMemoryFunc *musicpal_lcd_writefn[] = {
musicpal_lcd_write
};
-static void musicpal_lcd_init(DisplayState *ds, uint32_t base)
+static void musicpal_lcd_init(uint32_t base)
{
musicpal_lcd_state *s;
int iomemtype;
@@ -914,14 +913,13 @@ static void musicpal_lcd_init(DisplayState *ds, uint32_t base)
s = qemu_mallocz(sizeof(musicpal_lcd_state));
if (!s)
return;
- s->ds = ds;
iomemtype = cpu_register_io_memory(0, musicpal_lcd_readfn,
musicpal_lcd_writefn, s);
cpu_register_physical_memory(base, MP_LCD_SIZE, iomemtype);
- s->console = graphic_console_init(ds, lcd_refresh, lcd_invalidate,
- NULL, NULL, s);
- qemu_console_resize(s->console, 128*3, 64*3);
+ s->ds = graphic_console_init(lcd_refresh, lcd_invalidate,
+ NULL, NULL, s);
+ qemu_console_resize(s->ds, 128*3, 64*3);
}
/* PIC register offsets */
@@ -1404,7 +1402,7 @@ static struct arm_boot_info musicpal_binfo = {
};
static void musicpal_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
@@ -1470,7 +1468,7 @@ static void musicpal_init(ram_addr_t ram_size, int vga_ram_size,
}
mv88w8618_flashcfg_init(MP_FLASHCFG_BASE);
- musicpal_lcd_init(ds, MP_LCD_BASE);
+ musicpal_lcd_init(MP_LCD_BASE);
qemu_add_kbd_event_handler(musicpal_key_event, pic[MP_GPIO_IRQ]);
diff --git a/hw/nseries.c b/hw/nseries.c
index d52a5e9ef..b4f295125 100644
--- a/hw/nseries.c
+++ b/hw/nseries.c
@@ -714,9 +714,9 @@ static void n800_dss_init(struct rfbi_chip_s *chip)
free(fb_blank);
}
-static void n8x0_dss_setup(struct n800_s *s, DisplayState *ds)
+static void n8x0_dss_setup(struct n800_s *s)
{
- s->blizzard.opaque = s1d13745_init(0, ds);
+ s->blizzard.opaque = s1d13745_init(0);
s->blizzard.block = s1d13745_write_block;
s->blizzard.write = s1d13745_write;
s->blizzard.read = s1d13745_read;
@@ -1266,13 +1266,14 @@ static int n810_atag_setup(struct arm_boot_info *info, void *p)
}
static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
- DisplayState *ds, const char *kernel_filename,
+ const char *kernel_filename,
const char *kernel_cmdline, const char *initrd_filename,
const char *cpu_model, struct arm_boot_info *binfo, int model)
{
struct n800_s *s = (struct n800_s *) qemu_mallocz(sizeof(*s));
int sdram_size = binfo->ram_size;
int onenandram_size = 0x00010000;
+ DisplayState *ds = get_displaystate();
if (ram_size < sdram_size + onenandram_size + OMAP242X_SRAM_SIZE) {
fprintf(stderr, "This architecture uses %i bytes of memory\n",
@@ -1280,7 +1281,7 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
exit(1);
}
- s->cpu = omap2420_mpu_init(sdram_size, NULL, cpu_model);
+ s->cpu = omap2420_mpu_init(sdram_size, cpu_model);
/* Setup peripherals
*
@@ -1317,7 +1318,7 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
n810_kbd_setup(s);
}
n8x0_spi_setup(s);
- n8x0_dss_setup(s, ds);
+ n8x0_dss_setup(s);
n8x0_cbus_setup(s);
n8x0_uart_setup(s);
if (usb_enabled)
@@ -1360,7 +1361,8 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
/* FIXME: We shouldn't really be doing this here. The LCD controller
will set the size once configured, so this just sets an initial
size until the guest activates the display. */
- dpy_resize(ds, 800, 480);
+ ds->surface = qemu_resize_displaysurface(ds->surface, 800, 480, 32, 4 * 800);
+ dpy_resize(ds);
}
static struct arm_boot_info n800_binfo = {
@@ -1383,21 +1385,21 @@ static struct arm_boot_info n810_binfo = {
};
static void n800_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- return n8x0_init(ram_size, boot_device, ds,
+ return n8x0_init(ram_size, boot_device,
kernel_filename, kernel_cmdline, initrd_filename,
cpu_model, &n800_binfo, 800);
}
static void n810_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- return n8x0_init(ram_size, boot_device, ds,
+ return n8x0_init(ram_size, boot_device,
kernel_filename, kernel_cmdline, initrd_filename,
cpu_model, &n810_binfo, 810);
}
diff --git a/hw/omap.h b/hw/omap.h
index 636c3c380..7965eb260 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -746,7 +746,7 @@ struct omap_eac_s *omap_eac_init(struct omap_target_agent_s *ta,
struct omap_lcd_panel_s;
void omap_lcdc_reset(struct omap_lcd_panel_s *s);
struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq,
- struct omap_dma_lcd_channel_s *dma, DisplayState *ds,
+ struct omap_dma_lcd_channel_s *dma,
ram_addr_t imif_base, ram_addr_t emiff_base, omap_clk clk);
/* omap_dss.c */
@@ -759,7 +759,7 @@ struct rfbi_chip_s {
struct omap_dss_s;
void omap_dss_reset(struct omap_dss_s *s);
struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
- target_phys_addr_t l3_base, DisplayState *ds,
+ target_phys_addr_t l3_base,
qemu_irq irq, qemu_irq drq,
omap_clk fck1, omap_clk fck2, omap_clk ck54m,
omap_clk ick1, omap_clk ick2);
@@ -956,11 +956,11 @@ struct omap_mpu_state_s {
/* omap1.c */
struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size,
- DisplayState *ds, const char *core);
+ const char *core);
/* omap2.c */
struct omap_mpu_state_s *omap2420_mpu_init(unsigned long sdram_size,
- DisplayState *ds, const char *core);
+ const char *core);
# if TARGET_PHYS_ADDR_BITS == 32
# define OMAP_FMT_plx "%#08x"
diff --git a/hw/omap1.c b/hw/omap1.c
index 97d2234bc..4c7902869 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -4622,7 +4622,7 @@ static int omap_validate_tipb_mpui_addr(struct omap_mpu_state_s *s,
}
struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size,
- DisplayState *ds, const char *core)
+ const char *core)
{
int i;
struct omap_mpu_state_s *s = (struct omap_mpu_state_s *)
@@ -4704,7 +4704,7 @@ struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size,
omap_findclk(s, "clk32-kHz"));
s->lcd = omap_lcdc_init(0xfffec000, s->irq[0][OMAP_INT_LCD_CTRL],
- omap_dma_get_lcdch(s->dma), ds, imif_base, emiff_base,
+ omap_dma_get_lcdch(s->dma), imif_base, emiff_base,
omap_findclk(s, "lcd_ck"));
omap_ulpd_pm_init(0xfffe0800, s);
diff --git a/hw/omap2.c b/hw/omap2.c
index 1b745b3e7..b9f770609 100644
--- a/hw/omap2.c
+++ b/hw/omap2.c
@@ -4492,7 +4492,7 @@ static const struct dma_irq_map omap2_dma_irq_map[] = {
};
struct omap_mpu_state_s *omap2420_mpu_init(unsigned long sdram_size,
- DisplayState *ds, const char *core)
+ const char *core)
{
struct omap_mpu_state_s *s = (struct omap_mpu_state_s *)
qemu_mallocz(sizeof(struct omap_mpu_state_s));
@@ -4670,7 +4670,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(unsigned long sdram_size,
omap_findclk(s, "spi2_fclk"),
omap_findclk(s, "spi2_iclk"));
- s->dss = omap_dss_init(omap_l4ta(s->l4, 10), 0x68000800, ds,
+ s->dss = omap_dss_init(omap_l4ta(s->l4, 10), 0x68000800,
/* XXX wire M_IRQ_25, D_L2_IRQ_30 and I_IRQ_13 together */
s->irq[0][OMAP_INT_24XX_DSS_IRQ], s->drq[OMAP24XX_DMA_DSS],
omap_findclk(s, "dss_clk1"), omap_findclk(s, "dss_clk2"),
diff --git a/hw/omap_dss.c b/hw/omap_dss.c
index 8b139d7c2..67b2b022f 100644
--- a/hw/omap_dss.c
+++ b/hw/omap_dss.c
@@ -1022,7 +1022,7 @@ static CPUWriteMemoryFunc *omap_im3_writefn[] = {
};
struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
- target_phys_addr_t l3_base, DisplayState *ds,
+ target_phys_addr_t l3_base,
qemu_irq irq, qemu_irq drq,
omap_clk fck1, omap_clk fck2, omap_clk ck54m,
omap_clk ick1, omap_clk ick2)
@@ -1033,7 +1033,6 @@ struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
s->irq = irq;
s->drq = drq;
- s->state = ds;
omap_dss_reset(s);
iomemtype[0] = l4_register_io_memory(0, omap_diss1_readfn,
@@ -1053,9 +1052,8 @@ struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
cpu_register_physical_memory(l3_base, 0x1000, iomemtype[4]);
#if 0
- if (ds)
- graphic_console_init(ds, omap_update_display,
- omap_invalidate_display, omap_screen_dump, s);
+ s->state = graphic_console_init(omap_update_display,
+ omap_invalidate_display, omap_screen_dump, s);
#endif
return s;
diff --git a/hw/omap_lcdc.c b/hw/omap_lcdc.c
index dca647c3d..a02d99d27 100644
--- a/hw/omap_lcdc.c
+++ b/hw/omap_lcdc.c
@@ -24,7 +24,6 @@
struct omap_lcd_panel_s {
qemu_irq irq;
DisplayState *state;
- QEMUConsole *console;
ram_addr_t imif_base;
ram_addr_t emiff_base;
@@ -174,7 +173,7 @@ static void omap_update_display(void *opaque)
width = omap_lcd->width;
if (width != ds_get_width(omap_lcd->state) ||
omap_lcd->height != ds_get_height(omap_lcd->state)) {
- qemu_console_resize(omap_lcd->console,
+ qemu_console_resize(omap_lcd->state,
omap_lcd->width, omap_lcd->height);
omap_lcd->invalidate = 1;
}
@@ -472,7 +471,7 @@ void omap_lcdc_reset(struct omap_lcd_panel_s *s)
}
struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq,
- struct omap_dma_lcd_channel_s *dma, DisplayState *ds,
+ struct omap_dma_lcd_channel_s *dma,
ram_addr_t imif_base, ram_addr_t emiff_base, omap_clk clk)
{
int iomemtype;
@@ -481,7 +480,6 @@ struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq,
s->irq = irq;
s->dma = dma;
- s->state = ds;
s->imif_base = imif_base;
s->emiff_base = emiff_base;
omap_lcdc_reset(s);
@@ -490,9 +488,9 @@ struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq,
omap_lcdc_writefn, s);
cpu_register_physical_memory(base, 0x100, iomemtype);
- s->console = graphic_console_init(ds, omap_update_display,
- omap_invalidate_display,
- omap_screen_dump, NULL, s);
+ s->state = graphic_console_init(omap_update_display,
+ omap_invalidate_display,
+ omap_screen_dump, NULL, s);
return s;
}
diff --git a/hw/omap_sx1.c b/hw/omap_sx1.c
index 9eaa9131b..98211efe2 100644
--- a/hw/omap_sx1.c
+++ b/hw/omap_sx1.c
@@ -136,7 +136,7 @@ static void sx1_init(ram_addr_t ram_size, int vga_ram_size,
flash_size = flash2_size;
}
- cpu = omap310_mpu_init(sx1_binfo.ram_size, ds, cpu_model);
+ cpu = omap310_mpu_init(sx1_binfo.ram_size, cpu_model);
/* External Flash (EMIFS) */
cpu_register_physical_memory(OMAP_CS0_BASE, flash_size,
@@ -201,7 +201,7 @@ static void sx1_init(ram_addr_t ram_size, int vga_ram_size,
cpu->env->regs[15] = 0x00000000;
}
- dpy_resize(ds, 640, 480);
+ qemu_console_resize(ds, 640, 480);
}
static void sx1_init_v1(ram_addr_t ram_size, int vga_ram_size,
diff --git a/hw/openpic.c b/hw/openpic.c
index def20eb4c..b8da4d702 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -279,7 +279,7 @@ static void IRQ_local_pipe (openpic_t *opp, int n_CPU, int n_IRQ)
}
IRQ_get_next(opp, &dst->raised);
if (IRQ_get_next(opp, &dst->servicing) != -1 &&
- priority < dst->servicing.priority) {
+ priority <= dst->servicing.priority) {
DPRINTF("%s: IRQ %d is hidden by servicing IRQ %d on CPU %d\n",
__func__, n_IRQ, dst->servicing.next, n_CPU);
/* Already servicing a higher priority IRQ */
diff --git a/hw/palm.c b/hw/palm.c
index 9a0eb385f..93d12365b 100644
--- a/hw/palm.c
+++ b/hw/palm.c
@@ -200,7 +200,7 @@ static struct arm_boot_info palmte_binfo = {
};
static void palmte_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
@@ -214,6 +214,7 @@ static void palmte_init(ram_addr_t ram_size, int vga_ram_size,
static uint32_t cs3val = 0xe1a0e1a0;
ram_addr_t phys_flash;
int rom_size, rom_loaded = 0;
+ DisplayState *ds = get_displaystate();
if (ram_size < flash_size + sdram_size + OMAP15XX_SRAM_SIZE) {
fprintf(stderr, "This architecture uses %i bytes of memory\n",
@@ -221,7 +222,7 @@ static void palmte_init(ram_addr_t ram_size, int vga_ram_size,
exit(1);
}
- cpu = omap310_mpu_init(sdram_size, ds, cpu_model);
+ cpu = omap310_mpu_init(sdram_size, cpu_model);
/* External Flash (EMIFS) */
cpu_register_physical_memory(OMAP_CS0_BASE, flash_size,
@@ -277,7 +278,8 @@ static void palmte_init(ram_addr_t ram_size, int vga_ram_size,
/* FIXME: We shouldn't really be doing this here. The LCD controller
will set the size once configured, so this just sets an initial
size until the guest activates the display. */
- dpy_resize(ds, 320, 320);
+ ds->surface = qemu_resize_displaysurface(ds->surface, 320, 320, 32, 4 * 320);
+ dpy_resize(ds);
}
QEMUMachine palmte_machine = {
diff --git a/hw/pc.c b/hw/pc.c
index 7120b1bde..7d60e517e 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -35,6 +35,7 @@
#include "fw_cfg.h"
#include "virtio-blk.h"
#include "virtio-balloon.h"
+#include "virtio-console.h"
#include "hpet_emul.h"
#include "device-assignment.h"
@@ -800,7 +801,7 @@ CPUState *pc_new_cpu(int cpu, const char *cpu_model, int pci_enabled)
/* PC hardware initialisation */
static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename,
int pci_enabled, const char *cpu_model)
@@ -894,27 +895,29 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
exit(1);
}
- /* VGA BIOS load */
- if (cirrus_vga_enabled) {
- snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
- } else {
- snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
- }
- vga_bios_size = get_image_size(buf);
- if (vga_bios_size <= 0 || vga_bios_size > 65536)
- goto vga_bios_error;
- vga_bios_offset = qemu_ram_alloc(65536);
-
- ret = load_image(buf, phys_ram_base + vga_bios_offset);
- if (ret != vga_bios_size) {
- vga_bios_error:
- fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
- exit(1);
- }
+ if (cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled) {
+ /* VGA BIOS load */
+ if (cirrus_vga_enabled) {
+ snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
+ } else {
+ snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
+ }
+ vga_bios_size = get_image_size(buf);
+ if (vga_bios_size <= 0 || vga_bios_size > 65536)
+ goto vga_bios_error;
+ vga_bios_offset = qemu_ram_alloc(65536);
+
+ ret = load_image(buf, phys_ram_base + vga_bios_offset);
+ if (ret != vga_bios_size) {
+vga_bios_error:
+ fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
+ exit(1);
+ }
- /* setup basic memory access */
- cpu_register_physical_memory(0xc0000, 0x10000,
- vga_bios_offset | IO_MEM_ROM);
+ /* setup basic memory access */
+ cpu_register_physical_memory(0xc0000, 0x10000,
+ vga_bios_offset | IO_MEM_ROM);
+ }
/* map the last 128KB of the BIOS in ISA space */
isa_bios_size = bios_size;
@@ -1000,24 +1003,24 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
if (cirrus_vga_enabled) {
if (pci_enabled) {
pci_cirrus_vga_init(pci_bus,
- ds, phys_ram_base + vga_ram_addr,
+ phys_ram_base + vga_ram_addr,
vga_ram_addr, vga_ram_size);
} else {
- isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
+ isa_cirrus_vga_init(phys_ram_base + vga_ram_addr,
vga_ram_addr, vga_ram_size);
}
} else if (vmsvga_enabled) {
if (pci_enabled)
- pci_vmsvga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
+ pci_vmsvga_init(pci_bus, phys_ram_base + vga_ram_addr,
vga_ram_addr, vga_ram_size);
else
fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
- } else {
+ } else if (std_vga_enabled) {
if (pci_enabled) {
- pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
+ pci_vga_init(pci_bus, phys_ram_base + vga_ram_addr,
vga_ram_addr, vga_ram_size, 0, 0);
} else {
- isa_vga_init(ds, phys_ram_base + vga_ram_addr,
+ isa_vga_init(phys_ram_base + vga_ram_addr,
vga_ram_addr, vga_ram_size);
}
}
@@ -1174,6 +1177,14 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
if (pci_enabled)
virtio_balloon_init(pci_bus);
+ /* Add virtio console devices */
+ if (pci_enabled) {
+ for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
+ if (virtcon_hds[i])
+ virtio_console_init(pci_bus, virtcon_hds[i]);
+ }
+ }
+
#ifdef USE_KVM_DEVICE_ASSIGNMENT
if (kvm_enabled()) {
add_assigned_devices(pci_bus, assigned_devices, assigned_devices_index);
@@ -1183,25 +1194,25 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
}
static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
- pc_init1(ram_size, vga_ram_size, boot_device, ds,
+ pc_init1(ram_size, vga_ram_size, boot_device,
kernel_filename, kernel_cmdline,
initrd_filename, 1, cpu_model);
}
static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
- pc_init1(ram_size, vga_ram_size, boot_device, ds,
+ pc_init1(ram_size, vga_ram_size, boot_device,
kernel_filename, kernel_cmdline,
initrd_filename, 0, cpu_model);
}
diff --git a/hw/pc.h b/hw/pc.h
index e9ddd4dd3..54f865d50 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -46,6 +46,8 @@ void apic_deliver_pic_intr(CPUState *env, int level);
int apic_get_interrupt(CPUState *env);
IOAPICState *ioapic_init(void);
void ioapic_set_irq(void *opaque, int vector, int level);
+void apic_reset_irq_delivered(void);
+int apic_get_irq_delivered(void);
/* i8254.c */
@@ -142,20 +144,20 @@ extern enum vga_retrace_method vga_retrace_method;
#define VGA_RAM_SIZE (17 * 1024 * 1024)
#endif
-int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
+int isa_vga_init(uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size);
-int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
+int pci_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size,
unsigned long vga_bios_offset, int vga_bios_size);
-int isa_vga_mm_init(DisplayState *ds, uint8_t *vga_ram_base,
+int isa_vga_mm_init(uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size,
target_phys_addr_t vram_base, target_phys_addr_t ctrl_base,
int it_shift);
/* cirrus_vga.c */
-void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
+void pci_cirrus_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
ram_addr_t vga_ram_offset, int vga_ram_size);
-void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
+void isa_cirrus_vga_init(uint8_t *vga_ram_base,
ram_addr_t vga_ram_offset, int vga_ram_size);
/* ide.c */
diff --git a/hw/pci.h b/hw/pci.h
index 060183a57..7e4891129 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -145,7 +145,7 @@ void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
void *lsi_scsi_init(PCIBus *bus, int devfn);
/* vmware_vga.c */
-void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
+void pci_vmsvga_init(PCIBus *bus, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size);
/* usb-uhci.c */
diff --git a/hw/pcnet.c b/hw/pcnet.c
index f5bf15d64..4598fc20a 100644
--- a/hw/pcnet.c
+++ b/hw/pcnet.c
@@ -1929,7 +1929,7 @@ static int pcnet_load(QEMUFile *f, void *opaque, int version_id)
return 0;
}
-static void pcnet_common_init(PCNetState *d, NICInfo *nd, const char *info_str)
+static void pcnet_common_init(PCNetState *d, NICInfo *nd)
{
d->poll_timer = qemu_new_timer(vm_clock, pcnet_poll_timer, d);
@@ -2034,7 +2034,7 @@ PCIDevice *pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn)
d->phys_mem_write = pci_physical_memory_write;
d->pci_dev = &d->dev;
- pcnet_common_init(d, nd, "pcnet");
+ pcnet_common_init(d, nd);
return (PCIDevice *)d;
}
@@ -2109,6 +2109,6 @@ void lance_init(NICInfo *nd, target_phys_addr_t leaddr, void *dma_opaque,
d->phys_mem_read = ledma_memory_read;
d->phys_mem_write = ledma_memory_write;
- pcnet_common_init(d, nd, "lance");
+ pcnet_common_init(d, nd);
}
#endif /* TARGET_SPARC */
diff --git a/hw/pl110.c b/hw/pl110.c
index d0c00a940..bc33da7d5 100644
--- a/hw/pl110.c
+++ b/hw/pl110.c
@@ -29,7 +29,6 @@ enum pl110_bppmode
typedef struct {
DisplayState *ds;
- QEMUConsole *console;
/* The Versatile/PB uses a slightly modified PL110 controller. */
int versatile;
@@ -271,7 +270,7 @@ static void pl110_resize(pl110_state *s, int width, int height)
{
if (width != s->cols || height != s->rows) {
if (pl110_enabled(s)) {
- qemu_console_resize(s->console, width, height);
+ qemu_console_resize(s->ds, width, height);
}
}
s->cols = width;
@@ -386,7 +385,7 @@ static void pl110_write(void *opaque, target_phys_addr_t offset,
s->cr = val;
s->bpp = (val >> 1) & 7;
if (pl110_enabled(s)) {
- qemu_console_resize(s->console, s->cols, s->rows);
+ qemu_console_resize(s->ds, s->cols, s->rows);
}
break;
case 10: /* LCDICR */
@@ -410,8 +409,7 @@ static CPUWriteMemoryFunc *pl110_writefn[] = {
pl110_write
};
-void *pl110_init(DisplayState *ds, uint32_t base, qemu_irq irq,
- int versatile)
+void *pl110_init(uint32_t base, qemu_irq irq, int versatile)
{
pl110_state *s;
int iomemtype;
@@ -420,12 +418,11 @@ void *pl110_init(DisplayState *ds, uint32_t base, qemu_irq irq,
iomemtype = cpu_register_io_memory(0, pl110_readfn,
pl110_writefn, s);
cpu_register_physical_memory(base, 0x00001000, iomemtype);
- s->ds = ds;
s->versatile = versatile;
s->irq = irq;
- s->console = graphic_console_init(ds, pl110_update_display,
- pl110_invalidate_display,
- NULL, NULL, s);
+ s->ds = graphic_console_init(pl110_update_display,
+ pl110_invalidate_display,
+ NULL, NULL, s);
/* ??? Save/restore. */
return s;
}
diff --git a/hw/ppc.c b/hw/ppc.c
index 60d6e86cf..05e787f04 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -31,6 +31,19 @@
//#define PPC_DEBUG_IRQ
//#define PPC_DEBUG_TB
+#ifdef PPC_DEBUG_IRQ
+# define LOG_IRQ(...) qemu_log_mask(CPU_LOG_INT, ## __VA_ARGS__)
+#else
+# define LOG_IRQ(...) do { } while (0)
+#endif
+
+
+#ifdef PPC_DEBUG_TB
+# define LOG_TB(...) qemu_log(__VA_ARGS__)
+#else
+# define LOG_TB(...) do { } while (0)
+#endif
+
static void cpu_ppc_tb_stop (CPUState *env);
static void cpu_ppc_tb_start (CPUState *env);
@@ -44,13 +57,9 @@ static void ppc_set_irq (CPUState *env, int n_IRQ, int level)
if (env->pending_interrupts == 0)
cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
}
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: %p n_IRQ %d level %d => pending %08" PRIx32
+ LOG_IRQ("%s: %p n_IRQ %d level %d => pending %08" PRIx32
"req %08x\n", __func__, env, n_IRQ, level,
env->pending_interrupts, env->interrupt_request);
- }
-#endif
}
/* PowerPC 6xx / 7xx internal IRQ controller */
@@ -59,24 +68,16 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
CPUState *env = opaque;
int cur_level;
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: env %p pin %d level %d\n", __func__,
+ LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
env, pin, level);
- }
-#endif
cur_level = (env->irq_input_state >> pin) & 1;
/* Don't generate spurious events */
if ((cur_level == 1 && level == 0) || (cur_level == 0 && level != 0)) {
switch (pin) {
case PPC6xx_INPUT_TBEN:
/* Level sensitive - active high */
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: %s the time base\n",
+ LOG_IRQ("%s: %s the time base\n",
__func__, level ? "start" : "stop");
- }
-#endif
if (level) {
cpu_ppc_tb_start(env);
} else {
@@ -84,22 +85,14 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
}
case PPC6xx_INPUT_INT:
/* Level sensitive - active high */
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: set the external IRQ state to %d\n",
+ LOG_IRQ("%s: set the external IRQ state to %d\n",
__func__, level);
- }
-#endif
ppc_set_irq(env, PPC_INTERRUPT_EXT, level);
break;
case PPC6xx_INPUT_SMI:
/* Level sensitive - active high */
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: set the SMI IRQ state to %d\n",
+ LOG_IRQ("%s: set the SMI IRQ state to %d\n",
__func__, level);
- }
-#endif
ppc_set_irq(env, PPC_INTERRUPT_SMI, level);
break;
case PPC6xx_INPUT_MCP:
@@ -108,12 +101,8 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
* 603/604/740/750: check HID0[EMCP]
*/
if (cur_level == 1 && level == 0) {
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: raise machine check state\n",
+ LOG_IRQ("%s: raise machine check state\n",
__func__);
- }
-#endif
ppc_set_irq(env, PPC_INTERRUPT_MCK, 1);
}
break;
@@ -122,22 +111,14 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
/* XXX: TODO: relay the signal to CKSTP_OUT pin */
/* XXX: Note that the only way to restart the CPU is to reset it */
if (level) {
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: stop the CPU\n", __func__);
- }
-#endif
+ LOG_IRQ("%s: stop the CPU\n", __func__);
env->halted = 1;
}
break;
case PPC6xx_INPUT_HRESET:
/* Level sensitive - active low */
if (level) {
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: reset the CPU\n", __func__);
- }
-#endif
+ LOG_IRQ("%s: reset the CPU\n", __func__);
env->interrupt_request |= CPU_INTERRUPT_EXITTB;
/* XXX: TOFIX */
#if 0
@@ -148,21 +129,13 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
}
break;
case PPC6xx_INPUT_SRESET:
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: set the RESET IRQ state to %d\n",
+ LOG_IRQ("%s: set the RESET IRQ state to %d\n",
__func__, level);
- }
-#endif
ppc_set_irq(env, PPC_INTERRUPT_RESET, level);
break;
default:
/* Unknown pin - do nothing */
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: unknown IRQ pin %d\n", __func__, pin);
- }
-#endif
+ LOG_IRQ("%s: unknown IRQ pin %d\n", __func__, pin);
return;
}
if (level)
@@ -185,34 +158,22 @@ static void ppc970_set_irq (void *opaque, int pin, int level)
CPUState *env = opaque;
int cur_level;
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: env %p pin %d level %d\n", __func__,
+ LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
env, pin, level);
- }
-#endif
cur_level = (env->irq_input_state >> pin) & 1;
/* Don't generate spurious events */
if ((cur_level == 1 && level == 0) || (cur_level == 0 && level != 0)) {
switch (pin) {
case PPC970_INPUT_INT:
/* Level sensitive - active high */
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: set the external IRQ state to %d\n",
+ LOG_IRQ("%s: set the external IRQ state to %d\n",
__func__, level);
- }
-#endif
ppc_set_irq(env, PPC_INTERRUPT_EXT, level);
break;
case PPC970_INPUT_THINT:
/* Level sensitive - active high */
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: set the SMI IRQ state to %d\n", __func__,
+ LOG_IRQ("%s: set the SMI IRQ state to %d\n", __func__,
level);
- }
-#endif
ppc_set_irq(env, PPC_INTERRUPT_THERM, level);
break;
case PPC970_INPUT_MCP:
@@ -221,12 +182,8 @@ static void ppc970_set_irq (void *opaque, int pin, int level)
* 603/604/740/750: check HID0[EMCP]
*/
if (cur_level == 1 && level == 0) {
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: raise machine check state\n",
+ LOG_IRQ("%s: raise machine check state\n",
__func__);
- }
-#endif
ppc_set_irq(env, PPC_INTERRUPT_MCK, 1);
}
break;
@@ -234,18 +191,10 @@ static void ppc970_set_irq (void *opaque, int pin, int level)
/* Level sensitive - active low */
/* XXX: TODO: relay the signal to CKSTP_OUT pin */
if (level) {
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: stop the CPU\n", __func__);
- }
-#endif
+ LOG_IRQ("%s: stop the CPU\n", __func__);
env->halted = 1;
} else {
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: restart the CPU\n", __func__);
- }
-#endif
+ LOG_IRQ("%s: restart the CPU\n", __func__);
env->halted = 0;
}
break;
@@ -253,40 +202,24 @@ static void ppc970_set_irq (void *opaque, int pin, int level)
/* Level sensitive - active low */
if (level) {
#if 0 // XXX: TOFIX
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: reset the CPU\n", __func__);
- }
-#endif
+ LOG_IRQ("%s: reset the CPU\n", __func__);
cpu_reset(env);
#endif
}
break;
case PPC970_INPUT_SRESET:
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: set the RESET IRQ state to %d\n",
+ LOG_IRQ("%s: set the RESET IRQ state to %d\n",
__func__, level);
- }
-#endif
ppc_set_irq(env, PPC_INTERRUPT_RESET, level);
break;
case PPC970_INPUT_TBEN:
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: set the TBEN state to %d\n", __func__,
+ LOG_IRQ("%s: set the TBEN state to %d\n", __func__,
level);
- }
-#endif
/* XXX: TODO */
break;
default:
/* Unknown pin - do nothing */
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: unknown IRQ pin %d\n", __func__, pin);
- }
-#endif
+ LOG_IRQ("%s: unknown IRQ pin %d\n", __func__, pin);
return;
}
if (level)
@@ -309,103 +242,63 @@ static void ppc40x_set_irq (void *opaque, int pin, int level)
CPUState *env = opaque;
int cur_level;
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: env %p pin %d level %d\n", __func__,
+ LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
env, pin, level);
- }
-#endif
cur_level = (env->irq_input_state >> pin) & 1;
/* Don't generate spurious events */
if ((cur_level == 1 && level == 0) || (cur_level == 0 && level != 0)) {
switch (pin) {
case PPC40x_INPUT_RESET_SYS:
if (level) {
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: reset the PowerPC system\n",
+ LOG_IRQ("%s: reset the PowerPC system\n",
__func__);
- }
-#endif
ppc40x_system_reset(env);
}
break;
case PPC40x_INPUT_RESET_CHIP:
if (level) {
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: reset the PowerPC chip\n", __func__);
- }
-#endif
+ LOG_IRQ("%s: reset the PowerPC chip\n", __func__);
ppc40x_chip_reset(env);
}
break;
case PPC40x_INPUT_RESET_CORE:
/* XXX: TODO: update DBSR[MRR] */
if (level) {
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: reset the PowerPC core\n", __func__);
- }
-#endif
+ LOG_IRQ("%s: reset the PowerPC core\n", __func__);
ppc40x_core_reset(env);
}
break;
case PPC40x_INPUT_CINT:
/* Level sensitive - active high */
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: set the critical IRQ state to %d\n",
+ LOG_IRQ("%s: set the critical IRQ state to %d\n",
__func__, level);
- }
-#endif
ppc_set_irq(env, PPC_INTERRUPT_CEXT, level);
break;
case PPC40x_INPUT_INT:
/* Level sensitive - active high */
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: set the external IRQ state to %d\n",
+ LOG_IRQ("%s: set the external IRQ state to %d\n",
__func__, level);
- }
-#endif
ppc_set_irq(env, PPC_INTERRUPT_EXT, level);
break;
case PPC40x_INPUT_HALT:
/* Level sensitive - active low */
if (level) {
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: stop the CPU\n", __func__);
- }
-#endif
+ LOG_IRQ("%s: stop the CPU\n", __func__);
env->halted = 1;
} else {
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: restart the CPU\n", __func__);
- }
-#endif
+ LOG_IRQ("%s: restart the CPU\n", __func__);
env->halted = 0;
}
break;
case PPC40x_INPUT_DEBUG:
/* Level sensitive - active high */
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: set the debug pin state to %d\n",
+ LOG_IRQ("%s: set the debug pin state to %d\n",
__func__, level);
- }
-#endif
ppc_set_irq(env, PPC_INTERRUPT_DEBUG, level);
break;
default:
/* Unknown pin - do nothing */
-#if defined(PPC_DEBUG_IRQ)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: unknown IRQ pin %d\n", __func__, pin);
- }
-#endif
+ LOG_IRQ("%s: unknown IRQ pin %d\n", __func__, pin);
return;
}
if (level)
@@ -453,11 +346,7 @@ uint32_t cpu_ppc_load_tbl (CPUState *env)
uint64_t tb;
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset);
-#if defined(PPC_DEBUG_TB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: tb %016" PRIx64 "\n", __func__, tb);
- }
-#endif
+ LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb);
return tb & 0xFFFFFFFF;
}
@@ -468,11 +357,7 @@ static always_inline uint32_t _cpu_ppc_load_tbu (CPUState *env)
uint64_t tb;
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset);
-#if defined(PPC_DEBUG_TB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: tb %016" PRIx64 "\n", __func__, tb);
- }
-#endif
+ LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb);
return tb >> 32;
}
@@ -487,12 +372,8 @@ static always_inline void cpu_ppc_store_tb (ppc_tb_t *tb_env, uint64_t vmclk,
uint64_t value)
{
*tb_offsetp = value - muldiv64(vmclk, tb_env->tb_freq, ticks_per_sec);
-#ifdef PPC_DEBUG_TB
- if (loglevel != 0) {
- fprintf(logfile, "%s: tb %016" PRIx64 " offset %08" PRIx64 "\n",
+ LOG_TB("%s: tb %016" PRIx64 " offset %08" PRIx64 "\n",
__func__, value, *tb_offsetp);
- }
-#endif
}
void cpu_ppc_store_tbl (CPUState *env, uint32_t value)
@@ -528,11 +409,7 @@ uint32_t cpu_ppc_load_atbl (CPUState *env)
uint64_t tb;
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset);
-#if defined(PPC_DEBUG_TB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: tb %016" PRIx64 "\n", __func__, tb);
- }
-#endif
+ LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb);
return tb & 0xFFFFFFFF;
}
@@ -543,11 +420,7 @@ uint32_t cpu_ppc_load_atbu (CPUState *env)
uint64_t tb;
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset);
-#if defined(PPC_DEBUG_TB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: tb %016" PRIx64 "\n", __func__, tb);
- }
-#endif
+ LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb);
return tb >> 32;
}
@@ -629,11 +502,7 @@ static always_inline uint32_t _cpu_ppc_load_decr (CPUState *env,
decr = muldiv64(diff, tb_env->decr_freq, ticks_per_sec);
else
decr = -muldiv64(-diff, tb_env->decr_freq, ticks_per_sec);
-#if defined(PPC_DEBUG_TB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: %08" PRIx32 "\n", __func__, decr);
- }
-#endif
+ LOG_TB("%s: %08" PRIx32 "\n", __func__, decr);
return decr;
}
@@ -668,22 +537,14 @@ uint64_t cpu_ppc_load_purr (CPUState *env)
static always_inline void cpu_ppc_decr_excp (CPUState *env)
{
/* Raise it */
-#ifdef PPC_DEBUG_TB
- if (loglevel != 0) {
- fprintf(logfile, "raise decrementer exception\n");
- }
-#endif
+ LOG_TB("raise decrementer exception\n");
ppc_set_irq(env, PPC_INTERRUPT_DECR, 1);
}
static always_inline void cpu_ppc_hdecr_excp (CPUState *env)
{
/* Raise it */
-#ifdef PPC_DEBUG_TB
- if (loglevel != 0) {
- fprintf(logfile, "raise decrementer exception\n");
- }
-#endif
+ LOG_TB("raise decrementer exception\n");
ppc_set_irq(env, PPC_INTERRUPT_HDECR, 1);
}
@@ -696,12 +557,8 @@ static void __cpu_ppc_store_decr (CPUState *env, uint64_t *nextp,
ppc_tb_t *tb_env = env->tb_env;
uint64_t now, next;
-#ifdef PPC_DEBUG_TB
- if (loglevel != 0) {
- fprintf(logfile, "%s: %08" PRIx32 " => %08" PRIx32 "\n", __func__,
+ LOG_TB("%s: %08" PRIx32 " => %08" PRIx32 "\n", __func__,
decr, value);
- }
-#endif
now = qemu_get_clock(vm_clock);
next = now + muldiv64(value, ticks_per_sec, tb_env->decr_freq);
if (is_excp)
@@ -882,13 +739,9 @@ static void cpu_4xx_fit_cb (void *opaque)
env->spr[SPR_40x_TSR] |= 1 << 26;
if ((env->spr[SPR_40x_TCR] >> 23) & 0x1)
ppc_set_irq(env, PPC_INTERRUPT_FIT, 1);
-#ifdef PPC_DEBUG_TB
- if (loglevel != 0) {
- fprintf(logfile, "%s: ir %d TCR " ADDRX " TSR " ADDRX "\n", __func__,
+ LOG_TB("%s: ir %d TCR " ADDRX " TSR " ADDRX "\n", __func__,
(int)((env->spr[SPR_40x_TCR] >> 23) & 0x1),
env->spr[SPR_40x_TCR], env->spr[SPR_40x_TSR]);
- }
-#endif
}
/* Programmable interval timer */
@@ -902,19 +755,11 @@ static void start_stop_pit (CPUState *env, ppc_tb_t *tb_env, int is_excp)
!((env->spr[SPR_40x_TCR] >> 26) & 0x1) ||
(is_excp && !((env->spr[SPR_40x_TCR] >> 22) & 0x1))) {
/* Stop PIT */
-#ifdef PPC_DEBUG_TB
- if (loglevel != 0) {
- fprintf(logfile, "%s: stop PIT\n", __func__);
- }
-#endif
+ LOG_TB("%s: stop PIT\n", __func__);
qemu_del_timer(tb_env->decr_timer);
} else {
-#ifdef PPC_DEBUG_TB
- if (loglevel != 0) {
- fprintf(logfile, "%s: start PIT %016" PRIx64 "\n",
+ LOG_TB("%s: start PIT %016" PRIx64 "\n",
__func__, ppcemb_timer->pit_reload);
- }
-#endif
now = qemu_get_clock(vm_clock);
next = now + muldiv64(ppcemb_timer->pit_reload,
ticks_per_sec, tb_env->decr_freq);
@@ -940,16 +785,12 @@ static void cpu_4xx_pit_cb (void *opaque)
if ((env->spr[SPR_40x_TCR] >> 26) & 0x1)
ppc_set_irq(env, PPC_INTERRUPT_PIT, 1);
start_stop_pit(env, tb_env, 1);
-#ifdef PPC_DEBUG_TB
- if (loglevel != 0) {
- fprintf(logfile, "%s: ar %d ir %d TCR " ADDRX " TSR " ADDRX " "
+ LOG_TB("%s: ar %d ir %d TCR " ADDRX " TSR " ADDRX " "
"%016" PRIx64 "\n", __func__,
(int)((env->spr[SPR_40x_TCR] >> 22) & 0x1),
(int)((env->spr[SPR_40x_TCR] >> 26) & 0x1),
env->spr[SPR_40x_TCR], env->spr[SPR_40x_TSR],
ppcemb_timer->pit_reload);
- }
-#endif
}
/* Watchdog timer */
@@ -984,12 +825,8 @@ static void cpu_4xx_wdt_cb (void *opaque)
next = now + muldiv64(next, ticks_per_sec, tb_env->decr_freq);
if (next == now)
next++;
-#ifdef PPC_DEBUG_TB
- if (loglevel != 0) {
- fprintf(logfile, "%s: TCR " ADDRX " TSR " ADDRX "\n", __func__,
+ LOG_TB("%s: TCR " ADDRX " TSR " ADDRX "\n", __func__,
env->spr[SPR_40x_TCR], env->spr[SPR_40x_TSR]);
- }
-#endif
switch ((env->spr[SPR_40x_TSR] >> 30) & 0x3) {
case 0x0:
case 0x1:
@@ -1031,11 +868,7 @@ void store_40x_pit (CPUState *env, target_ulong val)
tb_env = env->tb_env;
ppcemb_timer = tb_env->opaque;
-#ifdef PPC_DEBUG_TB
- if (loglevel != 0) {
- fprintf(logfile, "%s val" ADDRX "\n", __func__, val);
- }
-#endif
+ LOG_TB("%s val" ADDRX "\n", __func__, val);
ppcemb_timer->pit_reload = val;
start_stop_pit(env, tb_env, 0);
}
@@ -1047,11 +880,7 @@ target_ulong load_40x_pit (CPUState *env)
void store_booke_tsr (CPUState *env, target_ulong val)
{
-#ifdef PPC_DEBUG_TB
- if (loglevel != 0) {
- fprintf(logfile, "%s: val " ADDRX "\n", __func__, val);
- }
-#endif
+ LOG_TB("%s: val " ADDRX "\n", __func__, val);
env->spr[SPR_40x_TSR] &= ~(val & 0xFC000000);
if (val & 0x80000000)
ppc_set_irq(env, PPC_INTERRUPT_PIT, 0);
@@ -1062,11 +891,7 @@ void store_booke_tcr (CPUState *env, target_ulong val)
ppc_tb_t *tb_env;
tb_env = env->tb_env;
-#ifdef PPC_DEBUG_TB
- if (loglevel != 0) {
- fprintf(logfile, "%s: val " ADDRX "\n", __func__, val);
- }
-#endif
+ LOG_TB("%s: val " ADDRX "\n", __func__, val);
env->spr[SPR_40x_TCR] = val & 0xFFC00000;
start_stop_pit(env, tb_env, 1);
cpu_4xx_wdt_cb(env);
@@ -1077,12 +902,8 @@ static void ppc_emb_set_tb_clk (void *opaque, uint32_t freq)
CPUState *env = opaque;
ppc_tb_t *tb_env = env->tb_env;
-#ifdef PPC_DEBUG_TB
- if (loglevel != 0) {
- fprintf(logfile, "%s set new frequency to %" PRIu32 "\n", __func__,
+ LOG_TB("%s set new frequency to %" PRIu32 "\n", __func__,
freq);
- }
-#endif
tb_env->tb_freq = freq;
tb_env->decr_freq = freq;
/* XXX: we should also update all timers */
@@ -1102,11 +923,7 @@ clk_setup_cb ppc_emb_timers_init (CPUState *env, uint32_t freq)
tb_env->tb_freq = freq;
tb_env->decr_freq = freq;
tb_env->opaque = ppcemb_timer;
-#ifdef PPC_DEBUG_TB
- if (loglevel != 0) {
- fprintf(logfile, "%s freq %" PRIu32 "\n", __func__, freq);
- }
-#endif
+ LOG_TB("%s freq %" PRIu32 "\n", __func__, freq);
if (ppcemb_timer != NULL) {
/* We use decr timer for PIT */
tb_env->decr_timer = qemu_new_timer(vm_clock, &cpu_4xx_pit_cb, env);
diff --git a/hw/ppc405_boards.c b/hw/ppc405_boards.c
index 1d8b6abaf..49dd10fef 100644
--- a/hw/ppc405_boards.c
+++ b/hw/ppc405_boards.c
@@ -172,7 +172,7 @@ static void ref405ep_fpga_init (uint32_t base)
}
static void ref405ep_init (ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
@@ -496,7 +496,7 @@ static void taihu_cpld_init (uint32_t base)
}
static void taihu_405ep_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
diff --git a/hw/ppc440_bamboo.c b/hw/ppc440_bamboo.c
index bc8a47b46..5f0366167 100644
--- a/hw/ppc440_bamboo.c
+++ b/hw/ppc440_bamboo.c
@@ -17,6 +17,7 @@
#include "hw.h"
#include "pci.h"
#include "virtio-blk.h"
+#include "virtio-console.h"
#include "boards.h"
#include "sysemu.h"
#include "ppc440.h"
@@ -83,7 +84,7 @@ out:
}
static void bamboo_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
@@ -115,6 +116,12 @@ static void bamboo_init(ram_addr_t ram_size, int vga_ram_size,
unit_id++;
}
+ /* Add virtio console devices */
+ for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
+ if (virtcon_hds[i])
+ virtio_console_init(pcibus, virtcon_hds[i]);
+ }
+
/* Register network interfaces. */
for (i = 0; i < nb_nics; i++) {
/* There are no PCI NICs on the Bamboo board, but there are
diff --git a/hw/ppc4xx_devs.c b/hw/ppc4xx_devs.c
index 939e0669e..aec0602ce 100644
--- a/hw/ppc4xx_devs.c
+++ b/hw/ppc4xx_devs.c
@@ -31,6 +31,13 @@
//#define DEBUG_UNASSIGNED
#define DEBUG_UIC
+
+#ifdef DEBUG_UIC
+# define LOG_UIC(...) qemu_log_mask(CPU_LOG_INT, ## __VA_ARGS__)
+#else
+# define LOG_UIC(...) do { } while (0)
+#endif
+
/*****************************************************************************/
/* Generic PowerPC 4xx processor instanciation */
CPUState *ppc4xx_init (const char *cpu_model,
@@ -294,28 +301,16 @@ static void ppcuic_trigger_irq (ppcuic_t *uic)
/* Trigger interrupt if any is pending */
ir = uic->uicsr & uic->uicer & (~uic->uiccr);
cr = uic->uicsr & uic->uicer & uic->uiccr;
-#ifdef DEBUG_UIC
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: uicsr %08" PRIx32 " uicer %08" PRIx32
+ LOG_UIC("%s: uicsr %08" PRIx32 " uicer %08" PRIx32
" uiccr %08" PRIx32 "\n"
" %08" PRIx32 " ir %08" PRIx32 " cr %08" PRIx32 "\n",
__func__, uic->uicsr, uic->uicer, uic->uiccr,
uic->uicsr & uic->uicer, ir, cr);
- }
-#endif
if (ir != 0x0000000) {
-#ifdef DEBUG_UIC
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "Raise UIC interrupt\n");
- }
-#endif
+ LOG_UIC("Raise UIC interrupt\n");
qemu_irq_raise(uic->irqs[PPCUIC_OUTPUT_INT]);
} else {
-#ifdef DEBUG_UIC
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "Lower UIC interrupt\n");
- }
-#endif
+ LOG_UIC("Lower UIC interrupt\n");
qemu_irq_lower(uic->irqs[PPCUIC_OUTPUT_INT]);
}
/* Trigger critical interrupt if any is pending and update vector */
@@ -340,18 +335,10 @@ static void ppcuic_trigger_irq (ppcuic_t *uic)
}
}
}
-#ifdef DEBUG_UIC
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "Raise UIC critical interrupt - "
+ LOG_UIC("Raise UIC critical interrupt - "
"vector %08" PRIx32 "\n", uic->uicvr);
- }
-#endif
} else {
-#ifdef DEBUG_UIC
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "Lower UIC critical interrupt\n");
- }
-#endif
+ LOG_UIC("Lower UIC critical interrupt\n");
qemu_irq_lower(uic->irqs[PPCUIC_OUTPUT_CINT]);
uic->uicvr = 0x00000000;
}
@@ -364,14 +351,10 @@ static void ppcuic_set_irq (void *opaque, int irq_num, int level)
uic = opaque;
mask = 1 << (31-irq_num);
-#ifdef DEBUG_UIC
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: irq %d level %d uicsr %08" PRIx32
+ LOG_UIC("%s: irq %d level %d uicsr %08" PRIx32
" mask %08" PRIx32 " => %08" PRIx32 " %08" PRIx32 "\n",
__func__, irq_num, level,
uic->uicsr, mask, uic->uicsr & mask, level << irq_num);
- }
-#endif
if (irq_num < 0 || irq_num > 31)
return;
sr = uic->uicsr;
@@ -391,12 +374,8 @@ static void ppcuic_set_irq (void *opaque, int irq_num, int level)
uic->level &= ~mask;
}
}
-#ifdef DEBUG_UIC
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: irq %d level %d sr %" PRIx32 " => "
+ LOG_UIC("%s: irq %d level %d sr %" PRIx32 " => "
"%08" PRIx32 "\n", __func__, irq_num, level, uic->uicsr, sr);
- }
-#endif
if (sr != uic->uicsr)
ppcuic_trigger_irq(uic);
}
@@ -453,11 +432,7 @@ static void dcr_write_uic (void *opaque, int dcrn, target_ulong val)
uic = opaque;
dcrn -= uic->dcr_base;
-#ifdef DEBUG_UIC
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: dcr %d val " ADDRX "\n", __func__, dcrn, val);
- }
-#endif
+ LOG_UIC("%s: dcr %d val " ADDRX "\n", __func__, dcrn, val);
switch (dcrn) {
case DCR_UICSR:
uic->uicsr &= ~val;
diff --git a/hw/ppc_chrp.c b/hw/ppc_chrp.c
index 7625cd131..64a613ce3 100644
--- a/hw/ppc_chrp.c
+++ b/hw/ppc_chrp.c
@@ -59,7 +59,7 @@ static CPUReadMemoryFunc *unin_read[] = {
/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
@@ -256,15 +256,15 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
pci_bus = pci_pmac_init(pic);
/* init basic PC hardware */
- pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
+ pci_vga_init(pci_bus, phys_ram_base + ram_size,
ram_size, vga_ram_size,
vga_bios_offset, vga_bios_size);
/* XXX: suppress that */
dummy_irq = i8259_init(NULL);
- escc_mem_index = escc_init(0x80013000, dummy_irq[4], serial_hds[0],
- serial_hds[1], ESCC_CLOCK, 4);
+ escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
+ serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
for(i = 0; i < nb_nics; i++)
pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci");
diff --git a/hw/ppc_oldworld.c b/hw/ppc_oldworld.c
index cf8b24f58..f60b174e3 100644
--- a/hw/ppc_oldworld.c
+++ b/hw/ppc_oldworld.c
@@ -108,7 +108,7 @@ static int vga_osi_call (CPUState *env)
}
static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
@@ -125,7 +125,6 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
PCIBus *pci_bus;
MacIONVRAMState *nvr;
int vga_bios_size, bios_size;
- qemu_irq *dummy_irq;
int pic_mem_index, nvram_mem_index, dbdma_mem_index, cuda_mem_index;
int escc_mem_index, ide_mem_index[2];
int ppc_boot_device;
@@ -144,8 +143,8 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
fprintf(stderr, "Unable to find PowerPC CPU definition\n");
exit(1);
}
- /* Set time-base frequency to 100 Mhz */
- cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
+ /* Set time-base frequency to 16.6 Mhz */
+ cpu_ppc_tb_init(env, 16600000UL);
env->osi_call = vga_osi_call;
qemu_register_reset(&cpu_ppc_reset, env);
envs[i] = env;
@@ -297,14 +296,11 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
}
pic = heathrow_pic_init(&pic_mem_index, 1, heathrow_irqs);
pci_bus = pci_grackle_init(0xfec00000, pic);
- pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_offset,
+ pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
vga_ram_offset, vga_ram_size,
vga_bios_offset, vga_bios_size);
- /* XXX: suppress that */
- dummy_irq = i8259_init(NULL);
-
- escc_mem_index = escc_init(0x80013000, pic[0x10], serial_hds[0],
+ escc_mem_index = escc_init(0x80013000, pic[0x0f], pic[0x10], serial_hds[0],
serial_hds[1], ESCC_CLOCK, 4);
for(i = 0; i < nb_nics; i++)
@@ -364,7 +360,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
graphic_depth = 15;
- m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
+ m48t59 = m48t59_init(0, 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
nvram.opaque = m48t59;
nvram.read_fn = &m48t59_read;
nvram.write_fn = &m48t59_write;
@@ -377,9 +373,6 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
graphic_width, graphic_height, graphic_depth);
/* No PCI init: the BIOS will do it */
- /* Special port to get debug messages from Open-Firmware */
- register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
-
fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 6c0d8fe7c..934d520d3 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -52,19 +52,14 @@
#if defined (HARD_DEBUG_PPC_IO)
#define PPC_IO_DPRINTF(fmt, args...) \
do { \
- if (loglevel & CPU_LOG_IOPORT) { \
- fprintf(logfile, "%s: " fmt, __func__ , ##args); \
+ if (qemu_loglevel_mask(CPU_LOG_IOPORT)) { \
+ qemu_log("%s: " fmt, __func__ , ##args); \
} else { \
printf("%s : " fmt, __func__ , ##args); \
} \
} while (0)
#elif defined (DEBUG_PPC_IO)
-#define PPC_IO_DPRINTF(fmt, args...) \
-do { \
- if (loglevel & CPU_LOG_IOPORT) { \
- fprintf(logfile, "%s: " fmt, __func__ , ##args); \
- } \
-} while (0)
+#define PPC_IO_DPRINTF(fmt, args...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
#else
#define PPC_IO_DPRINTF(fmt, args...) do { } while (0)
#endif
@@ -536,7 +531,7 @@ static CPUReadMemoryFunc *PPC_prep_io_read[] = {
/* PowerPC PREP hardware initialisation */
static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
@@ -660,7 +655,7 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size,
cpu_register_physical_memory(0x80000000, 0x00800000, PPC_io_memory);
/* init basic PC hardware */
- pci_vga_init(pci_bus, ds, phys_ram_base + ram_size, ram_size,
+ pci_vga_init(pci_bus, phys_ram_base + ram_size, ram_size,
vga_ram_size, 0, 0);
// openpic = openpic_init(0x00000000, 0xF0000000, 1);
// pit = pit_init(0x40, i8259[0]);
diff --git a/hw/primecell.h b/hw/primecell.h
index aa35adc02..09e73ed69 100644
--- a/hw/primecell.h
+++ b/hw/primecell.h
@@ -9,7 +9,7 @@
void pl031_init(uint32_t base, qemu_irq irq);
/* pl110.c */
-void *pl110_init(DisplayState *ds, uint32_t base, qemu_irq irq, int);
+void *pl110_init(uint32_t base, qemu_irq irq, int);
/* pl011.c */
enum pl011_type {
diff --git a/hw/pxa.h b/hw/pxa.h
index 63e5335bc..8251644e2 100644
--- a/hw/pxa.h
+++ b/hw/pxa.h
@@ -89,7 +89,7 @@ void pxa2xx_dma_request(struct pxa2xx_dma_state_s *s, int req_num, int on);
/* pxa2xx_lcd.c */
struct pxa2xx_lcdc_s;
struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base,
- qemu_irq irq, DisplayState *ds);
+ qemu_irq irq);
void pxa2xx_lcd_vsync_notifier(struct pxa2xx_lcdc_s *s, qemu_irq handler);
void pxa2xx_lcdc_oritentation(void *opaque, int angle);
@@ -215,9 +215,8 @@ struct pxa2xx_i2s_s {
# define PA_FMT "0x%08lx"
# define REG_FMT "0x" TARGET_FMT_plx
-struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size, DisplayState *ds,
- const char *revision);
-struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size, DisplayState *ds);
+struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size, const char *revision);
+struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size);
/* usb-ohci.c */
void usb_ohci_init_pxa(target_phys_addr_t base, int num_ports, int devfn,
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index b780bad8f..53d9b0b20 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -2010,8 +2010,7 @@ static void pxa2xx_reset(void *opaque, int line, int level)
}
/* Initialise a PXA270 integrated chip (ARM based core). */
-struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
- DisplayState *ds, const char *revision)
+struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size, const char *revision)
{
struct pxa2xx_state_s *s;
struct pxa2xx_ssp_s *ssp;
@@ -2067,8 +2066,7 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
s->fir = pxa2xx_fir_init(0x40800000, s->pic[PXA2XX_PIC_ICP],
s->dma, serial_hds[i]);
- if (ds)
- s->lcd = pxa2xx_lcdc_init(0x44000000, s->pic[PXA2XX_PIC_LCD], ds);
+ s->lcd = pxa2xx_lcdc_init(0x44000000, s->pic[PXA2XX_PIC_LCD]);
s->cm_base = 0x41300000;
s->cm_regs[CCCR >> 2] = 0x02000210; /* 416.0 MHz */
@@ -2141,8 +2139,7 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
}
/* Initialise a PXA255 integrated chip (ARM based core). */
-struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
- DisplayState *ds)
+struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size)
{
struct pxa2xx_state_s *s;
struct pxa2xx_ssp_s *ssp;
@@ -2191,8 +2188,7 @@ struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
s->fir = pxa2xx_fir_init(0x40800000, s->pic[PXA2XX_PIC_ICP],
s->dma, serial_hds[i]);
- if (ds)
- s->lcd = pxa2xx_lcdc_init(0x44000000, s->pic[PXA2XX_PIC_LCD], ds);
+ s->lcd = pxa2xx_lcdc_init(0x44000000, s->pic[PXA2XX_PIC_LCD]);
s->cm_base = 0x41300000;
s->cm_regs[CCCR >> 2] = 0x02000210; /* 416.0 MHz */
diff --git a/hw/pxa2xx_lcd.c b/hw/pxa2xx_lcd.c
index ffe7a56ad..5c2eff10e 100644
--- a/hw/pxa2xx_lcd.c
+++ b/hw/pxa2xx_lcd.c
@@ -22,7 +22,6 @@ struct pxa2xx_lcdc_s {
int invalidated;
DisplayState *ds;
- QEMUConsole *console;
drawfn *line_fn[2];
int dest_width;
int xres, yres;
@@ -792,9 +791,9 @@ static void pxa2xx_lcdc_resize(struct pxa2xx_lcdc_s *s)
if (width != s->xres || height != s->yres) {
if (s->orientation)
- qemu_console_resize(s->console, height, width);
+ qemu_console_resize(s->ds, height, width);
else
- qemu_console_resize(s->console, width, height);
+ qemu_console_resize(s->ds, width, height);
s->invalidated = 1;
s->xres = width;
s->yres = height;
@@ -981,8 +980,7 @@ static int pxa2xx_lcdc_load(QEMUFile *f, void *opaque, int version_id)
#define BITS 32
#include "pxa2xx_template.h"
-struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base, qemu_irq irq,
- DisplayState *ds)
+struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base, qemu_irq irq)
{
int iomemtype;
struct pxa2xx_lcdc_s *s;
@@ -990,7 +988,6 @@ struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base, qemu_irq irq,
s = (struct pxa2xx_lcdc_s *) qemu_mallocz(sizeof(struct pxa2xx_lcdc_s));
s->invalidated = 1;
s->irq = irq;
- s->ds = ds;
pxa2xx_lcdc_orientation(s, graphic_rotate);
@@ -998,9 +995,9 @@ struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base, qemu_irq irq,
pxa2xx_lcdc_writefn, s);
cpu_register_physical_memory(base, 0x00100000, iomemtype);
- s->console = graphic_console_init(ds, pxa2xx_update_display,
- pxa2xx_invalidate_display,
- pxa2xx_screen_dump, NULL, s);
+ s->ds = graphic_console_init(pxa2xx_update_display,
+ pxa2xx_invalidate_display,
+ pxa2xx_screen_dump, NULL, s);
switch (ds_get_bits_per_pixel(s->ds)) {
case 0:
diff --git a/hw/r2d.c b/hw/r2d.c
index 88853e710..09305f315 100644
--- a/hw/r2d.c
+++ b/hw/r2d.c
@@ -193,7 +193,7 @@ static int r2d_pci_map_irq(PCIDevice *d, int irq_num)
}
static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState * ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
@@ -222,7 +222,7 @@ static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
pci = sh_pci_register_bus(r2d_pci_set_irq, r2d_pci_map_irq, irq, 0, 4);
sm501_vga_ram_addr = qemu_ram_alloc(SM501_VRAM_SIZE);
- sm501_init(ds, 0x10000000, sm501_vga_ram_addr, SM501_VRAM_SIZE,
+ sm501_init(0x10000000, sm501_vga_ram_addr, SM501_VRAM_SIZE,
serial_hds[2]);
/* onboard CF (True IDE mode, Master only). */
diff --git a/hw/realview.c b/hw/realview.c
index e28533800..aae4b86c2 100644
--- a/hw/realview.c
+++ b/hw/realview.c
@@ -24,7 +24,7 @@ static struct arm_boot_info realview_binfo = {
};
static void realview_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
@@ -93,7 +93,7 @@ static void realview_init(ram_addr_t ram_size, int vga_ram_size,
sp804_init(0x10011000, pic[4]);
sp804_init(0x10012000, pic[5]);
- pl110_init(ds, 0x10020000, pic[23], 1);
+ pl110_init(0x10020000, pic[23], 1);
index = drive_get_index(IF_SD, 0, 0);
if (index == -1) {
diff --git a/hw/scsi-disk.c b/hw/scsi-disk.c
index 4c4b921d9..744573e0d 100644
--- a/hw/scsi-disk.c
+++ b/hw/scsi-disk.c
@@ -821,7 +821,7 @@ SCSIDevice *scsi_disk_init(BlockDriverState *bdrv, int tcq,
strncpy(s->drive_serial_str, drive_get_serial(s->bdrv),
sizeof(s->drive_serial_str));
if (strlen(s->drive_serial_str) == 0)
- strcpy(s->drive_serial_str, "0");
+ pstrcpy(s->drive_serial_str, sizeof(s->drive_serial_str), "0");
d = (SCSIDevice *)qemu_mallocz(sizeof(SCSIDevice));
d->state = s;
d->destroy = scsi_destroy;
diff --git a/hw/shix.c b/hw/shix.c
index eb53ee59d..ee4f03fdb 100644
--- a/hw/shix.c
+++ b/hw/shix.c
@@ -61,7 +61,7 @@ void vga_screen_dump(const char *filename)
}
static void shix_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState * ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
diff --git a/hw/sm501.c b/hw/sm501.c
index 0d6b08b84..ca9528b60 100644
--- a/hw/sm501.c
+++ b/hw/sm501.c
@@ -450,7 +450,6 @@ static const uint32_t sm501_mem_local_size[] = {
typedef struct SM501State {
/* graphic console status */
DisplayState *ds;
- QEMUConsole *console;
/* status & internal resources */
target_phys_addr_t base;
@@ -940,25 +939,16 @@ static draw_line_func * draw_line32_funcs[] = {
static inline int get_depth_index(DisplayState *s)
{
- switch(s->depth) {
+ switch(ds_get_bits_per_pixel(s)) {
default:
case 8:
return 0;
case 15:
- if (s->bgr)
- return 5;
- else
- return 1;
+ return 1;
case 16:
- if (s->bgr)
- return 6;
- else
- return 2;
+ return 2;
case 32:
- if (s->bgr)
- return 4;
- else
- return 3;
+ return 3;
}
}
@@ -970,7 +960,7 @@ static void sm501_draw_crt(SM501State * s)
uint8_t * src = s->local_mem;
int src_bpp = 0;
- int dst_bpp = s->ds->depth / 8 + (s->ds->depth % 8 ? 1 : 0);
+ int dst_bpp = ds_get_bytes_per_pixel(s->ds) + (ds_get_bits_per_pixel(s->ds) % 8 ? 1 : 0);
uint32_t * palette = (uint32_t *)&s->dc_palette[SM501_DC_CRT_PALETTE
- SM501_DC_PANEL_PALETTE];
int ds_depth_index = get_depth_index(s->ds);
@@ -1003,7 +993,7 @@ static void sm501_draw_crt(SM501State * s)
/* adjust console size */
if (s->last_width != width || s->last_height != height) {
- qemu_console_resize(s->console, width, height);
+ qemu_console_resize(s->ds, width, height);
s->last_width = width;
s->last_height = height;
full_update = 1;
@@ -1024,7 +1014,7 @@ static void sm501_draw_crt(SM501State * s)
/* draw line and change status */
if (update) {
- draw_line(&s->ds->data[y * width * dst_bpp], src, width, palette);
+ draw_line(&(ds_get_data(s->ds)[y * width * dst_bpp]), src, width, palette);
if (y_start < 0)
y_start = y;
if (page0 < page_min)
@@ -1060,7 +1050,7 @@ static void sm501_update_display(void *opaque)
sm501_draw_crt(s);
}
-void sm501_init(DisplayState *ds, uint32_t base, unsigned long local_mem_base,
+void sm501_init(uint32_t base, unsigned long local_mem_base,
uint32_t local_mem_bytes, CharDriverState *chr)
{
SM501State * s;
@@ -1078,7 +1068,6 @@ void sm501_init(DisplayState *ds, uint32_t base, unsigned long local_mem_base,
s->misc_control = 0x00001000; /* assumes SH, active=low */
s->dc_panel_control = 0x00010000;
s->dc_crt_control = 0x00010000;
- s->ds = ds;
/* allocate local memory */
s->local_mem = (uint8 *)phys_ram_base + local_mem_base;
@@ -1102,6 +1091,6 @@ void sm501_init(DisplayState *ds, uint32_t base, unsigned long local_mem_base,
115200, chr, 1);
/* create qemu graphic console */
- s->console = graphic_console_init(s->ds, sm501_update_display, NULL,
- NULL, NULL, s);
+ s->ds = graphic_console_init(sm501_update_display, NULL,
+ NULL, NULL, s);
}
diff --git a/hw/spitz.c b/hw/spitz.c
index 85b48297f..ac844bddf 100644
--- a/hw/spitz.c
+++ b/hw/spitz.c
@@ -908,7 +908,7 @@ static struct arm_boot_info spitz_binfo = {
};
static void spitz_common_init(ram_addr_t ram_size, int vga_ram_size,
- DisplayState *ds, const char *kernel_filename,
+ const char *kernel_filename,
const char *kernel_cmdline, const char *initrd_filename,
const char *cpu_model, enum spitz_model_e model, int arm_id)
{
@@ -924,7 +924,7 @@ static void spitz_common_init(ram_addr_t ram_size, int vga_ram_size,
SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE);
exit(1);
}
- cpu = pxa270_init(spitz_binfo.ram_size, ds, cpu_model);
+ cpu = pxa270_init(spitz_binfo.ram_size, cpu_model);
sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
@@ -969,38 +969,38 @@ static void spitz_common_init(ram_addr_t ram_size, int vga_ram_size,
}
static void spitz_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- spitz_common_init(ram_size, vga_ram_size, ds, kernel_filename,
+ spitz_common_init(ram_size, vga_ram_size, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
}
static void borzoi_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- spitz_common_init(ram_size, vga_ram_size, ds, kernel_filename,
+ spitz_common_init(ram_size, vga_ram_size, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
}
static void akita_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- spitz_common_init(ram_size, vga_ram_size, ds, kernel_filename,
+ spitz_common_init(ram_size, vga_ram_size, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
}
static void terrier_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- spitz_common_init(ram_size, vga_ram_size, ds, kernel_filename,
+ spitz_common_init(ram_size, vga_ram_size, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, terrier, 0x33f);
}
diff --git a/hw/ssd0303.c b/hw/ssd0303.c
index d10371952..56cf72d93 100644
--- a/hw/ssd0303.c
+++ b/hw/ssd0303.c
@@ -45,7 +45,6 @@ enum ssd0303_cmd {
typedef struct {
i2c_slave i2c;
DisplayState *ds;
- QEMUConsole *console;
int row;
int col;
int start_line;
@@ -306,18 +305,17 @@ static int ssd0303_load(QEMUFile *f, void *opaque, int version_id)
return 0;
}
-void ssd0303_init(DisplayState *ds, i2c_bus *bus, int address)
+void ssd0303_init(i2c_bus *bus, int address)
{
ssd0303_state *s;
s = (ssd0303_state *)i2c_slave_init(bus, address, sizeof(ssd0303_state));
- s->ds = ds;
s->i2c.event = ssd0303_event;
s->i2c.recv = ssd0303_recv;
s->i2c.send = ssd0303_send;
- s->console = graphic_console_init(ds, ssd0303_update_display,
- ssd0303_invalidate_display,
- NULL, NULL, s);
- qemu_console_resize(s->console, 96 * MAGNIFY, 16 * MAGNIFY);
+ s->ds = graphic_console_init(ssd0303_update_display,
+ ssd0303_invalidate_display,
+ NULL, NULL, s);
+ qemu_console_resize(s->ds, 96 * MAGNIFY, 16 * MAGNIFY);
register_savevm("ssd0303_oled", -1, 1, ssd0303_save, ssd0303_load, s);
}
diff --git a/hw/ssd0323.c b/hw/ssd0323.c
index 29cd52c96..b640dd093 100644
--- a/hw/ssd0323.c
+++ b/hw/ssd0323.c
@@ -44,7 +44,6 @@ enum ssd0323_mode
typedef struct {
DisplayState *ds;
- QEMUConsole *console;
int cmd_len;
int cmd;
@@ -322,7 +321,7 @@ static int ssd0323_load(QEMUFile *f, void *opaque, int version_id)
return 0;
}
-void *ssd0323_init(DisplayState *ds, qemu_irq *cmd_p)
+void *ssd0323_init(qemu_irq *cmd_p)
{
ssd0323_state *s;
qemu_irq *cmd;
@@ -330,11 +329,10 @@ void *ssd0323_init(DisplayState *ds, qemu_irq *cmd_p)
s = (ssd0323_state *)qemu_mallocz(sizeof(ssd0323_state));
s->col_end = 63;
s->row_end = 79;
- s->ds = ds;
- s->console = graphic_console_init(ds, ssd0323_update_display,
- ssd0323_invalidate_display,
- NULL, NULL, s);
- qemu_console_resize(s->console, 128 * MAGNIFY, 64 * MAGNIFY);
+ s->ds = graphic_console_init(ssd0323_update_display,
+ ssd0323_invalidate_display,
+ NULL, NULL, s);
+ qemu_console_resize(s->ds, 128 * MAGNIFY, 64 * MAGNIFY);
cmd = qemu_allocate_irqs(ssd0323_cd, s, 1);
*cmd_p = *cmd;
diff --git a/hw/stellaris.c b/hw/stellaris.c
index 7069518bd..aeeab960b 100644
--- a/hw/stellaris.c
+++ b/hw/stellaris.c
@@ -1282,7 +1282,7 @@ static stellaris_board_info stellaris_boards[] = {
};
static void stellaris_init(const char *kernel_filename, const char *cpu_model,
- DisplayState *ds, stellaris_board_info *board)
+ stellaris_board_info *board)
{
static const int uart_irq[] = {5, 6, 33, 34};
static const int timer_irq[] = {19, 21, 23, 35};
@@ -1329,7 +1329,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
i2c = i2c_init_bus();
stellaris_i2c_init(0x40020000, pic[8], i2c);
if (board->peripherals & BP_OLED_I2C) {
- ssd0303_init(ds, i2c, 0x3d);
+ ssd0303_init(i2c, 0x3d);
}
}
@@ -1346,7 +1346,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
void *ssi_bus;
int index;
- oled = ssd0323_init(ds, &gpio_out[GPIO_C][7]);
+ oled = ssd0323_init(&gpio_out[GPIO_C][7]);
index = drive_get_index(IF_SD, 0, 0);
sd = ssi_sd_init(drives_table[index].bdrv);
@@ -1379,19 +1379,19 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
/* FIXME: Figure out how to generate these from stellaris_boards. */
static void lm3s811evb_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- stellaris_init(kernel_filename, cpu_model, ds, &stellaris_boards[0]);
+ stellaris_init(kernel_filename, cpu_model, &stellaris_boards[0]);
}
static void lm3s6965evb_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- stellaris_init(kernel_filename, cpu_model, ds, &stellaris_boards[1]);
+ stellaris_init(kernel_filename, cpu_model, &stellaris_boards[1]);
}
QEMUMachine lm3s811evb_machine = {
diff --git a/hw/sun4m.c b/hw/sun4m.c
index eb6733c0c..bae8803d8 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -423,7 +423,7 @@ static unsigned long sun4m_load_kernel(const char *kernel_filename,
static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
const char *boot_device,
- DisplayState *ds, const char *kernel_filename,
+ const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
@@ -533,7 +533,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
exit (1);
}
tcx_offset = qemu_ram_alloc(hwdef->vram_size);
- tcx_init(ds, hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
+ tcx_init(hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
@@ -548,8 +548,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
nographic, ESCC_CLOCK, 1);
// Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device
// Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device
- escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], serial_hds[0],
- serial_hds[1], ESCC_CLOCK, 1);
+ escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], slavio_irq[hwdef->ser_irq],
+ serial_hds[0], serial_hds[1], ESCC_CLOCK, 1);
cpu_halt = qemu_allocate_irqs(cpu_halt_signal, NULL, 1);
slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->apc_base,
@@ -978,92 +978,92 @@ static const struct sun4m_hwdef sun4m_hwdefs[] = {
/* SPARCstation 5 hardware initialisation */
static void ss5_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4m_hw_init(&sun4m_hwdefs[0], RAM_size, boot_device, ds, kernel_filename,
+ sun4m_hw_init(&sun4m_hwdefs[0], RAM_size, boot_device, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model);
}
/* SPARCstation 10 hardware initialisation */
static void ss10_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4m_hw_init(&sun4m_hwdefs[1], RAM_size, boot_device, ds, kernel_filename,
+ sun4m_hw_init(&sun4m_hwdefs[1], RAM_size, boot_device, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model);
}
/* SPARCserver 600MP hardware initialisation */
static void ss600mp_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4m_hw_init(&sun4m_hwdefs[2], RAM_size, boot_device, ds, kernel_filename,
+ sun4m_hw_init(&sun4m_hwdefs[2], RAM_size, boot_device, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model);
}
/* SPARCstation 20 hardware initialisation */
static void ss20_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4m_hw_init(&sun4m_hwdefs[3], RAM_size, boot_device, ds, kernel_filename,
+ sun4m_hw_init(&sun4m_hwdefs[3], RAM_size, boot_device, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model);
}
/* SPARCstation Voyager hardware initialisation */
static void vger_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4m_hw_init(&sun4m_hwdefs[4], RAM_size, boot_device, ds, kernel_filename,
+ sun4m_hw_init(&sun4m_hwdefs[4], RAM_size, boot_device, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model);
}
/* SPARCstation LX hardware initialisation */
static void ss_lx_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4m_hw_init(&sun4m_hwdefs[5], RAM_size, boot_device, ds, kernel_filename,
+ sun4m_hw_init(&sun4m_hwdefs[5], RAM_size, boot_device, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model);
}
/* SPARCstation 4 hardware initialisation */
static void ss4_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4m_hw_init(&sun4m_hwdefs[6], RAM_size, boot_device, ds, kernel_filename,
+ sun4m_hw_init(&sun4m_hwdefs[6], RAM_size, boot_device, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model);
}
/* SPARCClassic hardware initialisation */
static void scls_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4m_hw_init(&sun4m_hwdefs[7], RAM_size, boot_device, ds, kernel_filename,
+ sun4m_hw_init(&sun4m_hwdefs[7], RAM_size, boot_device, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model);
}
/* SPARCbook hardware initialisation */
static void sbook_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4m_hw_init(&sun4m_hwdefs[8], RAM_size, boot_device, ds, kernel_filename,
+ sun4m_hw_init(&sun4m_hwdefs[8], RAM_size, boot_device, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model);
}
@@ -1224,7 +1224,7 @@ static const struct sun4d_hwdef sun4d_hwdefs[] = {
static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
const char *boot_device,
- DisplayState *ds, const char *kernel_filename,
+ const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
@@ -1316,7 +1316,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
exit (1);
}
tcx_offset = qemu_ram_alloc(hwdef->vram_size);
- tcx_init(ds, hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
+ tcx_init(hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
@@ -1331,8 +1331,8 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
nographic, ESCC_CLOCK, 1);
// Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device
// Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device
- escc_init(hwdef->serial_base, sbi_irq[hwdef->ser_irq], serial_hds[0],
- serial_hds[1], ESCC_CLOCK, 1);
+ escc_init(hwdef->serial_base, sbi_irq[hwdef->ser_irq], sbi_irq[hwdef->ser_irq],
+ serial_hds[0], serial_hds[1], ESCC_CLOCK, 1);
if (drive_get_max_bus(IF_SCSI) > 0) {
fprintf(stderr, "qemu: too many SCSI bus\n");
@@ -1366,21 +1366,21 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
/* SPARCserver 1000 hardware initialisation */
static void ss1000_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4d_hw_init(&sun4d_hwdefs[0], RAM_size, boot_device, ds, kernel_filename,
+ sun4d_hw_init(&sun4d_hwdefs[0], RAM_size, boot_device, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model);
}
/* SPARCcenter 2000 hardware initialisation */
static void ss2000_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4d_hw_init(&sun4d_hwdefs[1], RAM_size, boot_device, ds, kernel_filename,
+ sun4d_hw_init(&sun4d_hwdefs[1], RAM_size, boot_device, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model);
}
@@ -1439,7 +1439,7 @@ static const struct sun4c_hwdef sun4c_hwdefs[] = {
static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
const char *boot_device,
- DisplayState *ds, const char *kernel_filename,
+ const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
@@ -1522,7 +1522,7 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
exit (1);
}
tcx_offset = qemu_ram_alloc(hwdef->vram_size);
- tcx_init(ds, hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
+ tcx_init(hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
@@ -1534,8 +1534,9 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
nographic, ESCC_CLOCK, 1);
// Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device
// Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device
- escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], serial_hds[0],
- serial_hds[1], ESCC_CLOCK, 1);
+ escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq],
+ slavio_irq[hwdef->ser_irq], serial_hds[0], serial_hds[1],
+ ESCC_CLOCK, 1);
slavio_misc = slavio_misc_init(0, 0, hwdef->aux1_base, 0,
slavio_irq[hwdef->me_irq], NULL, &fdc_tc);
@@ -1583,11 +1584,11 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
/* SPARCstation 2 hardware initialisation */
static void ss2_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4c_hw_init(&sun4c_hwdefs[0], RAM_size, boot_device, ds, kernel_filename,
+ sun4c_hw_init(&sun4c_hwdefs[0], RAM_size, boot_device, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model);
}
diff --git a/hw/sun4m.h b/hw/sun4m.h
index c9601ed32..e1fa8376c 100644
--- a/hw/sun4m.h
+++ b/hw/sun4m.h
@@ -22,7 +22,7 @@ static inline void sparc_iommu_memory_write(void *opaque,
}
/* tcx.c */
-void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
+void tcx_init(target_phys_addr_t addr, uint8_t *vram_base,
unsigned long vram_offset, int vram_size, int width, int height,
int depth);
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 91e7538da..59aee1b02 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -387,7 +387,7 @@ pci_ebus_init(PCIBus *bus, int devfn)
}
static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_devices, DisplayState *ds,
+ const char *boot_devices,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model,
const struct hwdef *hwdef)
@@ -508,7 +508,7 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
&pci_bus3);
isa_mem_base = VGA_BASE;
vga_ram_offset = qemu_ram_alloc(vga_ram_size);
- pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_offset,
+ pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
vga_ram_offset, vga_ram_size,
0, 0);
@@ -552,8 +552,8 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
hd[i] = NULL;
}
- // XXX pci_cmd646_ide_init(pci_bus, hd, 1);
- pci_piix3_ide_init(pci_bus, hd, -1, irq);
+ pci_cmd646_ide_init(pci_bus, hd, 1);
+
/* FIXME: wire up interrupts. */
i8042_init(NULL/*1*/, NULL/*12*/, 0x60);
for(i = 0; i < MAX_FD; i++) {
@@ -612,31 +612,31 @@ static const struct hwdef hwdefs[] = {
/* Sun4u hardware initialisation */
static void sun4u_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_devices, DisplayState *ds,
+ const char *boot_devices,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4uv_init(RAM_size, vga_ram_size, boot_devices, ds, kernel_filename,
+ sun4uv_init(RAM_size, vga_ram_size, boot_devices, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[0]);
}
/* Sun4v hardware initialisation */
static void sun4v_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_devices, DisplayState *ds,
+ const char *boot_devices,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4uv_init(RAM_size, vga_ram_size, boot_devices, ds, kernel_filename,
+ sun4uv_init(RAM_size, vga_ram_size, boot_devices, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[1]);
}
/* Niagara hardware initialisation */
static void niagara_init(ram_addr_t RAM_size, int vga_ram_size,
- const char *boot_devices, DisplayState *ds,
+ const char *boot_devices,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4uv_init(RAM_size, vga_ram_size, boot_devices, ds, kernel_filename,
+ sun4uv_init(RAM_size, vga_ram_size, boot_devices, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[2]);
}
diff --git a/hw/tc6393xb.c b/hw/tc6393xb.c
index a5fed5f1a..7d2f1b250 100644
--- a/hw/tc6393xb.c
+++ b/hw/tc6393xb.c
@@ -122,7 +122,6 @@ struct tc6393xb_s {
struct ecc_state_s ecc;
DisplayState *ds;
- QEMUConsole *console;
ram_addr_t vram_addr;
uint32_t scr_width, scr_height; /* in pixels */
qemu_irq l3v;
@@ -485,7 +484,7 @@ static void tc6393xb_update_display(void *opaque)
full_update = 1;
}
if (s->scr_width != ds_get_width(s->ds) || s->scr_height != ds_get_height(s->ds)) {
- qemu_console_resize(s->console, s->scr_width, s->scr_height);
+ qemu_console_resize(s->ds, s->scr_width, s->scr_height);
full_update = 1;
}
if (s->blanked)
@@ -563,7 +562,7 @@ static void tc6393xb_writel(void *opaque, target_phys_addr_t addr, uint32_t valu
tc6393xb_writeb(opaque, addr + 3, value >> 24);
}
-struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq, DisplayState *ds)
+struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq)
{
int iomemtype;
struct tc6393xb_s *s;
@@ -593,19 +592,15 @@ struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq, DisplayState *ds)
tc6393xb_writefn, s);
cpu_register_physical_memory(base, 0x10000, iomemtype);
- if (ds) {
- s->ds = ds;
- s->vram_addr = qemu_ram_alloc(0x100000);
- cpu_register_physical_memory(base + 0x100000, 0x100000, s->vram_addr);
- s->scr_width = 480;
- s->scr_height = 640;
- s->console = graphic_console_init(ds,
- tc6393xb_update_display,
- NULL, /* invalidate */
- NULL, /* screen_dump */
- NULL, /* text_update */
- s);
- }
+ s->vram_addr = qemu_ram_alloc(0x100000);
+ cpu_register_physical_memory(base + 0x100000, 0x100000, s->vram_addr);
+ s->scr_width = 480;
+ s->scr_height = 640;
+ s->ds = graphic_console_init(tc6393xb_update_display,
+ NULL, /* invalidate */
+ NULL, /* screen_dump */
+ NULL, /* text_update */
+ s);
return s;
}
diff --git a/hw/tcx.c b/hw/tcx.c
index 004685bc2..1005e63e2 100644
--- a/hw/tcx.c
+++ b/hw/tcx.c
@@ -36,7 +36,6 @@
typedef struct TCXState {
target_phys_addr_t addr;
DisplayState *ds;
- QEMUConsole *console;
uint8_t *vram;
uint32_t *vram24, *cplane;
ram_addr_t vram_offset, vram24_offset, cplane_offset;
@@ -61,22 +60,13 @@ static void update_palette_entries(TCXState *s, int start, int end)
s->palette[i] = rgb_to_pixel8(s->r[i], s->g[i], s->b[i]);
break;
case 15:
- if (s->ds->bgr)
- s->palette[i] = rgb_to_pixel15bgr(s->r[i], s->g[i], s->b[i]);
- else
- s->palette[i] = rgb_to_pixel15(s->r[i], s->g[i], s->b[i]);
+ s->palette[i] = rgb_to_pixel15(s->r[i], s->g[i], s->b[i]);
break;
case 16:
- if (s->ds->bgr)
- s->palette[i] = rgb_to_pixel16bgr(s->r[i], s->g[i], s->b[i]);
- else
- s->palette[i] = rgb_to_pixel16(s->r[i], s->g[i], s->b[i]);
+ s->palette[i] = rgb_to_pixel16(s->r[i], s->g[i], s->b[i]);
break;
case 32:
- if (s->ds->bgr)
- s->palette[i] = rgb_to_pixel32bgr(s->r[i], s->g[i], s->b[i]);
- else
- s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]);
+ s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]);
break;
}
}
@@ -134,12 +124,11 @@ static inline void tcx24_draw_line32(TCXState *s1, uint8_t *d,
const uint32_t *cplane,
const uint32_t *s24)
{
- int x, bgr, r, g, b;
+ int x, r, g, b;
uint8_t val, *p8;
uint32_t *p = (uint32_t *)d;
uint32_t dval;
- bgr = s1->ds->bgr;
for(x = 0; x < width; x++, s++, s24++) {
if ((be32_to_cpu(*cplane++) & 0xff000000) == 0x03000000) {
// 24-bit direct, BGR order
@@ -148,10 +137,7 @@ static inline void tcx24_draw_line32(TCXState *s1, uint8_t *d,
b = *p8++;
g = *p8++;
r = *p8++;
- if (bgr)
- dval = rgb_to_pixel32bgr(r, g, b);
- else
- dval = rgb_to_pixel32(r, g, b);
+ dval = rgb_to_pixel32(r, g, b);
} else {
val = *s;
dval = s1->palette[val];
@@ -504,7 +490,7 @@ static CPUWriteMemoryFunc *tcx_dummy_write[3] = {
tcx_dummy_writel,
};
-void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
+void tcx_init(target_phys_addr_t addr, uint8_t *vram_base,
unsigned long vram_offset, int vram_size, int width, int height,
int depth)
{
@@ -515,7 +501,6 @@ void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
s = qemu_mallocz(sizeof(TCXState));
if (!s)
return;
- s->ds = ds;
s->addr = addr;
s->vram_offset = vram_offset;
s->width = width;
@@ -551,15 +536,15 @@ void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
s->cplane = (uint32_t *)vram_base;
s->cplane_offset = vram_offset;
cpu_register_physical_memory(addr + 0x0a000000ULL, size, vram_offset);
- s->console = graphic_console_init(s->ds, tcx24_update_display,
- tcx24_invalidate_display,
- tcx24_screen_dump, NULL, s);
+ s->ds = graphic_console_init(tcx24_update_display,
+ tcx24_invalidate_display,
+ tcx24_screen_dump, NULL, s);
} else {
cpu_register_physical_memory(addr + 0x00300000ULL, TCX_THC_NREGS_8,
dummy_memory);
- s->console = graphic_console_init(s->ds, tcx_update_display,
- tcx_invalidate_display,
- tcx_screen_dump, NULL, s);
+ s->ds = graphic_console_init(tcx_update_display,
+ tcx_invalidate_display,
+ tcx_screen_dump, NULL, s);
}
// NetBSD writes here even with 8-bit display
cpu_register_physical_memory(addr + 0x00301000ULL, TCX_THC_NREGS_24,
@@ -568,7 +553,7 @@ void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
register_savevm("tcx", addr, 4, tcx_save, tcx_load, s);
qemu_register_reset(tcx_reset, s);
tcx_reset(s);
- qemu_console_resize(s->console, width, height);
+ qemu_console_resize(s->ds, width, height);
}
static void tcx_screen_dump(void *opaque, const char *filename)
diff --git a/hw/tosa.c b/hw/tosa.c
index effba4246..64ebaa412 100644
--- a/hw/tosa.c
+++ b/hw/tosa.c
@@ -197,7 +197,7 @@ static struct arm_boot_info tosa_binfo = {
};
static void tosa_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
@@ -214,14 +214,13 @@ static void tosa_init(ram_addr_t ram_size, int vga_ram_size,
if (!cpu_model)
cpu_model = "pxa255";
- cpu = pxa255_init(tosa_binfo.ram_size, NULL);
+ cpu = pxa255_init(tosa_binfo.ram_size);
cpu_register_physical_memory(0, TOSA_ROM,
qemu_ram_alloc(TOSA_ROM) | IO_MEM_ROM);
tmio = tc6393xb_init(0x10000000,
- pxa2xx_gpio_in_get(cpu->gpio)[TOSA_GPIO_TC6393XB_INT],
- ds);
+ pxa2xx_gpio_in_get(cpu->gpio)[TOSA_GPIO_TC6393XB_INT]);
scp0 = scoop_init(cpu, 0, 0x08800000);
scp1 = scoop_init(cpu, 1, 0x14800040);
diff --git a/hw/versatilepb.c b/hw/versatilepb.c
index 267aa42d6..f601e2f37 100644
--- a/hw/versatilepb.c
+++ b/hw/versatilepb.c
@@ -156,7 +156,7 @@ static qemu_irq *vpb_sic_init(uint32_t base, qemu_irq *parent, int irq)
static struct arm_boot_info versatile_binfo;
static void versatile_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model,
int board_id)
@@ -228,7 +228,7 @@ static void versatile_init(ram_addr_t ram_size, int vga_ram_size,
/* The versatile/PB actually has a modified Color LCD controller
that includes hardware cursor support from the PL111. */
- pl110_init(ds, 0x10120000, pic[16], 1);
+ pl110_init(0x10120000, pic[16], 1);
index = drive_get_index(IF_SD, 0, 0);
if (index == -1) {
@@ -290,23 +290,23 @@ static void versatile_init(ram_addr_t ram_size, int vga_ram_size,
}
static void vpb_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
versatile_init(ram_size, vga_ram_size,
- boot_device, ds,
+ boot_device,
kernel_filename, kernel_cmdline,
initrd_filename, cpu_model, 0x183);
}
static void vab_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
versatile_init(ram_size, vga_ram_size,
- boot_device, ds,
+ boot_device,
kernel_filename, kernel_cmdline,
initrd_filename, cpu_model, 0x25e);
}
diff --git a/hw/vga.c b/hw/vga.c
index 3cde81894..d6926fd51 100644
--- a/hw/vga.c
+++ b/hw/vga.c
@@ -1158,20 +1158,11 @@ static inline int get_depth_index(DisplayState *s)
case 8:
return 0;
case 15:
- if (s->bgr)
- return 5;
- else
- return 1;
+ return 1;
case 16:
- if (s->bgr)
- return 6;
- else
- return 2;
+ return 2;
case 32:
- if (s->bgr)
- return 4;
- else
- return 3;
+ return 3;
}
}
@@ -1253,6 +1244,10 @@ static void vga_get_text_resolution(VGAState *s, int *pwidth, int *pheight,
*pcheight = cheight;
}
+typedef unsigned int rgb_to_pixel_dup_func(unsigned int r, unsigned int g, unsigned b);
+
+static rgb_to_pixel_dup_func *rgb_to_pixel_dup_table[NB_DEPTHS];
+
/*
* Text mode update
* Missing:
@@ -1276,9 +1271,6 @@ static void vga_draw_text(VGAState *s, int full_update)
vga_dirty_log_stop(s);
- full_update |= update_palette16(s);
- palette = s->last_palette;
-
/* compute font data address (in plane 2) */
v = s->sr[3];
offset = (((v >> 4) & 1) | ((v << 1) & 6)) * 8192 * 4 + 2;
@@ -1313,16 +1305,23 @@ static void vga_draw_text(VGAState *s, int full_update)
}
if (width != s->last_width || height != s->last_height ||
- cw != s->last_cw || cheight != s->last_ch) {
+ cw != s->last_cw || cheight != s->last_ch || s->last_depth) {
s->last_scr_width = width * cw;
s->last_scr_height = height * cheight;
- qemu_console_resize(s->console, s->last_scr_width, s->last_scr_height);
+ qemu_console_resize(s->ds, s->last_scr_width, s->last_scr_height);
+ s->last_depth = 0;
s->last_width = width;
s->last_height = height;
s->last_ch = cheight;
s->last_cw = cw;
full_update = 1;
}
+ s->rgb_to_pixel =
+ rgb_to_pixel_dup_table[get_depth_index(s->ds)];
+ full_update |= update_palette16(s);
+ palette = s->last_palette;
+ x_incr = cw * ((ds_get_bits_per_pixel(s->ds) + 7) >> 3);
+
cursor_offset = ((s->cr[0x0e] << 8) | s->cr[0x0f]) - s->start_addr;
if (cursor_offset != s->cursor_offset ||
s->cr[0xa] != s->cursor_start ||
@@ -1514,8 +1513,6 @@ static vga_draw_line_func *vga_draw_line_table[NB_DEPTHS * VGA_DRAW_LINE_NB] = {
vga_draw_line32_16bgr,
};
-typedef unsigned int rgb_to_pixel_dup_func(unsigned int r, unsigned int g, unsigned b);
-
static rgb_to_pixel_dup_func *rgb_to_pixel_dup_table[NB_DEPTHS] = {
rgb_to_pixel8_dup,
rgb_to_pixel15_dup,
@@ -1590,7 +1587,7 @@ static void vga_sync_dirty_bitmap(VGAState *s)
*/
static void vga_draw_graphic(VGAState *s, int full_update)
{
- int y1, y, update, linesize, y_start, double_scan, mask;
+ int y1, y, update, linesize, y_start, double_scan, mask, depth;
int width, height, shift_control, line_offset, bwidth, bits;
int disp_width, multi_scan, multi_run;
uint8_t *d;
@@ -1623,6 +1620,40 @@ static void vga_draw_graphic(VGAState *s, int full_update)
s->double_scan = double_scan;
}
+ depth = s->get_bpp(s);
+ if (s->line_offset != s->last_line_offset ||
+ disp_width != s->last_width ||
+ height != s->last_height ||
+ s->last_depth != depth) {
+ if (depth == 16 || depth == 32) {
+ if (is_graphic_console()) {
+ qemu_free_displaysurface(s->ds->surface);
+ s->ds->surface = qemu_create_displaysurface_from(disp_width, height, depth,
+ s->line_offset,
+ s->vram_ptr + (s->start_addr * 4));
+ dpy_resize(s->ds);
+ } else {
+ qemu_console_resize(s->ds, disp_width, height);
+ }
+ } else {
+ qemu_console_resize(s->ds, disp_width, height);
+ }
+ s->last_scr_width = disp_width;
+ s->last_scr_height = height;
+ s->last_width = disp_width;
+ s->last_height = height;
+ s->last_line_offset = s->line_offset;
+ s->last_depth = depth;
+ full_update = 1;
+ } else if (is_graphic_console() && is_buffer_shared(s->ds->surface) &&
+ (full_update || s->ds->surface->data != s->vram_ptr + (s->start_addr * 4))) {
+ s->ds->surface->data = s->vram_ptr + (s->start_addr * 4);
+ dpy_setdata(s->ds);
+ }
+
+ s->rgb_to_pixel =
+ rgb_to_pixel_dup_table[get_depth_index(s->ds)];
+
if (shift_control == 0) {
full_update |= update_palette16(s);
if (s->sr[0x01] & 8) {
@@ -1674,16 +1705,7 @@ static void vga_draw_graphic(VGAState *s, int full_update)
}
vga_draw_line = vga_draw_line_table[v * NB_DEPTHS + get_depth_index(s->ds)];
- if (disp_width != s->last_width ||
- height != s->last_height) {
- qemu_console_resize(s->console, disp_width, height);
- s->last_scr_width = disp_width;
- s->last_scr_height = height;
- s->last_width = disp_width;
- s->last_height = height;
- full_update = 1;
- }
- if (s->cursor_invalidate)
+ if (!is_buffer_shared(s->ds->surface) && s->cursor_invalidate)
s->cursor_invalidate(s);
line_offset = s->line_offset;
@@ -1729,9 +1751,11 @@ static void vga_draw_graphic(VGAState *s, int full_update)
page_min = page0;
if (page1 > page_max)
page_max = page1;
- vga_draw_line(s, d, s->vram_ptr + addr, width);
- if (s->cursor_draw_line)
- s->cursor_draw_line(s, d, y);
+ if (!(is_buffer_shared(s->ds->surface))) {
+ vga_draw_line(s, d, s->vram_ptr + addr, width);
+ if (s->cursor_draw_line)
+ s->cursor_draw_line(s, d, y);
+ }
} else {
if (y_start >= 0) {
/* flush to display */
@@ -1778,6 +1802,8 @@ static void vga_draw_blank(VGAState *s, int full_update)
return;
vga_dirty_log_stop(s);
+ s->rgb_to_pixel =
+ rgb_to_pixel_dup_table[get_depth_index(s->ds)];
if (ds_get_bits_per_pixel(s->ds) == 8)
val = s->rgb_to_pixel(0, 0, 0);
else
@@ -1804,9 +1830,6 @@ static void vga_update_display(void *opaque)
if (ds_get_bits_per_pixel(s->ds) == 0) {
/* nothing to do */
} else {
- s->rgb_to_pixel =
- rgb_to_pixel_dup_table[get_depth_index(s->ds)];
-
full_update = 0;
if (!(s->ar_index & 0x20)) {
graphic_mode = GMODE_BLANK;
@@ -1980,7 +2003,9 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
cw != s->last_cw || cheight != s->last_ch) {
s->last_scr_width = width * cw;
s->last_scr_height = height * cheight;
- qemu_console_resize(s->console, width, height);
+ s->ds->surface->width = width;
+ s->ds->surface->height = height;
+ dpy_resize(s->ds);
s->last_width = width;
s->last_height = height;
s->last_ch = cheight;
@@ -2061,7 +2086,9 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
s->last_width = 60;
s->last_height = height = 3;
dpy_cursor(s->ds, -1, -1);
- qemu_console_resize(s->console, s->last_width, height);
+ s->ds->surface->width = s->last_width;
+ s->ds->surface->height = height;
+ dpy_resize(s->ds);
for (dst = chardata, i = 0; i < s->last_width * height; i ++)
console_write_ch(dst ++, ' ');
@@ -2384,8 +2411,7 @@ void vga_bios_init(VGAState *s)
}
#endif
-/* when used on xen/kvm environment, the vga_ram_base is not used */
-void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
+void vga_common_init(VGAState *s, uint8_t *vga_ram_base,
ram_addr_t vga_ram_offset, int vga_ram_size)
{
int i, j, v, b;
@@ -2416,7 +2442,6 @@ void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
s->vram_ptr = vga_ram_base;
s->vram_offset = vga_ram_offset;
s->vram_size = vga_ram_size;
- s->ds = ds;
s->get_bpp = vga_get_bpp;
s->get_offsets = vga_get_offsets;
s->get_resolution = vga_get_resolution;
@@ -2568,7 +2593,7 @@ static void vga_mm_init(VGAState *s, target_phys_addr_t vram_base,
qemu_register_coalesced_mmio(vram_base + 0x000a0000, 0x20000);
}
-int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
+int isa_vga_init(uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size)
{
VGAState *s;
@@ -2577,11 +2602,11 @@ int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
if (!s)
return -1;
- vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
+ vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
vga_init(s);
- s->console = graphic_console_init(s->ds, s->update, s->invalidate,
- s->screen_dump, s->text_update, s);
+ s->ds = graphic_console_init(s->update, s->invalidate,
+ s->screen_dump, s->text_update, s);
#ifdef CONFIG_BOCHS_VBE
/* XXX: use optimized standard vga accesses */
@@ -2591,7 +2616,7 @@ int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
return 0;
}
-int isa_vga_mm_init(DisplayState *ds, uint8_t *vga_ram_base,
+int isa_vga_mm_init(uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size,
target_phys_addr_t vram_base, target_phys_addr_t ctrl_base,
int it_shift)
@@ -2602,11 +2627,11 @@ int isa_vga_mm_init(DisplayState *ds, uint8_t *vga_ram_base,
if (!s)
return -1;
- vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
+ vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
vga_mm_init(s, vram_base, ctrl_base, it_shift);
- s->console = graphic_console_init(s->ds, s->update, s->invalidate,
- s->screen_dump, s->text_update, s);
+ s->ds = graphic_console_init(s->update, s->invalidate,
+ s->screen_dump, s->text_update, s);
#ifdef CONFIG_BOCHS_VBE
/* XXX: use optimized standard vga accesses */
@@ -2629,7 +2654,7 @@ static void pci_vga_write_config(PCIDevice *d,
vga_dirty_log_start(s);
}
-int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
+int pci_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size,
unsigned long vga_bios_offset, int vga_bios_size)
{
@@ -2644,11 +2669,11 @@ int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
return -1;
s = &d->vga_state;
- vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
+ vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
vga_init(s);
- s->console = graphic_console_init(s->ds, s->update, s->invalidate,
- s->screen_dump, s->text_update, s);
+ s->ds = graphic_console_init(s->update, s->invalidate,
+ s->screen_dump, s->text_update, s);
s->pci_dev = &d->dev;
@@ -2681,49 +2706,52 @@ int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
/********************************************************/
/* vga screen dump */
-static int vga_save_w, vga_save_h;
-
static void vga_save_dpy_update(DisplayState *s,
int x, int y, int w, int h)
{
}
-static void vga_save_dpy_resize(DisplayState *s, int w, int h)
+static void vga_save_dpy_resize(DisplayState *s)
{
- s->linesize = w * 4;
- s->data = qemu_mallocz(h * s->linesize);
- vga_save_w = w;
- vga_save_h = h;
}
static void vga_save_dpy_refresh(DisplayState *s)
{
}
-int ppm_save(const char *filename, uint8_t *data,
- int w, int h, int linesize)
+int ppm_save(const char *filename, struct DisplaySurface *ds)
{
FILE *f;
uint8_t *d, *d1;
- unsigned int v;
+ uint32_t v;
int y, x;
+ uint8_t r, g, b;
f = fopen(filename, "wb");
if (!f)
return -1;
fprintf(f, "P6\n%d %d\n%d\n",
- w, h, 255);
- d1 = data;
- for(y = 0; y < h; y++) {
+ ds->width, ds->height, 255);
+ d1 = ds->data;
+ for(y = 0; y < ds->height; y++) {
d = d1;
- for(x = 0; x < w; x++) {
- v = *(uint32_t *)d;
- fputc((v >> 16) & 0xff, f);
- fputc((v >> 8) & 0xff, f);
- fputc((v) & 0xff, f);
- d += 4;
+ for(x = 0; x < ds->width; x++) {
+ if (ds->pf.bits_per_pixel == 32)
+ v = *(uint32_t *)d;
+ else
+ v = (uint32_t) (*(uint16_t *)d);
+ r = ((v >> ds->pf.rshift) & ds->pf.rmax) * 256 /
+ (ds->pf.rmax + 1);
+ g = ((v >> ds->pf.gshift) & ds->pf.gmax) * 256 /
+ (ds->pf.gmax + 1);
+ b = ((v >> ds->pf.bshift) & ds->pf.bmax) * 256 /
+ (ds->pf.bmax + 1);
+ fputc(r, f);
+ fputc(g, f);
+ fputc(b, f);
+ d += ds->pf.bytes_per_pixel;
}
- d1 += linesize;
+ d1 += ds->linesize;
}
fclose(f);
return 0;
@@ -2753,24 +2781,27 @@ static void vga_screen_dump_common(VGAState *s, const char *filename,
int w, int h)
{
DisplayState *saved_ds, ds1, *ds = &ds1;
+ DisplayChangeListener dcl;
/* XXX: this is a little hackish */
vga_invalidate_display(s);
saved_ds = s->ds;
memset(ds, 0, sizeof(DisplayState));
- ds->dpy_update = vga_save_dpy_update;
- ds->dpy_resize = vga_save_dpy_resize;
- ds->dpy_refresh = vga_save_dpy_refresh;
- ds->depth = 32;
+ memset(&dcl, 0, sizeof(DisplayChangeListener));
+ dcl.dpy_update = vga_save_dpy_update;
+ dcl.dpy_resize = vga_save_dpy_resize;
+ dcl.dpy_refresh = vga_save_dpy_refresh;
+ register_displaychangelistener(ds, &dcl);
+ ds->surface = qemu_create_displaysurface(w, h, 32, 4 * w);
- ds->linesize = w * sizeof(uint32_t);
- ds->data = qemu_mallocz(h * ds->linesize);
s->ds = ds;
s->graphic_mode = -1;
vga_update_display(s);
- ppm_save(filename, ds->data, w, h, ds->linesize);
- qemu_free(ds->data);
+
+ ppm_save(filename, ds->surface);
+
+ qemu_free_displaysurface(ds->surface);
s->ds = saved_ds;
}
diff --git a/hw/vga_int.h b/hw/vga_int.h
index 557832d3c..8ba8a60f2 100644
--- a/hw/vga_int.h
+++ b/hw/vga_int.h
@@ -145,7 +145,6 @@ typedef void (* vga_update_retrace_info_fn)(struct VGAState *s);
VGA_STATE_COMMON_BOCHS_VBE \
/* display refresh support */ \
DisplayState *ds; \
- QEMUConsole *console; \
uint32_t font_offsets[2]; \
int graphic_mode; \
uint8_t shift_control; \
@@ -154,9 +153,11 @@ typedef void (* vga_update_retrace_info_fn)(struct VGAState *s);
uint32_t line_compare; \
uint32_t start_addr; \
uint32_t plane_updated; \
+ uint32_t last_line_offset; \
uint8_t last_cw, last_ch; \
uint32_t last_width, last_height; /* in chars or pixels */ \
uint32_t last_scr_width, last_scr_height; /* in pixels */ \
+ uint32_t last_depth; /* in bits */ \
uint8_t cursor_start, cursor_end; \
uint32_t cursor_offset; \
unsigned int (*rgb_to_pixel)(unsigned int r, \
@@ -190,7 +191,7 @@ static inline int c6_to_8(int v)
return (v << 2) | (b << 1) | b;
}
-void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
+void vga_common_init(VGAState *s, uint8_t *vga_ram_base,
ram_addr_t vga_ram_offset, int vga_ram_size);
void vga_init(VGAState *s);
void vga_reset(void *s);
@@ -201,8 +202,7 @@ void vga_dirty_log_stop(VGAState *s);
uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
-int ppm_save(const char *filename, uint8_t *data,
- int w, int h, int linesize);
+int ppm_save(const char *filename, struct DisplaySurface *ds);
void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
int poffset, int w,
diff --git a/hw/virtio-console.c b/hw/virtio-console.c
new file mode 100644
index 000000000..deae76d0d
--- /dev/null
+++ b/hw/virtio-console.c
@@ -0,0 +1,147 @@
+/*
+ * Virtio Console Device
+ *
+ * Copyright IBM, Corp. 2008
+ *
+ * Authors:
+ * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ *
+ */
+
+#include "hw.h"
+#include "qemu-char.h"
+#include "virtio.h"
+#include "virtio-console.h"
+
+
+typedef struct VirtIOConsole
+{
+ VirtIODevice vdev;
+ VirtQueue *ivq, *dvq;
+ CharDriverState *chr;
+} VirtIOConsole;
+
+static VirtIOConsole *to_virtio_console(VirtIODevice *vdev)
+{
+ return (VirtIOConsole *)vdev;
+}
+
+static void virtio_console_handle_output(VirtIODevice *vdev, VirtQueue *vq)
+{
+ VirtIOConsole *s = to_virtio_console(vdev);
+ VirtQueueElement elem;
+
+ while (virtqueue_pop(vq, &elem)) {
+ ssize_t len = 0;
+ int d;
+
+ for (d=0; d < elem.out_num; d++)
+ len += qemu_chr_write(s->chr, elem.out_sg[d].iov_base,elem.out_sg[d].iov_len);
+ virtqueue_push(vq, &elem, len);
+ virtio_notify(vdev, vq);
+ }
+}
+
+static void virtio_console_handle_input(VirtIODevice *vdev, VirtQueue *vq)
+{
+}
+
+static uint32_t virtio_console_get_features(VirtIODevice *vdev)
+{
+ return 0;
+}
+
+static int vcon_can_read(void *opaque)
+{
+ VirtIOConsole *s = (VirtIOConsole *) opaque;
+
+ if (!virtio_queue_ready(s->ivq) ||
+ !(s->vdev.status & VIRTIO_CONFIG_S_DRIVER_OK) ||
+ virtio_queue_empty(s->ivq))
+ return 0;
+
+ /* current implementations have a page sized buffer.
+ * We fall back to a one byte per read if there is not enough room.
+ * It would be cool to have a function that returns the available byte
+ * instead of checking for a limit */
+ if (virtqueue_avail_bytes(s->ivq, TARGET_PAGE_SIZE, 0))
+ return TARGET_PAGE_SIZE;
+ if (virtqueue_avail_bytes(s->ivq, 1, 0))
+ return 1;
+ return 0;
+}
+
+static void vcon_read(void *opaque, const uint8_t *buf, int size)
+{
+ VirtIOConsole *s = (VirtIOConsole *) opaque;
+ VirtQueueElement elem;
+ int offset = 0;
+
+ /* The current kernel implementation has only one outstanding input
+ * buffer of PAGE_SIZE. Nevertheless, this function is prepared to
+ * handle multiple buffers with multiple sg element for input */
+ while (offset < size) {
+ int i = 0;
+ if (!virtqueue_pop(s->ivq, &elem))
+ break;
+ while (offset < size && i < elem.in_num) {
+ int len = MIN(elem.in_sg[i].iov_len, size - offset);
+ memcpy(elem.in_sg[i].iov_base, buf + offset, len);
+ offset += len;
+ i++;
+ }
+ virtqueue_push(s->ivq, &elem, size);
+ }
+ virtio_notify(&s->vdev, s->ivq);
+}
+
+static void vcon_event(void *opaque, int event)
+{
+ /* we will ignore any event for the time being */
+}
+
+static void virtio_console_save(QEMUFile *f, void *opaque)
+{
+ VirtIOConsole *s = opaque;
+
+ virtio_save(&s->vdev, f);
+}
+
+static int virtio_console_load(QEMUFile *f, void *opaque, int version_id)
+{
+ VirtIOConsole *s = opaque;
+
+ if (version_id != 1)
+ return -EINVAL;
+
+ virtio_load(&s->vdev, f);
+ return 0;
+}
+
+void *virtio_console_init(PCIBus *bus, CharDriverState *chr)
+{
+ VirtIOConsole *s;
+
+ s = (VirtIOConsole *)virtio_init_pci(bus, "virtio-console",
+ 6900, 0x1003,
+ 0, VIRTIO_ID_CONSOLE,
+ 0x03, 0x80, 0x00,
+ 0, sizeof(VirtIOConsole));
+ if (s == NULL)
+ return NULL;
+
+ s->vdev.get_features = virtio_console_get_features;
+
+ s->ivq = virtio_add_queue(&s->vdev, 128, virtio_console_handle_input);
+ s->dvq = virtio_add_queue(&s->vdev, 128, virtio_console_handle_output);
+
+ s->chr = chr;
+ qemu_chr_add_handlers(chr, vcon_can_read, vcon_read, vcon_event, s);
+
+ register_savevm("virtio-console", -1, 1, virtio_console_save, virtio_console_load, s);
+
+ return &s->vdev;
+}
diff --git a/hw/virtio-console.h b/hw/virtio-console.h
new file mode 100644
index 000000000..2de9520ae
--- /dev/null
+++ b/hw/virtio-console.h
@@ -0,0 +1,22 @@
+/*
+ * Virtio Console Support
+ *
+ * Copyright IBM, Corp. 2008
+ *
+ * Authors:
+ * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ *
+ */
+#ifndef _QEMU_VIRTIO_CONSOLE_H
+#define _QEMU_VIRTIO_CONSOLE_H
+
+/* The ID for virtio console */
+#define VIRTIO_ID_CONSOLE 3
+
+/* Creates a virtio console */
+void *virtio_console_init(PCIBus *bus, CharDriverState *chr);
+
+#endif
diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c
index e30d03fde..950a98c15 100644
--- a/hw/vmware_vga.c
+++ b/hw/vmware_vga.c
@@ -57,7 +57,6 @@ struct vmsvga_state_s {
#ifndef EMBED_STDVGA
DisplayState *ds;
- QEMUConsole *console;
int vram_size;
ram_addr_t vram_offset;
#endif
@@ -384,7 +383,7 @@ static inline void vmsvga_copy_rect(struct vmsvga_state_s *s,
# ifdef DIRECT_VRAM
if (s->ds->dpy_copy)
- qemu_console_copy(s->console, x0, y0, x1, y1, w, h);
+ qemu_console_copy(s->ds, x0, y0, x1, y1, w, h);
else
# endif
{
@@ -877,7 +876,7 @@ static inline void vmsvga_size(struct vmsvga_state_s *s)
if (s->new_width != s->width || s->new_height != s->height) {
s->width = s->new_width;
s->height = s->new_height;
- qemu_console_resize(s->console, s->width, s->height);
+ qemu_console_resize(s->ds, s->width, s->height);
s->invalidated = 1;
}
}
@@ -915,7 +914,7 @@ static void vmsvga_reset(struct vmsvga_state_s *s)
s->width = -1;
s->height = -1;
s->svgaid = SVGA_ID;
- s->depth = ds_get_bits_per_pixel(s->ds) ? ds_get_bits_per_pixel(s->ds) : 24;
+ s->depth = 24;
s->bypp = (s->depth + 7) >> 3;
s->cursor.on = 0;
s->redraw_fifo_first = 0;
@@ -976,7 +975,10 @@ static void vmsvga_screen_dump(void *opaque, const char *filename)
}
if (s->depth == 32) {
- ppm_save(filename, s->vram, s->width, s->height, ds_get_linesize(s->ds));
+ DisplaySurface *ds = qemu_create_displaysurface_from(s->width,
+ s->height, 32, ds_get_linesize(s->ds), s->vram);
+ ppm_save(filename, ds);
+ qemu_free(ds);
}
}
@@ -1110,11 +1112,10 @@ static int vmsvga_load(struct vmsvga_state_s *s, QEMUFile *f)
return 0;
}
-static void vmsvga_init(struct vmsvga_state_s *s, DisplayState *ds,
+static void vmsvga_init(struct vmsvga_state_s *s,
uint8_t *vga_ram_base, unsigned long vga_ram_offset,
int vga_ram_size)
{
- s->ds = ds;
s->vram = vga_ram_base;
s->vram_size = vga_ram_size;
s->vram_offset = vga_ram_offset;
@@ -1125,15 +1126,15 @@ static void vmsvga_init(struct vmsvga_state_s *s, DisplayState *ds,
vmsvga_reset(s);
#ifdef EMBED_STDVGA
- vga_common_init((VGAState *) s, ds,
+ vga_common_init((VGAState *) s,
vga_ram_base, vga_ram_offset, vga_ram_size);
vga_init((VGAState *) s);
#endif
- s->console = graphic_console_init(ds, vmsvga_update_display,
- vmsvga_invalidate_display,
- vmsvga_screen_dump,
- vmsvga_text_update, s);
+ s->ds = graphic_console_init(vmsvga_update_display,
+ vmsvga_invalidate_display,
+ vmsvga_screen_dump,
+ vmsvga_text_update, s);
#ifdef CONFIG_BOCHS_VBE
/* XXX: use optimized standard vga accesses */
@@ -1213,7 +1214,7 @@ static void pci_vmsvga_map_mem(PCIDevice *pci_dev, int region_num,
#define PCI_CLASS_SUB_VGA 0x00
#define PCI_CLASS_HEADERTYPE_00h 0x00
-void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
+void pci_vmsvga_init(PCIBus *bus, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size)
{
struct pci_vmsvga_state_s *s;
@@ -1243,7 +1244,7 @@ void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
pci_register_io_region(&s->card, 1, vga_ram_size,
PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_vmsvga_map_mem);
- vmsvga_init(&s->chip, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
+ vmsvga_init(&s->chip, vga_ram_base, vga_ram_offset, vga_ram_size);
register_savevm("vmware_vga", 0, 0, pci_vmsvga_save, pci_vmsvga_load, s);
}
diff --git a/kqemu.c b/kqemu.c
index e915a8356..25f4ea784 100644
--- a/kqemu.c
+++ b/kqemu.c
@@ -47,6 +47,15 @@
#define DEBUG
//#define PROFILE
+
+#ifdef DEBUG
+# define LOG_INT(...) qemu_log_mask(CPU_LOG_INT, ## __VA_ARGS__)
+# define LOG_INT_STATE(env) log_cpu_state_mask(CPU_LOG_INT, (env), 0)
+#else
+# define LOG_INT(...) do { } while (0)
+# define LOG_INT_STATE(env) do { } while (0)
+#endif
+
#include <unistd.h>
#include <fcntl.h>
#include "kqemu.h"
@@ -241,11 +250,7 @@ int kqemu_init(CPUState *env)
void kqemu_flush_page(CPUState *env, target_ulong addr)
{
-#if defined(DEBUG)
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "kqemu_flush_page: addr=" TARGET_FMT_lx "\n", addr);
- }
-#endif
+ LOG_INT("kqemu_flush_page: addr=" TARGET_FMT_lx "\n", addr);
if (nb_pages_to_flush >= KQEMU_MAX_PAGES_TO_FLUSH)
nb_pages_to_flush = KQEMU_FLUSH_ALL;
else
@@ -254,22 +259,14 @@ void kqemu_flush_page(CPUState *env, target_ulong addr)
void kqemu_flush(CPUState *env, int global)
{
-#ifdef DEBUG
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "kqemu_flush:\n");
- }
-#endif
+ LOG_INT("kqemu_flush:\n");
nb_pages_to_flush = KQEMU_FLUSH_ALL;
}
void kqemu_set_notdirty(CPUState *env, ram_addr_t ram_addr)
{
-#ifdef DEBUG
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "kqemu_set_notdirty: addr=%08lx\n",
+ LOG_INT("kqemu_set_notdirty: addr=%08lx\n",
(unsigned long)ram_addr);
- }
-#endif
/* we only track transitions to dirty state */
if (phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS] != 0xff)
return;
@@ -703,12 +700,8 @@ int kqemu_cpu_exec(CPUState *env)
#ifdef CONFIG_PROFILER
ti = profile_getclock();
#endif
-#ifdef DEBUG
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "kqemu: cpu_exec: enter\n");
- cpu_dump_state(env, logfile, fprintf, 0);
- }
-#endif
+ LOG_INT("kqemu: cpu_exec: enter\n");
+ LOG_INT_STATE(env);
for(i = 0; i < CPU_NB_REGS; i++)
kenv->regs[i] = env->regs[i];
kenv->eip = env->eip;
@@ -867,11 +860,7 @@ int kqemu_cpu_exec(CPUState *env)
else
env->hflags &= ~HF_OSFXSR_MASK;
-#ifdef DEBUG
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "kqemu: kqemu_cpu_exec: ret=0x%x\n", ret);
- }
-#endif
+ LOG_INT("kqemu: kqemu_cpu_exec: ret=0x%x\n", ret);
if (ret == KQEMU_RET_SYSCALL) {
/* syscall instruction */
return do_syscall(env, kenv);
@@ -884,13 +873,8 @@ int kqemu_cpu_exec(CPUState *env)
#ifdef CONFIG_PROFILER
kqemu_ret_int_count++;
#endif
-#ifdef DEBUG
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "kqemu: interrupt v=%02x:\n",
- env->exception_index);
- cpu_dump_state(env, logfile, fprintf, 0);
- }
-#endif
+ LOG_INT("kqemu: interrupt v=%02x:\n", env->exception_index);
+ LOG_INT_STATE(env);
return 1;
} else if ((ret & 0xff00) == KQEMU_RET_EXCEPTION) {
env->exception_index = ret & 0xff;
@@ -900,23 +884,15 @@ int kqemu_cpu_exec(CPUState *env)
#ifdef CONFIG_PROFILER
kqemu_ret_excp_count++;
#endif
-#ifdef DEBUG
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "kqemu: exception v=%02x e=%04x:\n",
+ LOG_INT("kqemu: exception v=%02x e=%04x:\n",
env->exception_index, env->error_code);
- cpu_dump_state(env, logfile, fprintf, 0);
- }
-#endif
+ LOG_INT_STATE(env);
return 1;
} else if (ret == KQEMU_RET_INTR) {
#ifdef CONFIG_PROFILER
kqemu_ret_intr_count++;
#endif
-#ifdef DEBUG
- if (loglevel & CPU_LOG_INT) {
- cpu_dump_state(env, logfile, fprintf, 0);
- }
-#endif
+ LOG_INT_STATE(env);
return 0;
} else if (ret == KQEMU_RET_SOFTMMU) {
#ifdef CONFIG_PROFILER
@@ -925,11 +901,7 @@ int kqemu_cpu_exec(CPUState *env)
kqemu_record_pc(pc);
}
#endif
-#ifdef DEBUG
- if (loglevel & CPU_LOG_INT) {
- cpu_dump_state(env, logfile, fprintf, 0);
- }
-#endif
+ LOG_INT_STATE(env);
return 2;
} else {
cpu_dump_state(env, stderr, fprintf, 0);
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 34334045d..6de30f4bc 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -12,7 +12,7 @@
#include "qemu.h"
#include "disas.h"
-#ifdef __powerpc64__
+#ifdef _ARCH_PPC64
#undef ARCH_DLINFO
#undef ELF_PLATFORM
#undef ELF_HWCAP
@@ -1454,7 +1454,7 @@ int load_elf_binary(struct linux_binprm * bprm, struct target_pt_regs * regs,
free(elf_phdata);
- if (loglevel)
+ if (qemu_log_enabled())
load_symbols(&elf_ex, bprm->fd);
if (interpreter_type != INTERPRETER_AOUT) close(bprm->fd);
diff --git a/linux-user/main.c b/linux-user/main.c
index 7dcf0d7a0..d6dbce86d 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -1058,10 +1058,8 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
do { \
fprintf(stderr, fmt , ##args); \
cpu_dump_state(env, stderr, fprintf, 0); \
- if (loglevel != 0) { \
- fprintf(logfile, fmt , ##args); \
- cpu_dump_state(env, logfile, fprintf, 0); \
- } \
+ qemu_log(fmt, ##args); \
+ log_cpu_state(env, 0); \
} while (0)
void cpu_loop(CPUPPCState *env)
@@ -2397,21 +2395,19 @@ int main(int argc, char **argv, char **envp)
free(target_environ);
- if (loglevel) {
- page_dump(logfile);
-
- fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
- fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
- fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n",
- info->start_code);
- fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n",
- info->start_data);
- fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
- fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n",
- info->start_stack);
- fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
- fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
- }
+ log_page_dump();
+
+ qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
+ qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
+ qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
+ info->start_code);
+ qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
+ info->start_data);
+ qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
+ qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
+ info->start_stack);
+ qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
+ qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
target_set_brk(info->brk);
syscall_init();
@@ -2422,7 +2418,6 @@ int main(int argc, char **argv, char **envp)
init_task_state(ts);
ts->info = info;
env->opaque = ts;
- env->user_mode_only = 1;
#if defined(TARGET_I386)
cpu_x86_set_cpl(env, 3);
diff --git a/linux-user/signal.c b/linux-user/signal.c
index c3f738128..a468d7a83 100644
--- a/linux-user/signal.c
+++ b/linux-user/signal.c
@@ -28,6 +28,7 @@
#include <sys/ucontext.h>
#include "qemu.h"
+#include "qemu-common.h"
#include "target_signal.h"
//#define DEBUG_SIGNAL
@@ -348,7 +349,7 @@ static inline void free_sigqueue(CPUState *env, struct sigqueue *q)
}
/* abort execution with signal */
-static void __attribute((noreturn)) force_sig(int sig)
+static void noreturn force_sig(int sig)
{
int host_sig;
host_sig = target_to_host_signal(sig);
diff --git a/linux-user/vm86.c b/linux-user/vm86.c
index 80ee25b60..cc6c8c99d 100644
--- a/linux-user/vm86.c
+++ b/linux-user/vm86.c
@@ -29,6 +29,13 @@
//#define DEBUG_VM86
+#ifdef DEBUG_VM86
+# define LOG_VM86(...) qemu_log(__VA_ARGS__);
+#else
+# define LOG_VM86(...) do { } while (0)
+#endif
+
+
#define set_flags(X,new,mask) \
((X) = ((X) & ~(mask)) | ((new) & (mask)))
@@ -92,10 +99,8 @@ void save_v86_state(CPUX86State *env)
set_flags(env->eflags, ts->v86flags, VIF_MASK | ts->v86mask);
target_v86->regs.eflags = tswap32(env->eflags);
unlock_user_struct(target_v86, ts->target_v86, 1);
-#ifdef DEBUG_VM86
- fprintf(logfile, "save_v86_state: eflags=%08x cs:ip=%04x:%04x\n",
- env->eflags, env->segs[R_CS].selector, env->eip);
-#endif
+ LOG_VM86("save_v86_state: eflags=%08x cs:ip=%04x:%04x\n",
+ env->eflags, env->segs[R_CS].selector, env->eip);
/* restore 32 bit registers */
env->regs[R_EAX] = ts->vm86_saved_regs.eax;
@@ -121,9 +126,7 @@ void save_v86_state(CPUX86State *env)
'retval' */
static inline void return_to_32bit(CPUX86State *env, int retval)
{
-#ifdef DEBUG_VM86
- fprintf(logfile, "return_to_32bit: ret=0x%x\n", retval);
-#endif
+ LOG_VM86("return_to_32bit: ret=0x%x\n", retval);
save_v86_state(env);
env->regs[R_EAX] = retval;
}
@@ -216,10 +219,8 @@ static void do_int(CPUX86State *env, int intno)
segoffs = ldl(int_addr);
if ((segoffs >> 16) == TARGET_BIOSSEG)
goto cannot_handle;
-#if defined(DEBUG_VM86)
- fprintf(logfile, "VM86: emulating int 0x%x. CS:IP=%04x:%04x\n",
- intno, segoffs >> 16, segoffs & 0xffff);
-#endif
+ LOG_VM86("VM86: emulating int 0x%x. CS:IP=%04x:%04x\n",
+ intno, segoffs >> 16, segoffs & 0xffff);
/* save old state */
ssp = env->segs[R_SS].selector << 4;
sp = env->regs[R_ESP] & 0xffff;
@@ -235,9 +236,7 @@ static void do_int(CPUX86State *env, int intno)
clear_AC(env);
return;
cannot_handle:
-#if defined(DEBUG_VM86)
- fprintf(logfile, "VM86: return to 32 bits int 0x%x\n", intno);
-#endif
+ LOG_VM86("VM86: return to 32 bits int 0x%x\n", intno);
return_to_32bit(env, TARGET_VM86_INTx | (intno << 8));
}
@@ -274,10 +273,8 @@ void handle_vm86_fault(CPUX86State *env)
ssp = env->segs[R_SS].selector << 4;
sp = env->regs[R_ESP] & 0xffff;
-#if defined(DEBUG_VM86)
- fprintf(logfile, "VM86 exception %04x:%08x\n",
- env->segs[R_CS].selector, env->eip);
-#endif
+ LOG_VM86("VM86 exception %04x:%08x\n",
+ env->segs[R_CS].selector, env->eip);
data32 = 0;
pref_done = 0;
@@ -478,10 +475,8 @@ int do_vm86(CPUX86State *env, long subfunction, abi_ulong vm86_addr)
target_v86->vm86plus.vm86dbg_intxxtab, 32);
unlock_user_struct(target_v86, vm86_addr, 0);
-#ifdef DEBUG_VM86
- fprintf(logfile, "do_vm86: cs:ip=%04x:%04x\n",
- env->segs[R_CS].selector, env->eip);
-#endif
+ LOG_VM86("do_vm86: cs:ip=%04x:%04x\n",
+ env->segs[R_CS].selector, env->eip);
/* now the virtual CPU is ready for vm86 execution ! */
out:
return ret;
diff --git a/pc-bios/README b/pc-bios/README
index 1fabe0e84..8313638f7 100644
--- a/pc-bios/README
+++ b/pc-bios/README
@@ -42,7 +42,7 @@
firmware implementation. The goal is to implement a 100% IEEE
1275-1994 (referred to as Open Firmware) compliant firmware.
The included Sparc32 and Sparc64 images are built from SVN revision 395.
- The included PowerPC image is built from SVN revision 373.
+ The included PowerPC image is built from SVN revision 406.
- The PXE roms come from Rom-o-Matic etherboot 5.4.2.
pcnet32:pcnet32 -- [0x1022,0x2000]
diff --git a/pc-bios/openbios-ppc b/pc-bios/openbios-ppc
index e597269dd..53cf42ba0 100644
--- a/pc-bios/openbios-ppc
+++ b/pc-bios/openbios-ppc
Binary files differ
diff --git a/posix-aio-compat.c b/posix-aio-compat.c
index c919e3b22..ef76f74ac 100644
--- a/posix-aio-compat.c
+++ b/posix-aio-compat.c
@@ -94,9 +94,7 @@ static void *aio_thread(void *unused)
idle_threads++;
pthread_mutex_unlock(&lock);
- sigqueue(getpid(),
- aiocb->aio_sigevent.sigev_signo,
- aiocb->aio_sigevent.sigev_value);
+ kill(getpid(), aiocb->sigev_signo);
}
idle_threads--;
diff --git a/posix-aio-compat.h b/posix-aio-compat.h
index 5dddd711a..5eb17043e 100644
--- a/posix-aio-compat.h
+++ b/posix-aio-compat.h
@@ -29,7 +29,7 @@ struct qemu_paiocb
int aio_fildes;
void *aio_buf;
size_t aio_nbytes;
- struct sigevent aio_sigevent;
+ int sigev_signo;
off_t aio_offset;
/* private */
diff --git a/qemu-char.c b/qemu-char.c
index 27cdd325a..02d4049d0 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -2053,11 +2053,11 @@ static CharDriverState *qemu_chr_open_tcp(const char *host_str,
if (is_listen) {
chr->filename = qemu_malloc(256);
if (is_unix) {
- strcpy(chr->filename, "unix:");
+ pstrcpy(chr->filename, 256, "unix:");
} else if (is_telnet) {
- strcpy(chr->filename, "telnet:");
+ pstrcpy(chr->filename, 256, "telnet:");
} else {
- strcpy(chr->filename, "tcp:");
+ pstrcpy(chr->filename, 256, "tcp:");
}
offset = strlen(chr->filename);
}
@@ -2128,10 +2128,10 @@ CharDriverState *qemu_chr_open(const char *label, const char *filename)
CharDriverState *chr;
if (!strcmp(filename, "vc")) {
- chr = text_console_init(&display_state, 0);
+ chr = text_console_init(0);
} else
if (strstart(filename, "vc:", &p)) {
- chr = text_console_init(&display_state, p);
+ chr = text_console_init(p);
} else
if (!strcmp(filename, "null")) {
chr = qemu_chr_open_null();
diff --git a/qemu-common.h b/qemu-common.h
index 5f75b2e7a..d6756a3d0 100644
--- a/qemu-common.h
+++ b/qemu-common.h
@@ -2,6 +2,19 @@
#ifndef QEMU_COMMON_H
#define QEMU_COMMON_H
+#ifdef _WIN32
+#define WIN32_LEAN_AND_MEAN
+#define WINVER 0x0501 /* needed for ipv6 bits */
+#include <windows.h>
+#endif
+
+#define noreturn __attribute__ ((__noreturn__))
+
+/* Hack around the mess dyngen-exec.h causes: We need noreturn in files that
+ cannot include the following headers without conflicts. This condition has
+ to be removed once dyngen is gone. */
+#ifndef __DYNGEN_EXEC_H__
+
/* we put basic includes here to avoid repeating them in device drivers */
#include <stdlib.h>
#include <stdio.h>
@@ -40,9 +53,6 @@ struct iovec {
#endif
#ifdef _WIN32
-#define WIN32_LEAN_AND_MEAN
-#define WINVER 0x0501 /* needed for ipv6 bits */
-#include <windows.h>
#define fsync _commit
#define lseek _lseeki64
#define ENOTSUP 4096
@@ -136,9 +146,8 @@ void *get_mmap_addr(unsigned long size);
/* Error handling. */
-void hw_error(const char *fmt, ...)
- __attribute__ ((__format__ (__printf__, 1, 2)))
- __attribute__ ((__noreturn__));
+void noreturn hw_error(const char *fmt, ...)
+ __attribute__ ((__format__ (__printf__, 1, 2)));
/* IO callbacks. */
typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
@@ -159,6 +168,9 @@ typedef struct HCIInfo HCIInfo;
typedef struct AudioState AudioState;
typedef struct BlockDriverState BlockDriverState;
typedef struct DisplayState DisplayState;
+typedef struct DisplayChangeListener DisplayChangeListener;
+typedef struct DisplaySurface DisplaySurface;
+typedef struct PixelFormat PixelFormat;
typedef struct TextConsole TextConsole;
typedef TextConsole QEMUConsole;
typedef struct CharDriverState CharDriverState;
@@ -186,4 +198,6 @@ struct qemu_work_item {
int done;
};
+#endif /* dyngen-exec.h hack */
+
#endif
diff --git a/qemu-doc.texi b/qemu-doc.texi
index bd3a7f1f0..02298f7d3 100644
--- a/qemu-doc.texi
+++ b/qemu-doc.texi
@@ -428,6 +428,11 @@ Use it when installing Windows 2000 to avoid a disk full bug. After
Windows 2000 is installed, you no longer need this option (this option
slows down the IDE transfers).
+@item -rtc-td-hack
+Use it if you experience time drift problem in Windows with ACPI HAL.
+This option will try to figure out how many timer interrupts were not
+processed by the Windows guest and will re-inject them.
+
@item -option-rom @var{file}
Load the contents of @var{file} as an option ROM.
This option is useful to load things like EtherBoot.
diff --git a/qemu-img.c b/qemu-img.c
index 964b28bcd..555ab5fc4 100644
--- a/qemu-img.c
+++ b/qemu-img.c
@@ -34,7 +34,7 @@
/* Default to cache=writeback as data integrity is not important for qemu-tcg. */
#define BRDV_O_FLAGS BDRV_O_CACHE_WB
-static void __attribute__((noreturn)) error(const char *fmt, ...)
+static void noreturn error(const char *fmt, ...)
{
va_list ap;
va_start(ap, fmt);
@@ -751,8 +751,7 @@ static void img_snapshot(int argc, char **argv)
BlockDriverState *bs;
QEMUSnapshotInfo sn;
char *filename, *snapshot_name = NULL;
- char c;
- int ret;
+ int c, ret;
int action = 0;
qemu_timeval tv;
diff --git a/qemu-lock.h b/qemu-lock.h
index bee018a51..b912e79a5 100644
--- a/qemu-lock.h
+++ b/qemu-lock.h
@@ -58,7 +58,7 @@ static inline void resetlock (spinlock_t *p)
#endif
-#if defined(__powerpc__)
+#if defined(_ARCH_PPC)
static inline int testandset (int *p)
{
int ret;
diff --git a/qemu-log.h b/qemu-log.h
index 1ebea81c5..fccfb1100 100644
--- a/qemu-log.h
+++ b/qemu-log.h
@@ -1,7 +1,93 @@
#ifndef QEMU_LOG_H
#define QEMU_LOG_H
+/* The deprecated global variables: */
extern FILE *logfile;
extern int loglevel;
+
+/*
+ * The new API:
+ *
+ */
+
+/* Log settings checking macros: */
+
+/* Returns true if qemu_log() will really write somewhere
+ */
+#define qemu_log_enabled() (logfile != NULL)
+
+/* Returns true if a bit is set in the current loglevel mask
+ */
+#define qemu_loglevel_mask(b) ((loglevel & (b)) != 0)
+
+
+/* Logging functions: */
+
+/* main logging function
+ */
+#define qemu_log(...) do { \
+ if (logfile) \
+ fprintf(logfile, ## __VA_ARGS__); \
+ } while (0)
+
+/* vfprintf-like logging function
+ */
+#define qemu_log_vprintf(fmt, va) do { \
+ if (logfile) \
+ vfprintf(logfile, fmt, va); \
+ } while (0)
+
+/* log only if a bit is set on the current loglevel mask
+ */
+#define qemu_log_mask(b, ...) do { \
+ if (loglevel & (b)) \
+ fprintf(logfile, ## __VA_ARGS__); \
+ } while (0)
+
+
+
+
+/* Special cases: */
+
+/* cpu_dump_state() logging functions: */
+#define log_cpu_state(env, f) cpu_dump_state((env), logfile, fprintf, (f));
+#define log_cpu_state_mask(b, env, f) do { \
+ if (loglevel & (b)) log_cpu_state((env), (f)); \
+ } while (0)
+
+/* disas() and target_disas() to logfile: */
+#define log_target_disas(start, len, flags) \
+ target_disas(logfile, (start), (len), (flags))
+#define log_disas(start, len) \
+ disas(logfile, (start), (len))
+
+/* page_dump() output to the log file: */
+#define log_page_dump() page_dump(logfile)
+
+
+
+/* Maintenance: */
+
+/* fflush() the log file */
+#define qemu_log_flush() fflush(logfile)
+
+/* Close the log file */
+#define qemu_log_close() do { \
+ fclose(logfile); \
+ logfile = NULL; \
+ } while (0)
+
+/* Set up a new log file */
+#define qemu_log_set_file(f) do { \
+ logfile = (f); \
+ } while (0)
+
+/* Set up a new log file, only if none is set */
+#define qemu_log_try_set_file(f) do { \
+ if (!logfile) \
+ logfile = (f); \
+ } while (0)
+
+
#endif
diff --git a/qemu-sockets.c b/qemu-sockets.c
index 551ef73fe..4111f82b5 100644
--- a/qemu-sockets.c
+++ b/qemu-sockets.c
@@ -107,7 +107,7 @@ int inet_listen(const char *str, char *ostr, int olen,
/* parse address */
if (str[0] == ':') {
/* no host given */
- strcpy(addr,"");
+ addr[0] = '\0';
if (1 != sscanf(str,":%32[^,]%n",port,&pos)) {
fprintf(stderr, "%s: portonly parse error (%s)\n",
__FUNCTION__, str);
diff --git a/sdl.c b/sdl.c
index 15427c527..73396e86a 100644
--- a/sdl.c
+++ b/sdl.c
@@ -31,7 +31,9 @@
#include <signal.h>
#endif
-static SDL_Surface *screen;
+static DisplayChangeListener *dcl;
+static SDL_Surface *real_screen;
+static SDL_Surface *guest_screen = NULL;
static int gui_grab; /* if true, all keyboard/mouse events are grabbed */
static int last_vm_running;
static int gui_saved_grab;
@@ -52,11 +54,34 @@ static SDL_Cursor *guest_sprite = 0;
static void sdl_update(DisplayState *ds, int x, int y, int w, int h)
{
+ SDL_Rect rec;
+ rec.x = x;
+ rec.y = y;
+ rec.w = w;
+ rec.h = h;
// printf("updating x=%d y=%d w=%d h=%d\n", x, y, w, h);
- SDL_UpdateRect(screen, x, y, w, h);
+
+ SDL_BlitSurface(guest_screen, &rec, real_screen, &rec);
+ SDL_Flip(real_screen);
+}
+
+static void sdl_setdata(DisplayState *ds)
+{
+ SDL_Rect rec;
+ rec.x = 0;
+ rec.y = 0;
+ rec.w = real_screen->w;
+ rec.h = real_screen->h;
+
+ if (guest_screen != NULL) SDL_FreeSurface(guest_screen);
+
+ guest_screen = SDL_CreateRGBSurfaceFrom(ds_get_data(ds), ds_get_width(ds), ds_get_height(ds),
+ ds_get_bits_per_pixel(ds), ds_get_linesize(ds),
+ ds->surface->pf.rmask, ds->surface->pf.gmask,
+ ds->surface->pf.bmask, ds->surface->pf.amask);
}
-static void sdl_resize(DisplayState *ds, int w, int h)
+static void sdl_resize(DisplayState *ds)
{
int flags;
@@ -68,45 +93,23 @@ static void sdl_resize(DisplayState *ds, int w, int h)
if (gui_noframe)
flags |= SDL_NOFRAME;
- width = w;
- height = h;
-
again:
- screen = SDL_SetVideoMode(w, h, 0, flags);
- if (!screen) {
+ real_screen = SDL_SetVideoMode(ds_get_width(ds), ds_get_height(ds), 0, flags);
+ if (!real_screen) {
fprintf(stderr, "Could not open SDL display\n");
exit(1);
}
- if (!screen->pixels && (flags & SDL_HWSURFACE) && (flags & SDL_FULLSCREEN)) {
+ if (!real_screen->pixels && (flags & SDL_HWSURFACE) && (flags & SDL_FULLSCREEN)) {
flags &= ~SDL_HWSURFACE;
goto again;
}
- if (!screen->pixels) {
+ if (!real_screen->pixels) {
fprintf(stderr, "Could not open SDL display\n");
exit(1);
}
- ds->data = screen->pixels;
- ds->linesize = screen->pitch;
- ds->depth = screen->format->BitsPerPixel;
- /* SDL BitsPerPixel never indicates any values other than
- multiples of 8, so we need to check for strange depths. */
- if (ds->depth == 16) {
- uint32_t mask;
-
- mask = screen->format->Rmask;
- mask |= screen->format->Gmask;
- mask |= screen->format->Bmask;
- if ((mask & 0x8000) == 0)
- ds->depth = 15;
- }
- if (ds->depth == 32 && screen->format->Rshift == 0) {
- ds->bgr = 1;
- } else {
- ds->bgr = 0;
- }
- ds->width = w;
- ds->height = h;
+
+ sdl_setdata(ds);
}
/* generic keyboard conversion */
@@ -286,9 +289,12 @@ static void sdl_grab_start(void)
SDL_WarpMouse(guest_x, guest_y);
} else
sdl_hide_cursor();
- SDL_WM_GrabInput(SDL_GRAB_ON);
- gui_grab = 1;
- sdl_update_caption();
+
+ if (SDL_WM_GrabInput(SDL_GRAB_ON) == SDL_GRAB_ON) {
+ gui_grab = 1;
+ sdl_update_caption();
+ } else
+ sdl_show_cursor();
}
static void sdl_grab_end(void)
@@ -339,7 +345,7 @@ static void sdl_send_mouse_event(int dx, int dy, int dz, int x, int y, int state
static void toggle_full_screen(DisplayState *ds)
{
gui_fullscreen = !gui_fullscreen;
- sdl_resize(ds, screen->w, screen->h);
+ sdl_resize(ds);
if (gui_fullscreen) {
gui_saved_grab = gui_grab;
sdl_grab_start();
@@ -368,7 +374,7 @@ static void sdl_refresh(DisplayState *ds)
while (SDL_PollEvent(ev)) {
switch (ev->type) {
case SDL_VIDEOEXPOSE:
- sdl_update(ds, 0, 0, screen->w, screen->h);
+ sdl_update(ds, 0, 0, real_screen->w, real_screen->h);
break;
case SDL_KEYDOWN:
case SDL_KEYUP:
@@ -523,12 +529,12 @@ static void sdl_refresh(DisplayState *ds)
if (ev->active.state & SDL_APPACTIVE) {
if (ev->active.gain) {
/* Back to default interval */
- ds->gui_timer_interval = 0;
- ds->idle = 0;
+ dcl->gui_timer_interval = 0;
+ dcl->idle = 0;
} else {
/* Sleeping interval */
- ds->gui_timer_interval = 500;
- ds->idle = 1;
+ dcl->gui_timer_interval = 500;
+ dcl->idle = 1;
}
}
break;
@@ -541,7 +547,7 @@ static void sdl_refresh(DisplayState *ds)
static void sdl_fill(DisplayState *ds, int x, int y, int w, int h, uint32_t c)
{
SDL_Rect dst = { x, y, w, h };
- SDL_FillRect(screen, &dst, c);
+ SDL_FillRect(real_screen, &dst, c);
}
static void sdl_mouse_warp(int x, int y, int on)
@@ -637,14 +643,18 @@ void sdl_display_init(DisplayState *ds, int full_screen, int no_frame)
exit(1);
}
- ds->dpy_update = sdl_update;
- ds->dpy_resize = sdl_resize;
- ds->dpy_refresh = sdl_refresh;
- ds->dpy_fill = sdl_fill;
+ dcl = qemu_mallocz(sizeof(DisplayChangeListener));
+ if (!dcl)
+ exit(1);
+ dcl->dpy_update = sdl_update;
+ dcl->dpy_resize = sdl_resize;
+ dcl->dpy_refresh = sdl_refresh;
+ dcl->dpy_setdata = sdl_setdata;
+ dcl->dpy_fill = sdl_fill;
ds->mouse_set = sdl_mouse_warp;
ds->cursor_define = sdl_mouse_define;
+ register_displaychangelistener(ds, dcl);
- sdl_resize(ds, 640, 400);
sdl_update_caption();
SDL_EnableKeyRepeat(250, 50);
gui_grab = 0;
diff --git a/slirp/slirp.h b/slirp/slirp.h
index d57fb1236..6f8a7f602 100644
--- a/slirp/slirp.h
+++ b/slirp/slirp.h
@@ -120,13 +120,12 @@ typedef unsigned char u_int8_t;
#include <sys/uio.h>
#endif
-#ifndef _P
+#undef _P
#ifndef NO_PROTOTYPES
# define _P(x) x
#else
# define _P(x) ()
#endif
-#endif
#ifndef _WIN32
#include <netinet/in.h>
diff --git a/sparc-dis.c b/sparc-dis.c
index ae633f2cf..f88efe66c 100644
--- a/sparc-dis.c
+++ b/sparc-dis.c
@@ -224,7 +224,6 @@ typedef struct sparc_opcode
#define RS2_G0 RS2 (~0)
static const struct sparc_opcode sparc_opcodes[];
-static const int sparc_num_opcodes;
static const char *sparc_decode_asi_v8 (int);
static const char *sparc_decode_asi_v9 (int);
diff --git a/sysemu.h b/sysemu.h
index 027b8e752..c8f268ee1 100644
--- a/sysemu.h
+++ b/sysemu.h
@@ -86,6 +86,7 @@ void do_info_slirp(void);
extern int bios_size;
extern int cirrus_vga_enabled;
+extern int std_vga_enabled;
extern int vmsvga_enabled;
extern int graphic_width;
extern int graphic_height;
@@ -93,6 +94,7 @@ extern int graphic_depth;
extern int nographic;
extern const char *keyboard_layout;
extern int win2k_install_hack;
+extern int rtc_td_hack;
extern int alt_grab;
extern int usb_enabled;
extern int smp_cpus;
@@ -103,7 +105,6 @@ extern int semihosting_enabled;
extern int old_param;
extern int hpagesize;
extern const char *bootp_filename;
-extern DisplayState display_state;
#ifdef USE_KQEMU
extern int kqemu_allowed;
@@ -193,6 +194,12 @@ extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
+/* virtio consoles */
+
+#define MAX_VIRTIO_CONSOLES 1
+
+extern CharDriverState *virtcon_hds[MAX_VIRTIO_CONSOLES];
+
#define TFR(expr) do { if ((expr) != -1) break; } while (errno == EINTR)
#ifdef NEED_CPU_H
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 2524662d2..3affb2198 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -37,6 +37,13 @@
#define ALPHA_DEBUG_DISAS
/* #define DO_TB_FLUSH */
+
+#ifdef ALPHA_DEBUG_DISAS
+# define LOG_DISAS(...) qemu_log(__VA_ARGS__)
+#else
+# define LOG_DISAS(...) do { } while (0)
+#endif
+
typedef struct DisasContext DisasContext;
struct DisasContext {
uint64_t pc;
@@ -671,12 +678,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn)
fn7 = (insn >> 5) & 0x0000007F;
fn2 = (insn >> 5) & 0x00000003;
ret = 0;
-#if defined ALPHA_DEBUG_DISAS
- if (logfile != NULL) {
- fprintf(logfile, "opc %02x ra %d rb %d rc %d disp16 %04x\n",
- opc, ra, rb, rc, disp16);
- }
-#endif
+ LOG_DISAS("opc %02x ra %d rb %d rc %d disp16 %04x\n",
+ opc, ra, rb, rc, disp16);
switch (opc) {
case 0x00:
/* CALL_PAL */
@@ -2386,17 +2389,13 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
gen_io_start();
#if defined ALPHA_DEBUG_DISAS
insn_count++;
- if (logfile != NULL) {
- fprintf(logfile, "pc " TARGET_FMT_lx " mem_idx %d\n",
- ctx.pc, ctx.mem_idx);
- }
+ LOG_DISAS("pc " TARGET_FMT_lx " mem_idx %d\n",
+ ctx.pc, ctx.mem_idx);
#endif
insn = ldl_code(ctx.pc);
#if defined ALPHA_DEBUG_DISAS
insn_count++;
- if (logfile != NULL) {
- fprintf(logfile, "opcode %08x %d\n", insn, insn_count);
- }
+ LOG_DISAS("opcode %08x %d\n", insn, insn_count);
#endif
num_insns++;
ctx.pc += 4;
@@ -2442,13 +2441,11 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
tb->icount = num_insns;
}
#if defined ALPHA_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_CPU) {
- cpu_dump_state(env, logfile, fprintf, 0);
- }
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
- target_disas(logfile, pc_start, ctx.pc - pc_start, 1);
- fprintf(logfile, "\n");
+ log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0);
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ qemu_log("IN: %s\n", lookup_symbol(pc_start));
+ log_target_disas(pc_start, ctx.pc - pc_start, 1);
+ qemu_log("\n");
}
#endif
}
diff --git a/target-arm/translate.c b/target-arm/translate.c
index c36a91f72..3cef02115 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -8870,11 +8870,11 @@ done_generating:
*gen_opc_ptr = INDEX_op_end;
#ifdef DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "----------------\n");
- fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
- target_disas(logfile, pc_start, dc->pc - pc_start, env->thumb);
- fprintf(logfile, "\n");
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ qemu_log("----------------\n");
+ qemu_log("IN: %s\n", lookup_symbol(pc_start));
+ log_target_disas(pc_start, dc->pc - pc_start, env->thumb);
+ qemu_log("\n");
}
#endif
if (search_pc) {
diff --git a/target-cris/helper.c b/target-cris/helper.c
index 6bd7aaf02..ae2f8dddb 100644
--- a/target-cris/helper.c
+++ b/target-cris/helper.c
@@ -28,7 +28,17 @@
#include "exec-all.h"
#include "host-utils.h"
+
+//#define CRIS_HELPER_DEBUG
+
+
+#ifdef CRIS_HELPER_DEBUG
+#define D(x) x
+#define D_LOG(...) qemu_log(__VA__ARGS__)
+#else
#define D(x)
+#define D_LOG(...) do { } while (0)
+#endif
#if defined(CONFIG_USER_ONLY)
@@ -98,10 +108,10 @@ int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
r = tlb_set_page(env, address, phy, prot, mmu_idx, is_softmmu);
}
if (r > 0)
- D(fprintf(logfile, "%s returns %d irqreq=%x addr=%x"
+ D_LOG("%s returns %d irqreq=%x addr=%x"
" phy=%x ismmu=%d vec=%x pc=%x\n",
__func__, r, env->interrupt_request,
- address, res.phy, is_softmmu, res.bf_vec, env->pc));
+ address, res.phy, is_softmmu, res.bf_vec, env->pc);
return r;
}
@@ -109,9 +119,9 @@ void do_interrupt(CPUState *env)
{
int ex_vec = -1;
- D(fprintf (logfile, "exception index=%d interrupt_req=%d\n",
+ D_LOG( "exception index=%d interrupt_req=%d\n",
env->exception_index,
- env->interrupt_request));
+ env->interrupt_request);
switch (env->exception_index)
{
@@ -147,13 +157,13 @@ void do_interrupt(CPUState *env)
env->pregs[PR_EXS] = (ex_vec & 0xff) << 8;
if (env->dslot) {
- D(fprintf(logfile, "excp isr=%x PC=%x ds=%d SP=%x"
+ D_LOG("excp isr=%x PC=%x ds=%d SP=%x"
" ERP=%x pid=%x ccs=%x cc=%d %x\n",
ex_vec, env->pc, env->dslot,
env->regs[R_SP],
env->pregs[PR_ERP], env->pregs[PR_PID],
env->pregs[PR_CCS],
- env->cc_op, env->cc_mask));
+ env->cc_op, env->cc_mask);
/* We loose the btarget, btaken state here so rexec the
branch. */
env->pregs[PR_ERP] -= env->dslot;
@@ -171,11 +181,11 @@ void do_interrupt(CPUState *env)
/* Apply the CRIS CCS shift. Clears U if set. */
cris_shift_ccs(env);
- D(fprintf (logfile, "%s isr=%x vec=%x ccs=%x pid=%d erp=%x\n",
+ D_LOG("%s isr=%x vec=%x ccs=%x pid=%d erp=%x\n",
__func__, env->pc, ex_vec,
env->pregs[PR_CCS],
env->pregs[PR_PID],
- env->pregs[PR_ERP]));
+ env->pregs[PR_ERP]);
}
target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
diff --git a/target-cris/mmu.c b/target-cris/mmu.c
index 334b2b600..9d7981663 100644
--- a/target-cris/mmu.c
+++ b/target-cris/mmu.c
@@ -32,8 +32,10 @@
#ifdef DEBUG
#define D(x) x
+#define D_LOG(...) qemu_log(__VA__ARGS__)
#else
#define D(x)
+#define D_LOG(...) do { } while (0)
#endif
void cris_mmu_init(CPUState *env)
@@ -180,9 +182,8 @@ static int cris_mmu_translate_page(struct cris_mmu_result_t *res,
tlb_pid = EXTRACT_FIELD(hi, 0, 7);
tlb_g = EXTRACT_FIELD(lo, 4, 4);
- D(fprintf(logfile,
- "TLB[%d][%d][%d] v=%x vpage=%x lo=%x hi=%x\n",
- mmu, set, idx, tlb_vpn, vpage, lo, hi));
+ D_LOG("TLB[%d][%d][%d] v=%x vpage=%x lo=%x hi=%x\n",
+ mmu, set, idx, tlb_vpn, vpage, lo, hi);
if ((tlb_g || (tlb_pid == pid))
&& tlb_vpn == vpage) {
match = 1;
@@ -314,9 +315,8 @@ void cris_mmu_flush_pid(CPUState *env, uint32_t pid)
if (tlb_v && !tlb_g && (tlb_pid == pid)) {
vaddr = tlb_vpn << TARGET_PAGE_BITS;
- D(fprintf(logfile,
- "flush pid=%x vaddr=%x\n",
- pid, vaddr));
+ D_LOG("flush pid=%x vaddr=%x\n",
+ pid, vaddr);
tlb_flush_page(env, vaddr);
}
}
diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c
index c96e48d83..2e280f3b6 100644
--- a/target-cris/op_helper.c
+++ b/target-cris/op_helper.c
@@ -25,7 +25,16 @@
#include "helper.h"
#include "host-utils.h"
+//#define CRIS_OP_HELPER_DEBUG
+
+
+#ifdef CRIS_OP_HELPER_DEBUG
+#define D(x) x
+#define D_LOG(...) qemu_log(__VA__ARGS__)
+#else
#define D(x)
+#define D_LOG(...) do { } while (0)
+#endif
#if !defined(CONFIG_USER_ONLY)
@@ -59,8 +68,8 @@ void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
saved_env = env;
env = cpu_single_env;
- D(fprintf(logfile, "%s pc=%x tpc=%x ra=%x\n", __func__,
- env->pc, env->debug1, retaddr));
+ D_LOG("%s pc=%x tpc=%x ra=%x\n", __func__,
+ env->pc, env->debug1, retaddr);
ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
if (unlikely(ret)) {
if (retaddr) {
@@ -108,7 +117,7 @@ void helper_spc_write(uint32_t new_spc)
void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
{
- (fprintf(logfile, "%s: a0=%x a1=%x\n", __func__, a0, a1));
+ qemu_log("%s: a0=%x a1=%x\n", __func__, a0, a1);
}
/* Used by the tlb decoder. */
@@ -155,9 +164,8 @@ void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg)
env->tlbsets[srs - 1][set][idx].lo = lo;
env->tlbsets[srs - 1][set][idx].hi = hi;
- D(fprintf(logfile,
- "tlb flush vaddr=%x v=%d pc=%x\n",
- vaddr, tlb_v, env->pc));
+ D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
+ vaddr, tlb_v, env->pc);
tlb_flush_page(env, vaddr);
}
}
@@ -213,10 +221,10 @@ void helper_rfe(void)
{
int rflag = env->pregs[PR_CCS] & R_FLAG;
- D(fprintf(logfile, "rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
+ D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
env->pregs[PR_ERP], env->pregs[PR_PID],
env->pregs[PR_CCS],
- env->btarget));
+ env->btarget);
cris_ccs_rshift(env);
@@ -229,10 +237,10 @@ void helper_rfn(void)
{
int rflag = env->pregs[PR_CCS] & R_FLAG;
- D(fprintf(logfile, "rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
+ D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
env->pregs[PR_ERP], env->pregs[PR_PID],
env->pregs[PR_CCS],
- env->btarget));
+ env->btarget);
cris_ccs_rshift(env);
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 03ac7ea74..2ff6fe2d3 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -44,9 +44,9 @@
#define DISAS_CRIS 0
#if DISAS_CRIS
-#define DIS(x) if (loglevel & CPU_LOG_TB_IN_ASM) x
+# define LOG_DIS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__)
#else
-#define DIS(x)
+# define LOG_DIS(...) do { } while (0)
#endif
#define D(x)
@@ -128,7 +128,7 @@ typedef struct DisasContext {
static void gen_BUG(DisasContext *dc, const char *file, int line)
{
printf ("BUG: pc=%x %s %d\n", dc->pc, file, line);
- fprintf (logfile, "BUG: pc=%x %s %d\n", dc->pc, file, line);
+ qemu_log("BUG: pc=%x %s %d\n", dc->pc, file, line);
cpu_abort(dc->env, "%s:%d\n", file, line);
}
@@ -795,7 +795,7 @@ static void cris_alu_op_exec(DisasContext *dc, int op,
t_gen_subx_carry(dc, dst);
break;
default:
- fprintf (logfile, "illegal ALU op.\n");
+ qemu_log("illegal ALU op.\n");
BUG();
break;
}
@@ -1344,7 +1344,7 @@ static unsigned int dec_bccq(DisasContext *dc)
tmp = offset;
offset = sign_extend(offset, 8);
- DIS(fprintf (logfile, "b%s %x\n", cc_name(cond), dc->pc + offset));
+ LOG_DIS("b%s %x\n", cc_name(cond), dc->pc + offset);
/* op2 holds the condition-code. */
cris_cc_mask(dc, 0);
@@ -1358,7 +1358,7 @@ static unsigned int dec_addoq(DisasContext *dc)
dc->op1 = EXTRACT_FIELD(dc->ir, 0, 7);
imm = sign_extend(dc->op1, 7);
- DIS(fprintf (logfile, "addoq %d, $r%u\n", imm, dc->op2));
+ LOG_DIS("addoq %d, $r%u\n", imm, dc->op2);
cris_cc_mask(dc, 0);
/* Fetch register operand, */
tcg_gen_addi_tl(cpu_R[R_ACR], cpu_R[dc->op2], imm);
@@ -1367,7 +1367,7 @@ static unsigned int dec_addoq(DisasContext *dc)
}
static unsigned int dec_addq(DisasContext *dc)
{
- DIS(fprintf (logfile, "addq %u, $r%u\n", dc->op1, dc->op2));
+ LOG_DIS("addq %u, $r%u\n", dc->op1, dc->op2);
dc->op1 = EXTRACT_FIELD(dc->ir, 0, 5);
@@ -1383,7 +1383,7 @@ static unsigned int dec_moveq(DisasContext *dc)
dc->op1 = EXTRACT_FIELD(dc->ir, 0, 5);
imm = sign_extend(dc->op1, 5);
- DIS(fprintf (logfile, "moveq %d, $r%u\n", imm, dc->op2));
+ LOG_DIS("moveq %d, $r%u\n", imm, dc->op2);
tcg_gen_mov_tl(cpu_R[dc->op2], tcg_const_tl(imm));
return 2;
@@ -1392,7 +1392,7 @@ static unsigned int dec_subq(DisasContext *dc)
{
dc->op1 = EXTRACT_FIELD(dc->ir, 0, 5);
- DIS(fprintf (logfile, "subq %u, $r%u\n", dc->op1, dc->op2));
+ LOG_DIS("subq %u, $r%u\n", dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZVC);
cris_alu(dc, CC_OP_SUB,
@@ -1405,7 +1405,7 @@ static unsigned int dec_cmpq(DisasContext *dc)
dc->op1 = EXTRACT_FIELD(dc->ir, 0, 5);
imm = sign_extend(dc->op1, 5);
- DIS(fprintf (logfile, "cmpq %d, $r%d\n", imm, dc->op2));
+ LOG_DIS("cmpq %d, $r%d\n", imm, dc->op2);
cris_cc_mask(dc, CC_MASK_NZVC);
cris_alu(dc, CC_OP_CMP,
@@ -1418,7 +1418,7 @@ static unsigned int dec_andq(DisasContext *dc)
dc->op1 = EXTRACT_FIELD(dc->ir, 0, 5);
imm = sign_extend(dc->op1, 5);
- DIS(fprintf (logfile, "andq %d, $r%d\n", imm, dc->op2));
+ LOG_DIS("andq %d, $r%d\n", imm, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
cris_alu(dc, CC_OP_AND,
@@ -1430,7 +1430,7 @@ static unsigned int dec_orq(DisasContext *dc)
uint32_t imm;
dc->op1 = EXTRACT_FIELD(dc->ir, 0, 5);
imm = sign_extend(dc->op1, 5);
- DIS(fprintf (logfile, "orq %d, $r%d\n", imm, dc->op2));
+ LOG_DIS("orq %d, $r%d\n", imm, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
cris_alu(dc, CC_OP_OR,
@@ -1440,7 +1440,7 @@ static unsigned int dec_orq(DisasContext *dc)
static unsigned int dec_btstq(DisasContext *dc)
{
dc->op1 = EXTRACT_FIELD(dc->ir, 0, 4);
- DIS(fprintf (logfile, "btstq %u, $r%d\n", dc->op1, dc->op2));
+ LOG_DIS("btstq %u, $r%d\n", dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
cris_evaluate_flags(dc);
@@ -1455,7 +1455,7 @@ static unsigned int dec_btstq(DisasContext *dc)
static unsigned int dec_asrq(DisasContext *dc)
{
dc->op1 = EXTRACT_FIELD(dc->ir, 0, 4);
- DIS(fprintf (logfile, "asrq %u, $r%d\n", dc->op1, dc->op2));
+ LOG_DIS("asrq %u, $r%d\n", dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
tcg_gen_sari_tl(cpu_R[dc->op2], cpu_R[dc->op2], dc->op1);
@@ -1467,7 +1467,7 @@ static unsigned int dec_asrq(DisasContext *dc)
static unsigned int dec_lslq(DisasContext *dc)
{
dc->op1 = EXTRACT_FIELD(dc->ir, 0, 4);
- DIS(fprintf (logfile, "lslq %u, $r%d\n", dc->op1, dc->op2));
+ LOG_DIS("lslq %u, $r%d\n", dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
@@ -1481,7 +1481,7 @@ static unsigned int dec_lslq(DisasContext *dc)
static unsigned int dec_lsrq(DisasContext *dc)
{
dc->op1 = EXTRACT_FIELD(dc->ir, 0, 4);
- DIS(fprintf (logfile, "lsrq %u, $r%d\n", dc->op1, dc->op2));
+ LOG_DIS("lsrq %u, $r%d\n", dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
@@ -1496,8 +1496,8 @@ static unsigned int dec_move_r(DisasContext *dc)
{
int size = memsize_zz(dc);
- DIS(fprintf (logfile, "move.%c $r%u, $r%u\n",
- memsize_char(size), dc->op1, dc->op2));
+ LOG_DIS("move.%c $r%u, $r%u\n",
+ memsize_char(size), dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
if (size == 4) {
@@ -1524,8 +1524,8 @@ static unsigned int dec_scc_r(DisasContext *dc)
{
int cond = dc->op2;
- DIS(fprintf (logfile, "s%s $r%u\n",
- cc_name(cond), dc->op1));
+ LOG_DIS("s%s $r%u\n",
+ cc_name(cond), dc->op1);
if (cond != CC_A)
{
@@ -1568,8 +1568,8 @@ static unsigned int dec_and_r(DisasContext *dc)
TCGv t[2];
int size = memsize_zz(dc);
- DIS(fprintf (logfile, "and.%c $r%u, $r%u\n",
- memsize_char(size), dc->op1, dc->op2));
+ LOG_DIS("and.%c $r%u, $r%u\n",
+ memsize_char(size), dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
@@ -1583,8 +1583,8 @@ static unsigned int dec_and_r(DisasContext *dc)
static unsigned int dec_lz_r(DisasContext *dc)
{
TCGv t0;
- DIS(fprintf (logfile, "lz $r%u, $r%u\n",
- dc->op1, dc->op2));
+ LOG_DIS("lz $r%u, $r%u\n",
+ dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
t0 = tcg_temp_new();
dec_prep_alu_r(dc, dc->op1, dc->op2, 4, 0, cpu_R[dc->op2], t0);
@@ -1598,8 +1598,8 @@ static unsigned int dec_lsl_r(DisasContext *dc)
TCGv t[2];
int size = memsize_zz(dc);
- DIS(fprintf (logfile, "lsl.%c $r%u, $r%u\n",
- memsize_char(size), dc->op1, dc->op2));
+ LOG_DIS("lsl.%c $r%u, $r%u\n",
+ memsize_char(size), dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
cris_alu_alloc_temps(dc, size, t);
@@ -1615,8 +1615,8 @@ static unsigned int dec_lsr_r(DisasContext *dc)
TCGv t[2];
int size = memsize_zz(dc);
- DIS(fprintf (logfile, "lsr.%c $r%u, $r%u\n",
- memsize_char(size), dc->op1, dc->op2));
+ LOG_DIS("lsr.%c $r%u, $r%u\n",
+ memsize_char(size), dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
cris_alu_alloc_temps(dc, size, t);
@@ -1632,8 +1632,8 @@ static unsigned int dec_asr_r(DisasContext *dc)
TCGv t[2];
int size = memsize_zz(dc);
- DIS(fprintf (logfile, "asr.%c $r%u, $r%u\n",
- memsize_char(size), dc->op1, dc->op2));
+ LOG_DIS("asr.%c $r%u, $r%u\n",
+ memsize_char(size), dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
cris_alu_alloc_temps(dc, size, t);
@@ -1649,8 +1649,8 @@ static unsigned int dec_muls_r(DisasContext *dc)
TCGv t[2];
int size = memsize_zz(dc);
- DIS(fprintf (logfile, "muls.%c $r%u, $r%u\n",
- memsize_char(size), dc->op1, dc->op2));
+ LOG_DIS("muls.%c $r%u, $r%u\n",
+ memsize_char(size), dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZV);
cris_alu_alloc_temps(dc, size, t);
dec_prep_alu_r(dc, dc->op1, dc->op2, size, 1, t[0], t[1]);
@@ -1665,8 +1665,8 @@ static unsigned int dec_mulu_r(DisasContext *dc)
TCGv t[2];
int size = memsize_zz(dc);
- DIS(fprintf (logfile, "mulu.%c $r%u, $r%u\n",
- memsize_char(size), dc->op1, dc->op2));
+ LOG_DIS("mulu.%c $r%u, $r%u\n",
+ memsize_char(size), dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZV);
cris_alu_alloc_temps(dc, size, t);
dec_prep_alu_r(dc, dc->op1, dc->op2, size, 0, t[0], t[1]);
@@ -1679,7 +1679,7 @@ static unsigned int dec_mulu_r(DisasContext *dc)
static unsigned int dec_dstep_r(DisasContext *dc)
{
- DIS(fprintf (logfile, "dstep $r%u, $r%u\n", dc->op1, dc->op2));
+ LOG_DIS("dstep $r%u, $r%u\n", dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
cris_alu(dc, CC_OP_DSTEP,
cpu_R[dc->op2], cpu_R[dc->op2], cpu_R[dc->op1], 4);
@@ -1690,8 +1690,8 @@ static unsigned int dec_xor_r(DisasContext *dc)
{
TCGv t[2];
int size = memsize_zz(dc);
- DIS(fprintf (logfile, "xor.%c $r%u, $r%u\n",
- memsize_char(size), dc->op1, dc->op2));
+ LOG_DIS("xor.%c $r%u, $r%u\n",
+ memsize_char(size), dc->op1, dc->op2);
BUG_ON(size != 4); /* xor is dword. */
cris_cc_mask(dc, CC_MASK_NZ);
cris_alu_alloc_temps(dc, size, t);
@@ -1706,8 +1706,8 @@ static unsigned int dec_bound_r(DisasContext *dc)
{
TCGv l0;
int size = memsize_zz(dc);
- DIS(fprintf (logfile, "bound.%c $r%u, $r%u\n",
- memsize_char(size), dc->op1, dc->op2));
+ LOG_DIS("bound.%c $r%u, $r%u\n",
+ memsize_char(size), dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
l0 = tcg_temp_local_new();
dec_prep_move_r(dc, dc->op1, dc->op2, size, 0, l0);
@@ -1720,8 +1720,8 @@ static unsigned int dec_cmp_r(DisasContext *dc)
{
TCGv t[2];
int size = memsize_zz(dc);
- DIS(fprintf (logfile, "cmp.%c $r%u, $r%u\n",
- memsize_char(size), dc->op1, dc->op2));
+ LOG_DIS("cmp.%c $r%u, $r%u\n",
+ memsize_char(size), dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZVC);
cris_alu_alloc_temps(dc, size, t);
dec_prep_alu_r(dc, dc->op1, dc->op2, size, 0, t[0], t[1]);
@@ -1735,8 +1735,8 @@ static unsigned int dec_abs_r(DisasContext *dc)
{
TCGv t0;
- DIS(fprintf (logfile, "abs $r%u, $r%u\n",
- dc->op1, dc->op2));
+ LOG_DIS("abs $r%u, $r%u\n",
+ dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
t0 = tcg_temp_new();
@@ -1754,8 +1754,8 @@ static unsigned int dec_add_r(DisasContext *dc)
{
TCGv t[2];
int size = memsize_zz(dc);
- DIS(fprintf (logfile, "add.%c $r%u, $r%u\n",
- memsize_char(size), dc->op1, dc->op2));
+ LOG_DIS("add.%c $r%u, $r%u\n",
+ memsize_char(size), dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZVC);
cris_alu_alloc_temps(dc, size, t);
dec_prep_alu_r(dc, dc->op1, dc->op2, size, 0, t[0], t[1]);
@@ -1767,8 +1767,8 @@ static unsigned int dec_add_r(DisasContext *dc)
static unsigned int dec_addc_r(DisasContext *dc)
{
- DIS(fprintf (logfile, "addc $r%u, $r%u\n",
- dc->op1, dc->op2));
+ LOG_DIS("addc $r%u, $r%u\n",
+ dc->op1, dc->op2);
cris_evaluate_flags(dc);
/* Set for this insn. */
dc->flagx_known = 1;
@@ -1782,8 +1782,8 @@ static unsigned int dec_addc_r(DisasContext *dc)
static unsigned int dec_mcp_r(DisasContext *dc)
{
- DIS(fprintf (logfile, "mcp $p%u, $r%u\n",
- dc->op2, dc->op1));
+ LOG_DIS("mcp $p%u, $r%u\n",
+ dc->op2, dc->op1);
cris_evaluate_flags(dc);
cris_cc_mask(dc, CC_MASK_RNZV);
cris_alu(dc, CC_OP_MCP,
@@ -1813,8 +1813,8 @@ static unsigned int dec_swap_r(DisasContext *dc)
#if DISAS_CRIS
char modename[4];
#endif
- DIS(fprintf (logfile, "swap%s $r%u\n",
- swapmode_name(dc->op2, modename), dc->op1));
+ LOG_DIS("swap%s $r%u\n",
+ swapmode_name(dc->op2, modename), dc->op1);
cris_cc_mask(dc, CC_MASK_NZ);
t0 = tcg_temp_new();
@@ -1837,8 +1837,8 @@ static unsigned int dec_or_r(DisasContext *dc)
{
TCGv t[2];
int size = memsize_zz(dc);
- DIS(fprintf (logfile, "or.%c $r%u, $r%u\n",
- memsize_char(size), dc->op1, dc->op2));
+ LOG_DIS("or.%c $r%u, $r%u\n",
+ memsize_char(size), dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
cris_alu_alloc_temps(dc, size, t);
dec_prep_alu_r(dc, dc->op1, dc->op2, size, 0, t[0], t[1]);
@@ -1850,8 +1850,8 @@ static unsigned int dec_or_r(DisasContext *dc)
static unsigned int dec_addi_r(DisasContext *dc)
{
TCGv t0;
- DIS(fprintf (logfile, "addi.%c $r%u, $r%u\n",
- memsize_char(memsize_zz(dc)), dc->op2, dc->op1));
+ LOG_DIS("addi.%c $r%u, $r%u\n",
+ memsize_char(memsize_zz(dc)), dc->op2, dc->op1);
cris_cc_mask(dc, 0);
t0 = tcg_temp_new();
tcg_gen_shl_tl(t0, cpu_R[dc->op2], tcg_const_tl(dc->zzsize));
@@ -1863,8 +1863,8 @@ static unsigned int dec_addi_r(DisasContext *dc)
static unsigned int dec_addi_acr(DisasContext *dc)
{
TCGv t0;
- DIS(fprintf (logfile, "addi.%c $r%u, $r%u, $acr\n",
- memsize_char(memsize_zz(dc)), dc->op2, dc->op1));
+ LOG_DIS("addi.%c $r%u, $r%u, $acr\n",
+ memsize_char(memsize_zz(dc)), dc->op2, dc->op1);
cris_cc_mask(dc, 0);
t0 = tcg_temp_new();
tcg_gen_shl_tl(t0, cpu_R[dc->op2], tcg_const_tl(dc->zzsize));
@@ -1877,8 +1877,8 @@ static unsigned int dec_neg_r(DisasContext *dc)
{
TCGv t[2];
int size = memsize_zz(dc);
- DIS(fprintf (logfile, "neg.%c $r%u, $r%u\n",
- memsize_char(size), dc->op1, dc->op2));
+ LOG_DIS("neg.%c $r%u, $r%u\n",
+ memsize_char(size), dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZVC);
cris_alu_alloc_temps(dc, size, t);
dec_prep_alu_r(dc, dc->op1, dc->op2, size, 0, t[0], t[1]);
@@ -1890,8 +1890,8 @@ static unsigned int dec_neg_r(DisasContext *dc)
static unsigned int dec_btst_r(DisasContext *dc)
{
- DIS(fprintf (logfile, "btst $r%u, $r%u\n",
- dc->op1, dc->op2));
+ LOG_DIS("btst $r%u, $r%u\n",
+ dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
cris_evaluate_flags(dc);
gen_helper_btst(cpu_PR[PR_CCS], cpu_R[dc->op2],
@@ -1907,8 +1907,8 @@ static unsigned int dec_sub_r(DisasContext *dc)
{
TCGv t[2];
int size = memsize_zz(dc);
- DIS(fprintf (logfile, "sub.%c $r%u, $r%u\n",
- memsize_char(size), dc->op1, dc->op2));
+ LOG_DIS("sub.%c $r%u, $r%u\n",
+ memsize_char(size), dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZVC);
cris_alu_alloc_temps(dc, size, t);
dec_prep_alu_r(dc, dc->op1, dc->op2, size, 0, t[0], t[1]);
@@ -1922,9 +1922,9 @@ static unsigned int dec_movu_r(DisasContext *dc)
{
TCGv t0;
int size = memsize_z(dc);
- DIS(fprintf (logfile, "movu.%c $r%u, $r%u\n",
+ LOG_DIS("movu.%c $r%u, $r%u\n",
memsize_char(size),
- dc->op1, dc->op2));
+ dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
t0 = tcg_temp_new();
@@ -1939,9 +1939,9 @@ static unsigned int dec_movs_r(DisasContext *dc)
{
TCGv t0;
int size = memsize_z(dc);
- DIS(fprintf (logfile, "movs.%c $r%u, $r%u\n",
+ LOG_DIS("movs.%c $r%u, $r%u\n",
memsize_char(size),
- dc->op1, dc->op2));
+ dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZ);
t0 = tcg_temp_new();
@@ -1958,9 +1958,9 @@ static unsigned int dec_addu_r(DisasContext *dc)
{
TCGv t0;
int size = memsize_z(dc);
- DIS(fprintf (logfile, "addu.%c $r%u, $r%u\n",
+ LOG_DIS("addu.%c $r%u, $r%u\n",
memsize_char(size),
- dc->op1, dc->op2));
+ dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZVC);
t0 = tcg_temp_new();
@@ -1977,9 +1977,9 @@ static unsigned int dec_adds_r(DisasContext *dc)
{
TCGv t0;
int size = memsize_z(dc);
- DIS(fprintf (logfile, "adds.%c $r%u, $r%u\n",
+ LOG_DIS("adds.%c $r%u, $r%u\n",
memsize_char(size),
- dc->op1, dc->op2));
+ dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZVC);
t0 = tcg_temp_new();
@@ -1996,9 +1996,9 @@ static unsigned int dec_subu_r(DisasContext *dc)
{
TCGv t0;
int size = memsize_z(dc);
- DIS(fprintf (logfile, "subu.%c $r%u, $r%u\n",
+ LOG_DIS("subu.%c $r%u, $r%u\n",
memsize_char(size),
- dc->op1, dc->op2));
+ dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZVC);
t0 = tcg_temp_new();
@@ -2015,9 +2015,9 @@ static unsigned int dec_subs_r(DisasContext *dc)
{
TCGv t0;
int size = memsize_z(dc);
- DIS(fprintf (logfile, "subs.%c $r%u, $r%u\n",
+ LOG_DIS("subs.%c $r%u, $r%u\n",
memsize_char(size),
- dc->op1, dc->op2));
+ dc->op1, dc->op2);
cris_cc_mask(dc, CC_MASK_NZVC);
t0 = tcg_temp_new();
@@ -2038,15 +2038,15 @@ static unsigned int dec_setclrf(DisasContext *dc)
flags = (EXTRACT_FIELD(dc->ir, 12, 15) << 4)
| EXTRACT_FIELD(dc->ir, 0, 3);
if (set && flags == 0) {
- DIS(fprintf (logfile, "nop\n"));
+ LOG_DIS("nop\n");
return 2;
} else if (!set && (flags & 0x20)) {
- DIS(fprintf (logfile, "di\n"));
+ LOG_DIS("di\n");
}
else {
- DIS(fprintf (logfile, "%sf %x\n",
+ LOG_DIS("%sf %x\n",
set ? "set" : "clr",
- flags));
+ flags);
}
/* User space is not allowed to touch these. Silently ignore. */
@@ -2101,14 +2101,14 @@ static unsigned int dec_setclrf(DisasContext *dc)
static unsigned int dec_move_rs(DisasContext *dc)
{
- DIS(fprintf (logfile, "move $r%u, $s%u\n", dc->op1, dc->op2));
+ LOG_DIS("move $r%u, $s%u\n", dc->op1, dc->op2);
cris_cc_mask(dc, 0);
gen_helper_movl_sreg_reg(tcg_const_tl(dc->op2), tcg_const_tl(dc->op1));
return 2;
}
static unsigned int dec_move_sr(DisasContext *dc)
{
- DIS(fprintf (logfile, "move $s%u, $r%u\n", dc->op2, dc->op1));
+ LOG_DIS("move $s%u, $r%u\n", dc->op2, dc->op1);
cris_cc_mask(dc, 0);
gen_helper_movl_reg_sreg(tcg_const_tl(dc->op1), tcg_const_tl(dc->op2));
return 2;
@@ -2117,7 +2117,7 @@ static unsigned int dec_move_sr(DisasContext *dc)
static unsigned int dec_move_rp(DisasContext *dc)
{
TCGv t[2];
- DIS(fprintf (logfile, "move $r%u, $p%u\n", dc->op1, dc->op2));
+ LOG_DIS("move $r%u, $p%u\n", dc->op1, dc->op2);
cris_cc_mask(dc, 0);
t[0] = tcg_temp_new();
@@ -2147,7 +2147,7 @@ static unsigned int dec_move_rp(DisasContext *dc)
static unsigned int dec_move_pr(DisasContext *dc)
{
TCGv t0;
- DIS(fprintf (logfile, "move $p%u, $r%u\n", dc->op1, dc->op2));
+ LOG_DIS("move $p%u, $r%u\n", dc->op1, dc->op2);
cris_cc_mask(dc, 0);
if (dc->op2 == PR_CCS)
@@ -2165,10 +2165,10 @@ static unsigned int dec_move_mr(DisasContext *dc)
{
int memsize = memsize_zz(dc);
int insn_len;
- DIS(fprintf (logfile, "move.%c [$r%u%s, $r%u\n",
+ LOG_DIS("move.%c [$r%u%s, $r%u\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
if (memsize == 4) {
insn_len = dec_prep_move_m(dc, 0, 4, cpu_R[dc->op2]);
@@ -2208,10 +2208,10 @@ static unsigned int dec_movs_m(DisasContext *dc)
TCGv t[2];
int memsize = memsize_z(dc);
int insn_len;
- DIS(fprintf (logfile, "movs.%c [$r%u%s, $r%u\n",
+ LOG_DIS("movs.%c [$r%u%s, $r%u\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_alu_m_alloc_temps(t);
/* sign extend. */
@@ -2229,10 +2229,10 @@ static unsigned int dec_addu_m(DisasContext *dc)
TCGv t[2];
int memsize = memsize_z(dc);
int insn_len;
- DIS(fprintf (logfile, "addu.%c [$r%u%s, $r%u\n",
+ LOG_DIS("addu.%c [$r%u%s, $r%u\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_alu_m_alloc_temps(t);
/* sign extend. */
@@ -2250,10 +2250,10 @@ static unsigned int dec_adds_m(DisasContext *dc)
TCGv t[2];
int memsize = memsize_z(dc);
int insn_len;
- DIS(fprintf (logfile, "adds.%c [$r%u%s, $r%u\n",
+ LOG_DIS("adds.%c [$r%u%s, $r%u\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_alu_m_alloc_temps(t);
/* sign extend. */
@@ -2270,10 +2270,10 @@ static unsigned int dec_subu_m(DisasContext *dc)
TCGv t[2];
int memsize = memsize_z(dc);
int insn_len;
- DIS(fprintf (logfile, "subu.%c [$r%u%s, $r%u\n",
+ LOG_DIS("subu.%c [$r%u%s, $r%u\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_alu_m_alloc_temps(t);
/* sign extend. */
@@ -2290,10 +2290,10 @@ static unsigned int dec_subs_m(DisasContext *dc)
TCGv t[2];
int memsize = memsize_z(dc);
int insn_len;
- DIS(fprintf (logfile, "subs.%c [$r%u%s, $r%u\n",
+ LOG_DIS("subs.%c [$r%u%s, $r%u\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_alu_m_alloc_temps(t);
/* sign extend. */
@@ -2311,10 +2311,10 @@ static unsigned int dec_movu_m(DisasContext *dc)
int memsize = memsize_z(dc);
int insn_len;
- DIS(fprintf (logfile, "movu.%c [$r%u%s, $r%u\n",
+ LOG_DIS("movu.%c [$r%u%s, $r%u\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_alu_m_alloc_temps(t);
insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]);
@@ -2330,10 +2330,10 @@ static unsigned int dec_cmpu_m(DisasContext *dc)
TCGv t[2];
int memsize = memsize_z(dc);
int insn_len;
- DIS(fprintf (logfile, "cmpu.%c [$r%u%s, $r%u\n",
+ LOG_DIS("cmpu.%c [$r%u%s, $r%u\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_alu_m_alloc_temps(t);
insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]);
@@ -2349,10 +2349,10 @@ static unsigned int dec_cmps_m(DisasContext *dc)
TCGv t[2];
int memsize = memsize_z(dc);
int insn_len;
- DIS(fprintf (logfile, "cmps.%c [$r%u%s, $r%u\n",
+ LOG_DIS("cmps.%c [$r%u%s, $r%u\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_alu_m_alloc_temps(t);
insn_len = dec_prep_alu_m(dc, 1, memsize, t[0], t[1]);
@@ -2370,10 +2370,10 @@ static unsigned int dec_cmp_m(DisasContext *dc)
TCGv t[2];
int memsize = memsize_zz(dc);
int insn_len;
- DIS(fprintf (logfile, "cmp.%c [$r%u%s, $r%u\n",
+ LOG_DIS("cmp.%c [$r%u%s, $r%u\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_alu_m_alloc_temps(t);
insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]);
@@ -2391,10 +2391,10 @@ static unsigned int dec_test_m(DisasContext *dc)
TCGv t[2];
int memsize = memsize_zz(dc);
int insn_len;
- DIS(fprintf (logfile, "test.%d [$r%u%s] op2=%x\n",
+ LOG_DIS("test.%d [$r%u%s] op2=%x\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_evaluate_flags(dc);
@@ -2415,10 +2415,10 @@ static unsigned int dec_and_m(DisasContext *dc)
TCGv t[2];
int memsize = memsize_zz(dc);
int insn_len;
- DIS(fprintf (logfile, "and.%d [$r%u%s, $r%u\n",
+ LOG_DIS("and.%d [$r%u%s, $r%u\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_alu_m_alloc_temps(t);
insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]);
@@ -2434,10 +2434,10 @@ static unsigned int dec_add_m(DisasContext *dc)
TCGv t[2];
int memsize = memsize_zz(dc);
int insn_len;
- DIS(fprintf (logfile, "add.%d [$r%u%s, $r%u\n",
+ LOG_DIS("add.%d [$r%u%s, $r%u\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_alu_m_alloc_temps(t);
insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]);
@@ -2454,10 +2454,10 @@ static unsigned int dec_addo_m(DisasContext *dc)
TCGv t[2];
int memsize = memsize_zz(dc);
int insn_len;
- DIS(fprintf (logfile, "add.%d [$r%u%s, $r%u\n",
+ LOG_DIS("add.%d [$r%u%s, $r%u\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_alu_m_alloc_temps(t);
insn_len = dec_prep_alu_m(dc, 1, memsize, t[0], t[1]);
@@ -2473,10 +2473,10 @@ static unsigned int dec_bound_m(DisasContext *dc)
TCGv l[2];
int memsize = memsize_zz(dc);
int insn_len;
- DIS(fprintf (logfile, "bound.%d [$r%u%s, $r%u\n",
+ LOG_DIS("bound.%d [$r%u%s, $r%u\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
l[0] = tcg_temp_local_new();
l[1] = tcg_temp_local_new();
@@ -2493,9 +2493,9 @@ static unsigned int dec_addc_mr(DisasContext *dc)
{
TCGv t[2];
int insn_len = 2;
- DIS(fprintf (logfile, "addc [$r%u%s, $r%u\n",
+ LOG_DIS("addc [$r%u%s, $r%u\n",
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_evaluate_flags(dc);
@@ -2517,10 +2517,10 @@ static unsigned int dec_sub_m(DisasContext *dc)
TCGv t[2];
int memsize = memsize_zz(dc);
int insn_len;
- DIS(fprintf (logfile, "sub.%c [$r%u%s, $r%u ir=%x zz=%x\n",
+ LOG_DIS("sub.%c [$r%u%s, $r%u ir=%x zz=%x\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2, dc->ir, dc->zzsize));
+ dc->op2, dc->ir, dc->zzsize);
cris_alu_m_alloc_temps(t);
insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]);
@@ -2536,10 +2536,10 @@ static unsigned int dec_or_m(DisasContext *dc)
TCGv t[2];
int memsize = memsize_zz(dc);
int insn_len;
- DIS(fprintf (logfile, "or.%d [$r%u%s, $r%u pc=%x\n",
+ LOG_DIS("or.%d [$r%u%s, $r%u pc=%x\n",
memsize_char(memsize),
dc->op1, dc->postinc ? "+]" : "]",
- dc->op2, dc->pc));
+ dc->op2, dc->pc);
cris_alu_m_alloc_temps(t);
insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]);
@@ -2557,11 +2557,11 @@ static unsigned int dec_move_mp(DisasContext *dc)
int memsize = memsize_zz(dc);
int insn_len = 2;
- DIS(fprintf (logfile, "move.%c [$r%u%s, $p%u\n",
+ LOG_DIS("move.%c [$r%u%s, $p%u\n",
memsize_char(memsize),
dc->op1,
dc->postinc ? "+]" : "]",
- dc->op2));
+ dc->op2);
cris_alu_m_alloc_temps(t);
insn_len = dec_prep_alu_m(dc, 0, memsize, t[0], t[1]);
@@ -2590,9 +2590,9 @@ static unsigned int dec_move_pm(DisasContext *dc)
memsize = preg_sizes[dc->op2];
- DIS(fprintf (logfile, "move.%c $p%u, [$r%u%s\n",
+ LOG_DIS("move.%c $p%u, [$r%u%s\n",
memsize_char(memsize),
- dc->op2, dc->op1, dc->postinc ? "+]" : "]"));
+ dc->op2, dc->op1, dc->postinc ? "+]" : "]");
/* prepare store. Address in T0, value in T1. */
if (dc->op2 == PR_CCS)
@@ -2617,8 +2617,8 @@ static unsigned int dec_movem_mr(DisasContext *dc)
int i;
int nr = dc->op2 + 1;
- DIS(fprintf (logfile, "movem [$r%u%s, $r%u\n", dc->op1,
- dc->postinc ? "+]" : "]", dc->op2));
+ LOG_DIS("movem [$r%u%s, $r%u\n", dc->op1,
+ dc->postinc ? "+]" : "]", dc->op2);
addr = tcg_temp_new();
/* There are probably better ways of doing this. */
@@ -2661,8 +2661,8 @@ static unsigned int dec_movem_rm(DisasContext *dc)
TCGv addr;
int i;
- DIS(fprintf (logfile, "movem $r%u, [$r%u%s\n", dc->op2, dc->op1,
- dc->postinc ? "+]" : "]"));
+ LOG_DIS("movem $r%u, [$r%u%s\n", dc->op2, dc->op1,
+ dc->postinc ? "+]" : "]");
cris_flush_cc_state(dc);
@@ -2690,8 +2690,8 @@ static unsigned int dec_move_rm(DisasContext *dc)
memsize = memsize_zz(dc);
- DIS(fprintf (logfile, "move.%d $r%u, [$r%u]\n",
- memsize, dc->op2, dc->op1));
+ LOG_DIS("move.%d $r%u, [$r%u]\n",
+ memsize, dc->op2, dc->op1);
/* prepare store. */
cris_flush_cc_state(dc);
@@ -2705,8 +2705,8 @@ static unsigned int dec_move_rm(DisasContext *dc)
static unsigned int dec_lapcq(DisasContext *dc)
{
- DIS(fprintf (logfile, "lapcq %x, $r%u\n",
- dc->pc + dc->op1*2, dc->op2));
+ LOG_DIS("lapcq %x, $r%u\n",
+ dc->pc + dc->op1*2, dc->op2);
cris_cc_mask(dc, 0);
tcg_gen_movi_tl(cpu_R[dc->op2], dc->pc + dc->op1 * 2);
return 2;
@@ -2722,7 +2722,7 @@ static unsigned int dec_lapc_im(DisasContext *dc)
cris_cc_mask(dc, 0);
imm = ldl_code(dc->pc + 2);
- DIS(fprintf (logfile, "lapc 0x%x, $r%u\n", imm + dc->pc, dc->op2));
+ LOG_DIS("lapc 0x%x, $r%u\n", imm + dc->pc, dc->op2);
pc = dc->pc;
pc += imm;
@@ -2733,7 +2733,7 @@ static unsigned int dec_lapc_im(DisasContext *dc)
/* Jump to special reg. */
static unsigned int dec_jump_p(DisasContext *dc)
{
- DIS(fprintf (logfile, "jump $p%u\n", dc->op2));
+ LOG_DIS("jump $p%u\n", dc->op2);
if (dc->op2 == PR_CCS)
cris_evaluate_flags(dc);
@@ -2748,7 +2748,7 @@ static unsigned int dec_jump_p(DisasContext *dc)
/* Jump and save. */
static unsigned int dec_jas_r(DisasContext *dc)
{
- DIS(fprintf (logfile, "jas $r%u, $p%u\n", dc->op1, dc->op2));
+ LOG_DIS("jas $r%u, $p%u\n", dc->op1, dc->op2);
cris_cc_mask(dc, 0);
/* Store the return address in Pd. */
tcg_gen_mov_tl(env_btarget, cpu_R[dc->op1]);
@@ -2766,7 +2766,7 @@ static unsigned int dec_jas_im(DisasContext *dc)
imm = ldl_code(dc->pc + 2);
- DIS(fprintf (logfile, "jas 0x%x\n", imm));
+ LOG_DIS("jas 0x%x\n", imm);
cris_cc_mask(dc, 0);
/* Store the return address in Pd. */
t_gen_mov_preg_TN(dc, dc->op2, tcg_const_tl(dc->pc + 8));
@@ -2782,7 +2782,7 @@ static unsigned int dec_jasc_im(DisasContext *dc)
imm = ldl_code(dc->pc + 2);
- DIS(fprintf (logfile, "jasc 0x%x\n", imm));
+ LOG_DIS("jasc 0x%x\n", imm);
cris_cc_mask(dc, 0);
/* Store the return address in Pd. */
t_gen_mov_preg_TN(dc, dc->op2, tcg_const_tl(dc->pc + 8 + 4));
@@ -2794,7 +2794,7 @@ static unsigned int dec_jasc_im(DisasContext *dc)
static unsigned int dec_jasc_r(DisasContext *dc)
{
- DIS(fprintf (logfile, "jasc_r $r%u, $p%u\n", dc->op1, dc->op2));
+ LOG_DIS("jasc_r $r%u, $p%u\n", dc->op1, dc->op2);
cris_cc_mask(dc, 0);
/* Store the return address in Pd. */
tcg_gen_mov_tl(env_btarget, cpu_R[dc->op1]);
@@ -2810,9 +2810,9 @@ static unsigned int dec_bcc_im(DisasContext *dc)
offset = ldsw_code(dc->pc + 2);
- DIS(fprintf (logfile, "b%s %d pc=%x dst=%x\n",
+ LOG_DIS("b%s %d pc=%x dst=%x\n",
cc_name(cond), offset,
- dc->pc, dc->pc + offset));
+ dc->pc, dc->pc + offset);
cris_cc_mask(dc, 0);
/* op2 holds the condition-code. */
@@ -2827,7 +2827,7 @@ static unsigned int dec_bas_im(DisasContext *dc)
simm = ldl_code(dc->pc + 2);
- DIS(fprintf (logfile, "bas 0x%x, $p%u\n", dc->pc + simm, dc->op2));
+ LOG_DIS("bas 0x%x, $p%u\n", dc->pc + simm, dc->op2);
cris_cc_mask(dc, 0);
/* Store the return address in Pd. */
t_gen_mov_preg_TN(dc, dc->op2, tcg_const_tl(dc->pc + 8));
@@ -2842,7 +2842,7 @@ static unsigned int dec_basc_im(DisasContext *dc)
int32_t simm;
simm = ldl_code(dc->pc + 2);
- DIS(fprintf (logfile, "basc 0x%x, $p%u\n", dc->pc + simm, dc->op2));
+ LOG_DIS("basc 0x%x, $p%u\n", dc->pc + simm, dc->op2);
cris_cc_mask(dc, 0);
/* Store the return address in Pd. */
t_gen_mov_preg_TN(dc, dc->op2, tcg_const_tl(dc->pc + 12));
@@ -2866,20 +2866,20 @@ static unsigned int dec_rfe_etc(DisasContext *dc)
switch (dc->op2 & 7) {
case 2:
/* rfe. */
- DIS(fprintf(logfile, "rfe\n"));
+ LOG_DIS("rfe\n");
cris_evaluate_flags(dc);
gen_helper_rfe();
dc->is_jmp = DISAS_UPDATE;
break;
case 5:
/* rfn. */
- DIS(fprintf(logfile, "rfn\n"));
+ LOG_DIS("rfn\n");
cris_evaluate_flags(dc);
gen_helper_rfn();
dc->is_jmp = DISAS_UPDATE;
break;
case 6:
- DIS(fprintf(logfile, "break %d\n", dc->op1));
+ LOG_DIS("break %d\n", dc->op1);
cris_evaluate_flags (dc);
/* break. */
tcg_gen_movi_tl(env_pc, dc->pc + 2);
@@ -3035,7 +3035,7 @@ cris_decoder(DisasContext *dc)
unsigned int insn_len = 2;
int i;
- if (unlikely(loglevel & CPU_LOG_TB_OP))
+ if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP)))
tcg_gen_debug_insn_start(dc->pc);
/* Load a halfword onto the instruction register. */
@@ -3144,8 +3144,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
int num_insns;
int max_insns;
- if (!logfile)
- logfile = stderr;
+ qemu_log_try_set_file(stderr);
/* Odd PC indicates that branch is rexecuting due to exception in the
* delayslot, like in real hw.
@@ -3180,8 +3179,8 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
dc->cpustate_changed = 0;
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile,
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ qemu_log(
"srch=%d pc=%x %x flg=%llx bt=%x ds=%u ccs=%x\n"
"pid=%x usp=%x\n"
"%x.%x.%x.%x\n"
@@ -3199,8 +3198,8 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
env->regs[10], env->regs[11],
env->regs[12], env->regs[13],
env->regs[14], env->regs[15]);
- fprintf(logfile, "--------------\n");
- fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
+ qemu_log("--------------\n");
+ qemu_log("IN: %s\n", lookup_symbol(pc_start));
}
next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
@@ -3231,7 +3230,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
}
/* Pretty disas. */
- DIS(fprintf(logfile, "%8.8x:\t", dc->pc));
+ LOG_DIS("%8.8x:\t", dc->pc);
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
gen_io_start();
@@ -3332,9 +3331,9 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
#ifdef DEBUG_DISAS
#if !DISAS_CRIS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- target_disas(logfile, pc_start, dc->pc - pc_start, 0);
- fprintf(logfile, "\nisize=%d osize=%zd\n",
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ log_target_disas(pc_start, dc->pc - pc_start, 0);
+ qemu_log("\nisize=%d osize=%zd\n",
dc->pc - pc_start, gen_opc_ptr - gen_opc_buf);
}
#endif
diff --git a/target-i386/exec.h b/target-i386/exec.h
index 284f7b0f3..268982381 100644
--- a/target-i386/exec.h
+++ b/target-i386/exec.h
@@ -31,6 +31,7 @@
register struct CPUX86State *env asm(AREG0);
+#include "qemu-common.h"
#include "qemu-log.h"
#define EAX (env->regs[R_EAX])
@@ -62,8 +63,8 @@ void do_interrupt(int intno, int is_int, int error_code,
target_ulong next_eip, int is_hw);
void do_interrupt_user(int intno, int is_int, int error_code,
target_ulong next_eip);
-void raise_exception_err(int exception_index, int error_code);
-void raise_exception(int exception_index);
+void noreturn raise_exception_err(int exception_index, int error_code);
+void noreturn raise_exception(int exception_index);
void do_smm_enter(void);
/* n must be a constant to be efficient */
diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c
index 6e0e32e75..dcbc361a0 100644
--- a/target-i386/op_helper.c
+++ b/target-i386/op_helper.c
@@ -24,11 +24,21 @@
//#define DEBUG_PCALL
+
+#ifdef DEBUG_PCALL
+# define LOG_PCALL(...) qemu_log_mask(CPU_LOG_PCALL, ## __VA_ARGS__)
+# define LOG_PCALL_STATE(env) \
+ log_cpu_state_mask(CPU_LOG_PCALL, (env), X86_DUMP_CCOP)
+#else
+# define LOG_PCALL(...) do { } while (0)
+# define LOG_PCALL_STATE(env) do { } while (0)
+#endif
+
+
#if 0
#define raise_exception_err(a, b)\
do {\
- if (logfile)\
- fprintf(logfile, "raise_exception line=%d\n", __LINE__);\
+ qemu_log("raise_exception line=%d\n", __LINE__);\
(raise_exception_err)(a, b);\
} while (0)
#endif
@@ -277,10 +287,7 @@ static void switch_tss(int tss_selector,
target_ulong ptr;
type = (e2 >> DESC_TYPE_SHIFT) & 0xf;
-#ifdef DEBUG_PCALL
- if (loglevel & CPU_LOG_PCALL)
- fprintf(logfile, "switch_tss: sel=0x%04x type=%d src=%d\n", tss_selector, type, source);
-#endif
+ LOG_PCALL("switch_tss: sel=0x%04x type=%d src=%d\n", tss_selector, type, source);
/* if task gate, we read the TSS segment and we load it */
if (type == 5) {
@@ -639,7 +646,7 @@ static void do_interrupt_protected(int intno, int is_int, int error_code,
target_ulong ptr, ssp;
int type, dpl, selector, ss_dpl, cpl;
int has_error_code, new_stack, shift;
- uint32_t e1, e2, offset, ss, esp, ss_e1, ss_e2;
+ uint32_t e1, e2, offset, ss = 0, esp, ss_e1 = 0, ss_e2 = 0;
uint32_t old_eip, sp_mask;
has_error_code = 0;
@@ -1199,32 +1206,32 @@ void do_interrupt_user(int intno, int is_int, int error_code,
void do_interrupt(int intno, int is_int, int error_code,
target_ulong next_eip, int is_hw)
{
- if (loglevel & CPU_LOG_INT) {
+ if (qemu_loglevel_mask(CPU_LOG_INT)) {
if ((env->cr[0] & CR0_PE_MASK)) {
static int count;
- fprintf(logfile, "%6d: v=%02x e=%04x i=%d cpl=%d IP=%04x:" TARGET_FMT_lx " pc=" TARGET_FMT_lx " SP=%04x:" TARGET_FMT_lx,
+ qemu_log("%6d: v=%02x e=%04x i=%d cpl=%d IP=%04x:" TARGET_FMT_lx " pc=" TARGET_FMT_lx " SP=%04x:" TARGET_FMT_lx,
count, intno, error_code, is_int,
env->hflags & HF_CPL_MASK,
env->segs[R_CS].selector, EIP,
(int)env->segs[R_CS].base + EIP,
env->segs[R_SS].selector, ESP);
if (intno == 0x0e) {
- fprintf(logfile, " CR2=" TARGET_FMT_lx, env->cr[2]);
+ qemu_log(" CR2=" TARGET_FMT_lx, env->cr[2]);
} else {
- fprintf(logfile, " EAX=" TARGET_FMT_lx, EAX);
+ qemu_log(" EAX=" TARGET_FMT_lx, EAX);
}
- fprintf(logfile, "\n");
- cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
+ qemu_log("\n");
+ log_cpu_state(env, X86_DUMP_CCOP);
#if 0
{
int i;
uint8_t *ptr;
- fprintf(logfile, " code=");
+ qemu_log(" code=");
ptr = env->segs[R_CS].base + env->eip;
for(i = 0; i < 16; i++) {
- fprintf(logfile, " %02x", ldub(ptr + i));
+ qemu_log(" %02x", ldub(ptr + i));
}
- fprintf(logfile, "\n");
+ qemu_log("\n");
}
#endif
count++;
@@ -1257,8 +1264,7 @@ static int check_exception(int intno, int *error_code)
int second_contributory = intno == 0 ||
(intno >= 10 && intno <= 13);
- if (loglevel & CPU_LOG_INT)
- fprintf(logfile, "check_exception old: 0x%x new 0x%x\n",
+ qemu_log_mask(CPU_LOG_INT, "check_exception old: 0x%x new 0x%x\n",
env->old_exception, intno);
if (env->old_exception == EXCP08_DBLE)
@@ -1284,8 +1290,8 @@ static int check_exception(int intno, int *error_code)
* EIP value AFTER the interrupt instruction. It is only relevant if
* is_int is TRUE.
*/
-static void raise_interrupt(int intno, int is_int, int error_code,
- int next_eip_addend)
+static void noreturn raise_interrupt(int intno, int is_int, int error_code,
+ int next_eip_addend)
{
if (!is_int) {
helper_svm_check_intercept_param(SVM_EXIT_EXCP_BASE + intno, error_code);
@@ -1339,10 +1345,8 @@ void do_smm_enter(void)
SegmentCache *dt;
int i, offset;
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "SMM: enter\n");
- cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
- }
+ qemu_log_mask(CPU_LOG_INT, "SMM: enter\n");
+ log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP);
env->hflags |= HF_SMM_MASK;
cpu_smm_update(env);
@@ -1582,10 +1586,8 @@ void helper_rsm(void)
env->hflags &= ~HF_SMM_MASK;
cpu_smm_update(env);
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "SMM: after RSM\n");
- cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
- }
+ qemu_log_mask(CPU_LOG_INT, "SMM: after RSM\n");
+ log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP);
}
#endif /* !CONFIG_USER_ONLY */
@@ -2143,7 +2145,7 @@ void helper_load_seg(int seg_reg, int selector)
get_seg_limit(e1, e2),
e2);
#if 0
- fprintf(logfile, "load_seg: sel=0x%04x base=0x%08lx limit=0x%08lx flags=%08x\n",
+ qemu_log("load_seg: sel=0x%04x base=0x%08lx limit=0x%08lx flags=%08x\n",
selector, (unsigned long)sc->base, sc->limit, sc->flags);
#endif
}
@@ -2271,28 +2273,19 @@ void helper_lcall_protected(int new_cs, target_ulong new_eip,
{
int new_stack, i;
uint32_t e1, e2, cpl, dpl, rpl, selector, offset, param_count;
- uint32_t ss, ss_e1, ss_e2, sp, type, ss_dpl, sp_mask;
+ uint32_t ss = 0, ss_e1 = 0, ss_e2 = 0, sp, type, ss_dpl, sp_mask;
uint32_t val, limit, old_sp_mask;
target_ulong ssp, old_ssp, next_eip;
next_eip = env->eip + next_eip_addend;
-#ifdef DEBUG_PCALL
- if (loglevel & CPU_LOG_PCALL) {
- fprintf(logfile, "lcall %04x:%08x s=%d\n",
- new_cs, (uint32_t)new_eip, shift);
- cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
- }
-#endif
+ LOG_PCALL("lcall %04x:%08x s=%d\n", new_cs, (uint32_t)new_eip, shift);
+ LOG_PCALL_STATE(env);
if ((new_cs & 0xfffc) == 0)
raise_exception_err(EXCP0D_GPF, 0);
if (load_segment(&e1, &e2, new_cs) != 0)
raise_exception_err(EXCP0D_GPF, new_cs & 0xfffc);
cpl = env->hflags & HF_CPL_MASK;
-#ifdef DEBUG_PCALL
- if (loglevel & CPU_LOG_PCALL) {
- fprintf(logfile, "desc=%08x:%08x\n", e1, e2);
- }
-#endif
+ LOG_PCALL("desc=%08x:%08x\n", e1, e2);
if (e2 & DESC_S_MASK) {
if (!(e2 & DESC_CS_MASK))
raise_exception_err(EXCP0D_GPF, new_cs & 0xfffc);
@@ -2396,11 +2389,8 @@ void helper_lcall_protected(int new_cs, target_ulong new_eip,
if (!(e2 & DESC_C_MASK) && dpl < cpl) {
/* to inner privilege */
get_ss_esp_from_tss(&ss, &sp, dpl);
-#ifdef DEBUG_PCALL
- if (loglevel & CPU_LOG_PCALL)
- fprintf(logfile, "new ss:esp=%04x:%08x param_count=%d ESP=" TARGET_FMT_lx "\n",
+ LOG_PCALL("new ss:esp=%04x:%08x param_count=%d ESP=" TARGET_FMT_lx "\n",
ss, sp, param_count, ESP);
-#endif
if ((ss & 0xfffc) == 0)
raise_exception_err(EXCP0A_TSS, ss & 0xfffc);
if ((ss & 3) != dpl)
@@ -2587,13 +2577,9 @@ static inline void helper_ret_protected(int shift, int is_iret, int addend)
if (is_iret)
POPW(ssp, sp, sp_mask, new_eflags);
}
-#ifdef DEBUG_PCALL
- if (loglevel & CPU_LOG_PCALL) {
- fprintf(logfile, "lret new %04x:" TARGET_FMT_lx " s=%d addend=0x%x\n",
- new_cs, new_eip, shift, addend);
- cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
- }
-#endif
+ LOG_PCALL("lret new %04x:" TARGET_FMT_lx " s=%d addend=0x%x\n",
+ new_cs, new_eip, shift, addend);
+ LOG_PCALL_STATE(env);
if ((new_cs & 0xfffc) == 0)
raise_exception_err(EXCP0D_GPF, new_cs & 0xfffc);
if (load_segment(&e1, &e2, new_cs) != 0)
@@ -2643,12 +2629,8 @@ static inline void helper_ret_protected(int shift, int is_iret, int addend)
POPW(ssp, sp, sp_mask, new_esp);
POPW(ssp, sp, sp_mask, new_ss);
}
-#ifdef DEBUG_PCALL
- if (loglevel & CPU_LOG_PCALL) {
- fprintf(logfile, "new ss:esp=%04x:" TARGET_FMT_lx "\n",
+ LOG_PCALL("new ss:esp=%04x:" TARGET_FMT_lx "\n",
new_ss, new_esp);
- }
-#endif
if ((new_ss & 0xfffc) == 0) {
#ifdef TARGET_X86_64
/* NULL ss is allowed in long mode if cpl != 3*/
@@ -4781,8 +4763,7 @@ void helper_vmrun(int aflag, int next_eip_addend)
else
addr = (uint32_t)EAX;
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile,"vmrun! " TARGET_FMT_lx "\n", addr);
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmrun! " TARGET_FMT_lx "\n", addr);
env->vm_vmcb = addr;
@@ -4902,8 +4883,7 @@ void helper_vmrun(int aflag, int next_eip_addend)
uint32_t event_inj_err = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj_err));
stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj), event_inj & ~SVM_EVTINJ_VALID);
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile, "Injecting(%#hx): ", valid_err);
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, "Injecting(%#hx): ", valid_err);
/* FIXME: need to implement valid_err */
switch (event_inj & SVM_EVTINJ_TYPE_MASK) {
case SVM_EVTINJ_TYPE_INTR:
@@ -4911,8 +4891,7 @@ void helper_vmrun(int aflag, int next_eip_addend)
env->error_code = event_inj_err;
env->exception_is_int = 0;
env->exception_next_eip = -1;
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile, "INTR");
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, "INTR");
/* XXX: is it always correct ? */
do_interrupt(vector, 0, 0, 0, 1);
break;
@@ -4921,8 +4900,7 @@ void helper_vmrun(int aflag, int next_eip_addend)
env->error_code = event_inj_err;
env->exception_is_int = 0;
env->exception_next_eip = EIP;
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile, "NMI");
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, "NMI");
cpu_loop_exit();
break;
case SVM_EVTINJ_TYPE_EXEPT:
@@ -4930,8 +4908,7 @@ void helper_vmrun(int aflag, int next_eip_addend)
env->error_code = event_inj_err;
env->exception_is_int = 0;
env->exception_next_eip = -1;
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile, "EXEPT");
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, "EXEPT");
cpu_loop_exit();
break;
case SVM_EVTINJ_TYPE_SOFT:
@@ -4939,13 +4916,11 @@ void helper_vmrun(int aflag, int next_eip_addend)
env->error_code = event_inj_err;
env->exception_is_int = 1;
env->exception_next_eip = EIP;
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile, "SOFT");
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, "SOFT");
cpu_loop_exit();
break;
}
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile, " %#x %#x\n", env->exception_index, env->error_code);
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, " %#x %#x\n", env->exception_index, env->error_code);
}
}
@@ -4965,8 +4940,7 @@ void helper_vmload(int aflag)
else
addr = (uint32_t)EAX;
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile,"vmload! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n",
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmload! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n",
addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)),
env->segs[R_FS].base);
@@ -5001,8 +4975,7 @@ void helper_vmsave(int aflag)
else
addr = (uint32_t)EAX;
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile,"vmsave! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n",
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmsave! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n",
addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)),
env->segs[R_FS].base);
@@ -5150,8 +5123,7 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
{
uint32_t int_ctl;
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile,"vmexit(%08x, %016" PRIx64 ", %016" PRIx64 ", " TARGET_FMT_lx ")!\n",
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016" PRIx64 ", " TARGET_FMT_lx ")!\n",
exit_code, exit_info_1,
ldq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2)),
EIP);
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 93f805fb8..4b894fd70 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -3961,7 +3961,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
target_ulong next_eip, tval;
int rex_w, rex_r;
- if (unlikely(loglevel & CPU_LOG_TB_OP))
+ if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP)))
tcg_gen_debug_insn_start(pc_start);
s->pc = pc_start;
prefixes = 0;
@@ -7675,21 +7675,19 @@ static inline void gen_intermediate_code_internal(CPUState *env,
}
#ifdef DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_CPU) {
- cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
- }
- if (loglevel & CPU_LOG_TB_IN_ASM) {
+ log_cpu_state_mask(CPU_LOG_TB_CPU, env, X86_DUMP_CCOP);
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
int disas_flags;
- fprintf(logfile, "----------------\n");
- fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
+ qemu_log("----------------\n");
+ qemu_log("IN: %s\n", lookup_symbol(pc_start));
#ifdef TARGET_X86_64
if (dc->code64)
disas_flags = 2;
else
#endif
disas_flags = !dc->code32;
- target_disas(logfile, pc_start, pc_ptr - pc_start, disas_flags);
- fprintf(logfile, "\n");
+ log_target_disas(pc_start, pc_ptr - pc_start, disas_flags);
+ qemu_log("\n");
}
#endif
@@ -7714,15 +7712,15 @@ void gen_pc_load(CPUState *env, TranslationBlock *tb,
{
int cc_op;
#ifdef DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_OP) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_OP)) {
int i;
- fprintf(logfile, "RESTORE:\n");
+ qemu_log("RESTORE:\n");
for(i = 0;i <= pc_pos; i++) {
if (gen_opc_instr_start[i]) {
- fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]);
+ qemu_log("0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]);
}
}
- fprintf(logfile, "spc=0x%08lx pc_pos=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n",
+ qemu_log("spc=0x%08lx pc_pos=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n",
searched_pc, pc_pos, gen_opc_pc[pc_pos] - tb->cs_base,
(uint32_t)tb->cs_base);
}
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 0546fca79..ef976cf56 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -165,7 +165,7 @@ typedef void (*disas_proc)(DisasContext *, uint16_t);
#define DISAS_INSN(name) \
static void real_disas_##name (DisasContext *s, uint16_t insn); \
static void disas_##name (DisasContext *s, uint16_t insn) { \
- if (logfile) fprintf(logfile, "Dispatch " #name "\n"); \
+ qemu_log("Dispatch " #name "\n"); \
real_disas_##name(s, insn); } \
static void real_disas_##name (DisasContext *s, uint16_t insn)
#else
@@ -3063,11 +3063,11 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
*gen_opc_ptr = INDEX_op_end;
#ifdef DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "----------------\n");
- fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
- target_disas(logfile, pc_start, dc->pc - pc_start, 0);
- fprintf(logfile, "\n");
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ qemu_log("----------------\n");
+ qemu_log("IN: %s\n", lookup_symbol(pc_start));
+ log_target_disas(pc_start, dc->pc - pc_start, 0);
+ qemu_log("\n");
}
#endif
if (search_pc) {
diff --git a/target-mips/helper.c b/target-mips/helper.c
index c4fd9574e..35b2c591e 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -117,10 +117,7 @@ static int get_physical_address (CPUState *env, target_ulong *physical,
int ret = TLBRET_MATCH;
#if 0
- if (logfile) {
- fprintf(logfile, "user mode %d h %08x\n",
- user_mode, env->hflags);
- }
+ qemu_log("user mode %d h %08x\n", user_mode, env->hflags);
#endif
if (address <= (int32_t)0x7FFFFFFFUL) {
@@ -134,18 +131,18 @@ static int get_physical_address (CPUState *env, target_ulong *physical,
#if defined(TARGET_MIPS64)
} else if (address < 0x4000000000000000ULL) {
/* xuseg */
- if (UX && address <= (0x3FFFFFFFFFFFFFFFULL & env->SEGMask)) {
+ if (UX && address <= (0x3FFFFFFFFFFFFFFFULL & env->SEGMask)) {
ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
- } else {
- ret = TLBRET_BADADDR;
+ } else {
+ ret = TLBRET_BADADDR;
}
} else if (address < 0x8000000000000000ULL) {
/* xsseg */
- if ((supervisor_mode || kernel_mode) &&
- SX && address <= (0x7FFFFFFFFFFFFFFFULL & env->SEGMask)) {
+ if ((supervisor_mode || kernel_mode) &&
+ SX && address <= (0x7FFFFFFFFFFFFFFFULL & env->SEGMask)) {
ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
- } else {
- ret = TLBRET_BADADDR;
+ } else {
+ ret = TLBRET_BADADDR;
}
} else if (address < 0xC000000000000000ULL) {
/* xkphys */
@@ -153,17 +150,17 @@ static int get_physical_address (CPUState *env, target_ulong *physical,
(address & 0x07FFFFFFFFFFFFFFULL) <= env->PAMask) {
*physical = address & env->PAMask;
*prot = PAGE_READ | PAGE_WRITE;
- } else {
- ret = TLBRET_BADADDR;
- }
+ } else {
+ ret = TLBRET_BADADDR;
+ }
} else if (address < 0xFFFFFFFF80000000ULL) {
/* xkseg */
- if (kernel_mode && KX &&
- address <= (0xFFFFFFFF7FFFFFFFULL & env->SEGMask)) {
+ if (kernel_mode && KX &&
+ address <= (0xFFFFFFFF7FFFFFFFULL & env->SEGMask)) {
ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
- } else {
- ret = TLBRET_BADADDR;
- }
+ } else {
+ ret = TLBRET_BADADDR;
+ }
#endif
} else if (address < (int32_t)0xA0000000UL) {
/* kseg0 */
@@ -198,9 +195,8 @@ static int get_physical_address (CPUState *env, target_ulong *physical,
}
}
#if 0
- if (logfile) {
- fprintf(logfile, TARGET_FMT_lx " %d %d => " TARGET_FMT_lx " %d (%d)\n",
- address, rw, access_type, *physical, *prot, ret);
+ qemu_log(TARGET_FMT_lx " %d %d => " TARGET_FMT_lx " %d (%d)\n",
+ address, rw, access_type, *physical, *prot, ret);
}
#endif
@@ -233,13 +229,11 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
int access_type;
int ret = 0;
- if (logfile) {
#if 0
- cpu_dump_state(env, logfile, fprintf, 0);
+ log_cpu_state(env, 0);
#endif
- fprintf(logfile, "%s pc " TARGET_FMT_lx " ad " TARGET_FMT_lx " rw %d mmu_idx %d smmu %d\n",
- __func__, env->active_tc.PC, address, rw, mmu_idx, is_softmmu);
- }
+ qemu_log("%s pc " TARGET_FMT_lx " ad " TARGET_FMT_lx " rw %d mmu_idx %d smmu %d\n",
+ __func__, env->active_tc.PC, address, rw, mmu_idx, is_softmmu);
rw &= 1;
@@ -252,10 +246,8 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
#else
ret = get_physical_address(env, &physical, &prot,
address, rw, access_type);
- if (logfile) {
- fprintf(logfile, "%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_lx " prot %d\n",
- __func__, address, ret, physical, prot);
- }
+ qemu_log("%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_lx " prot %d\n",
+ __func__, address, ret, physical, prot);
if (ret == TLBRET_MATCH) {
ret = tlb_set_page(env, address & TARGET_PAGE_MASK,
physical & TARGET_PAGE_MASK, prot,
@@ -297,7 +289,7 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
/* Raise exception */
env->CP0_BadVAddr = address;
env->CP0_Context = (env->CP0_Context & ~0x007fffff) |
- ((address >> 9) & 0x007ffff0);
+ ((address >> 9) & 0x007ffff0);
env->CP0_EntryHi =
(env->CP0_EntryHi & 0xFF) | (address & (TARGET_PAGE_MASK << 1));
#if defined(TARGET_MIPS64)
@@ -357,14 +349,14 @@ void do_interrupt (CPUState *env)
int cause = -1;
const char *name;
- if (logfile && env->exception_index != EXCP_EXT_INTERRUPT) {
+ if (qemu_log_enabled() && env->exception_index != EXCP_EXT_INTERRUPT) {
if (env->exception_index < 0 || env->exception_index > EXCP_LAST)
name = "unknown";
else
name = excp_names[env->exception_index];
- fprintf(logfile, "%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " %s exception\n",
- __func__, env->active_tc.PC, env->CP0_EPC, name);
+ qemu_log("%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " %s exception\n",
+ __func__, env->active_tc.PC, env->CP0_EPC, name);
}
if (env->exception_index == EXCP_EXT_INTERRUPT &&
(env->hflags & MIPS_HFLAG_DM))
@@ -558,15 +550,12 @@ void do_interrupt (CPUState *env)
env->CP0_Cause = (env->CP0_Cause & ~(0x1f << CP0Ca_EC)) | (cause << CP0Ca_EC);
break;
default:
- if (logfile) {
- fprintf(logfile, "Invalid MIPS exception %d. Exiting\n",
- env->exception_index);
- }
+ qemu_log("Invalid MIPS exception %d. Exiting\n", env->exception_index);
printf("Invalid MIPS exception %d. Exiting\n", env->exception_index);
exit(1);
}
- if (logfile && env->exception_index != EXCP_EXT_INTERRUPT) {
- fprintf(logfile, "%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n"
+ if (qemu_log_enabled() && env->exception_index != EXCP_EXT_INTERRUPT) {
+ qemu_log("%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n"
" S %08x C %08x A " TARGET_FMT_lx " D " TARGET_FMT_lx "\n",
__func__, env->active_tc.PC, env->CP0_EPC, cause,
env->CP0_Status, env->CP0_Cause, env->CP0_BadVAddr,
@@ -593,8 +582,8 @@ void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra)
if (use_extra && env->tlb->tlb_in_use < MIPS_TLB_MAX) {
/* For tlbwr, we can shadow the discarded entry into
- a new (fake) TLB entry, as long as the guest can not
- tell that it's there. */
+ a new (fake) TLB entry, as long as the guest can not
+ tell that it's there. */
env->tlb->mmu.r4k.tlb[env->tlb->tlb_in_use] = *tlb;
env->tlb->tlb_in_use++;
return;
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 3c994992c..50f5e671a 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -29,8 +29,8 @@
void do_raise_exception_err (uint32_t exception, int error_code)
{
#if 1
- if (logfile && exception < 0x100)
- fprintf(logfile, "%s: %d %d\n", __func__, exception, error_code);
+ if (exception < 0x100)
+ qemu_log("%s: %d %d\n", __func__, exception, error_code);
#endif
env->exception_index = exception;
env->error_code = error_code;
@@ -1194,7 +1194,7 @@ void do_mtc0_status (target_ulong t0)
old = env->CP0_Status;
env->CP0_Status = (env->CP0_Status & ~mask) | val;
compute_hflags(env);
- if (loglevel & CPU_LOG_EXEC)
+ if (qemu_loglevel_mask(CPU_LOG_EXEC))
do_mtc0_status_debug(old, val);
cpu_mips_update_irq(env);
}
@@ -1342,21 +1342,21 @@ void do_mtc0_datahi (target_ulong t0)
void do_mtc0_status_debug(uint32_t old, uint32_t val)
{
- fprintf(logfile, "Status %08x (%08x) => %08x (%08x) Cause %08x",
+ qemu_log("Status %08x (%08x) => %08x (%08x) Cause %08x",
old, old & env->CP0_Cause & CP0Ca_IP_mask,
val, val & env->CP0_Cause & CP0Ca_IP_mask,
env->CP0_Cause);
switch (env->hflags & MIPS_HFLAG_KSU) {
- case MIPS_HFLAG_UM: fputs(", UM\n", logfile); break;
- case MIPS_HFLAG_SM: fputs(", SM\n", logfile); break;
- case MIPS_HFLAG_KM: fputs("\n", logfile); break;
+ case MIPS_HFLAG_UM: qemu_log(", UM\n"); break;
+ case MIPS_HFLAG_SM: qemu_log(", SM\n"); break;
+ case MIPS_HFLAG_KM: qemu_log("\n"); break;
default: cpu_abort(env, "Invalid MMU mode!\n"); break;
}
}
void do_mtc0_status_irqraise_debug(void)
{
- fprintf(logfile, "Raise pending IRQs\n");
+ qemu_log("Raise pending IRQs\n");
}
/* MIPS MT functions */
@@ -1518,7 +1518,7 @@ target_ulong do_yield(target_ulong t0)
}
}
} else if (t0 == 0) {
- if (0 /* TODO: TC underflow */) {
+ if (0 /* TODO: TC underflow */) {
env->CP0_VPEControl &= ~(0x7 << CP0VPECo_EXCPT);
do_raise_exception(EXCP_THREAD);
} else {
@@ -1622,17 +1622,17 @@ void r4k_do_tlbp (void)
if (i == env->tlb->nb_tlb) {
/* No match. Discard any shadow entries, if any of them match. */
for (i = env->tlb->nb_tlb; i < env->tlb->tlb_in_use; i++) {
- tlb = &env->tlb->mmu.r4k.tlb[i];
- /* 1k pages are not supported. */
- mask = tlb->PageMask | ~(TARGET_PAGE_MASK << 1);
- tag = env->CP0_EntryHi & ~mask;
- VPN = tlb->VPN & ~mask;
- /* Check ASID, virtual page number & size */
- if ((tlb->G == 1 || tlb->ASID == ASID) && VPN == tag) {
+ tlb = &env->tlb->mmu.r4k.tlb[i];
+ /* 1k pages are not supported. */
+ mask = tlb->PageMask | ~(TARGET_PAGE_MASK << 1);
+ tag = env->CP0_EntryHi & ~mask;
+ VPN = tlb->VPN & ~mask;
+ /* Check ASID, virtual page number & size */
+ if ((tlb->G == 1 || tlb->ASID == ASID) && VPN == tag) {
r4k_mips_tlb_flush_extra (env, i);
- break;
- }
- }
+ break;
+ }
+ }
env->CP0_Index |= 0x80000000;
}
@@ -1705,35 +1705,38 @@ target_ulong do_ei (void)
static void debug_pre_eret (void)
{
- fprintf(logfile, "ERET: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
- env->active_tc.PC, env->CP0_EPC);
- if (env->CP0_Status & (1 << CP0St_ERL))
- fprintf(logfile, " ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC);
- if (env->hflags & MIPS_HFLAG_DM)
- fprintf(logfile, " DEPC " TARGET_FMT_lx, env->CP0_DEPC);
- fputs("\n", logfile);
+ if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
+ qemu_log("ERET: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
+ env->active_tc.PC, env->CP0_EPC);
+ if (env->CP0_Status & (1 << CP0St_ERL))
+ qemu_log(" ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC);
+ if (env->hflags & MIPS_HFLAG_DM)
+ qemu_log(" DEPC " TARGET_FMT_lx, env->CP0_DEPC);
+ qemu_log("\n");
+ }
}
static void debug_post_eret (void)
{
- fprintf(logfile, " => PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
- env->active_tc.PC, env->CP0_EPC);
- if (env->CP0_Status & (1 << CP0St_ERL))
- fprintf(logfile, " ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC);
- if (env->hflags & MIPS_HFLAG_DM)
- fprintf(logfile, " DEPC " TARGET_FMT_lx, env->CP0_DEPC);
- switch (env->hflags & MIPS_HFLAG_KSU) {
- case MIPS_HFLAG_UM: fputs(", UM\n", logfile); break;
- case MIPS_HFLAG_SM: fputs(", SM\n", logfile); break;
- case MIPS_HFLAG_KM: fputs("\n", logfile); break;
- default: cpu_abort(env, "Invalid MMU mode!\n"); break;
+ if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
+ qemu_log(" => PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
+ env->active_tc.PC, env->CP0_EPC);
+ if (env->CP0_Status & (1 << CP0St_ERL))
+ qemu_log(" ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC);
+ if (env->hflags & MIPS_HFLAG_DM)
+ qemu_log(" DEPC " TARGET_FMT_lx, env->CP0_DEPC);
+ switch (env->hflags & MIPS_HFLAG_KSU) {
+ case MIPS_HFLAG_UM: qemu_log(", UM\n"); break;
+ case MIPS_HFLAG_SM: qemu_log(", SM\n"); break;
+ case MIPS_HFLAG_KM: qemu_log("\n"); break;
+ default: cpu_abort(env, "Invalid MMU mode!\n"); break;
+ }
}
}
void do_eret (void)
{
- if (loglevel & CPU_LOG_EXEC)
- debug_pre_eret();
+ debug_pre_eret();
if (env->CP0_Status & (1 << CP0St_ERL)) {
env->active_tc.PC = env->CP0_ErrorEPC;
env->CP0_Status &= ~(1 << CP0St_ERL);
@@ -1742,20 +1745,17 @@ void do_eret (void)
env->CP0_Status &= ~(1 << CP0St_EXL);
}
compute_hflags(env);
- if (loglevel & CPU_LOG_EXEC)
- debug_post_eret();
+ debug_post_eret();
env->CP0_LLAddr = 1;
}
void do_deret (void)
{
- if (loglevel & CPU_LOG_EXEC)
- debug_pre_eret();
+ debug_pre_eret();
env->active_tc.PC = env->CP0_DEPC;
env->hflags &= MIPS_HFLAG_DM;
compute_hflags(env);
- if (loglevel & CPU_LOG_EXEC)
- debug_post_eret();
+ debug_post_eret();
env->CP0_LLAddr = 1;
}
#endif /* !CONFIG_USER_ONLY */
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 4a1861f7e..692ea6dc0 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -514,15 +514,14 @@ static const char *fregnames_h[] =
"h24", "h25", "h26", "h27", "h28", "h29", "h30", "h31", };
#ifdef MIPS_DEBUG_DISAS
-#define MIPS_DEBUG(fmt, args...) \
-do { \
- if (loglevel & CPU_LOG_TB_IN_ASM) { \
- fprintf(logfile, TARGET_FMT_lx ": %08x " fmt "\n", \
- ctx->pc, ctx->opcode , ##args); \
- } \
-} while (0)
+#define MIPS_DEBUG(fmt, args...) \
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, \
+ TARGET_FMT_lx ": %08x " fmt "\n", \
+ ctx->pc, ctx->opcode , ##args)
+#define LOG_DISAS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__)
#else
#define MIPS_DEBUG(fmt, args...) do { } while(0)
+#define LOG_DISAS(...) do { } while (0)
#endif
#define MIPS_INVAL(op) \
@@ -758,12 +757,7 @@ static inline void gen_save_pc(target_ulong pc)
static inline void save_cpu_state (DisasContext *ctx, int do_save_pc)
{
-#if defined MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "hflags %08x saved %08x\n",
- ctx->hflags, ctx->saved_hflags);
- }
-#endif
+ LOG_DISAS("hflags %08x saved %08x\n", ctx->hflags, ctx->saved_hflags);
if (do_save_pc && ctx->pc != ctx->saved_pc) {
gen_save_pc(ctx->pc);
ctx->saved_pc = ctx->pc;
@@ -988,9 +982,8 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt,
} else if (offset == 0) {
gen_load_gpr(t0, base);
} else {
- gen_load_gpr(t0, base);
- tcg_gen_movi_tl(t1, offset);
- gen_op_addr_add(ctx, t0, t1);
+ tcg_gen_movi_tl(t0, offset);
+ gen_op_addr_add(ctx, t0, cpu_gpr[base]);
}
/* Don't do NOP if destination is zero: we must perform the actual
memory access. */
@@ -1092,7 +1085,7 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt,
break;
case OPC_LWL:
save_cpu_state(ctx, 1);
- gen_load_gpr(t1, rt);
+ gen_load_gpr(t1, rt);
gen_helper_3i(lwl, t1, t0, t1, ctx->mem_idx);
gen_store_gpr(t1, rt);
opn = "lwl";
@@ -1105,7 +1098,7 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt,
break;
case OPC_LWR:
save_cpu_state(ctx, 1);
- gen_load_gpr(t1, rt);
+ gen_load_gpr(t1, rt);
gen_helper_3i(lwr, t1, t0, t1, ctx->mem_idx);
gen_store_gpr(t1, rt);
opn = "lwr";
@@ -1151,12 +1144,8 @@ static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft,
} else if (offset == 0) {
gen_load_gpr(t0, base);
} else {
- TCGv t1 = tcg_temp_local_new();
-
- gen_load_gpr(t0, base);
- tcg_gen_movi_tl(t1, offset);
- gen_op_addr_add(ctx, t0, t1);
- tcg_temp_free(t1);
+ tcg_gen_movi_tl(t0, offset);
+ gen_op_addr_add(ctx, t0, cpu_gpr[base]);
}
/* Don't do NOP if destination is zero: we must perform the actual
memory access. */
@@ -2076,59 +2065,59 @@ static void gen_mul_vr54xx (DisasContext *ctx, uint32_t opc,
case OPC_VR54XX_MULS:
gen_helper_muls(t0, t0, t1);
opn = "muls";
- break;
+ break;
case OPC_VR54XX_MULSU:
gen_helper_mulsu(t0, t0, t1);
opn = "mulsu";
- break;
+ break;
case OPC_VR54XX_MACC:
gen_helper_macc(t0, t0, t1);
opn = "macc";
- break;
+ break;
case OPC_VR54XX_MACCU:
gen_helper_maccu(t0, t0, t1);
opn = "maccu";
- break;
+ break;
case OPC_VR54XX_MSAC:
gen_helper_msac(t0, t0, t1);
opn = "msac";
- break;
+ break;
case OPC_VR54XX_MSACU:
gen_helper_msacu(t0, t0, t1);
opn = "msacu";
- break;
+ break;
case OPC_VR54XX_MULHI:
gen_helper_mulhi(t0, t0, t1);
opn = "mulhi";
- break;
+ break;
case OPC_VR54XX_MULHIU:
gen_helper_mulhiu(t0, t0, t1);
opn = "mulhiu";
- break;
+ break;
case OPC_VR54XX_MULSHI:
gen_helper_mulshi(t0, t0, t1);
opn = "mulshi";
- break;
+ break;
case OPC_VR54XX_MULSHIU:
gen_helper_mulshiu(t0, t0, t1);
opn = "mulshiu";
- break;
+ break;
case OPC_VR54XX_MACCHI:
gen_helper_macchi(t0, t0, t1);
opn = "macchi";
- break;
+ break;
case OPC_VR54XX_MACCHIU:
gen_helper_macchiu(t0, t0, t1);
opn = "macchiu";
- break;
+ break;
case OPC_VR54XX_MSACHI:
gen_helper_msachi(t0, t0, t1);
opn = "msachi";
- break;
+ break;
case OPC_VR54XX_MSACHIU:
gen_helper_msachiu(t0, t0, t1);
opn = "msachiu";
- break;
+ break;
default:
MIPS_INVAL("mul vr54xx");
generate_exception(ctx, EXCP_RI);
@@ -2319,11 +2308,7 @@ static void gen_compute_branch (DisasContext *ctx, uint32_t opc,
if (ctx->hflags & MIPS_HFLAG_BMASK) {
#ifdef MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile,
- "Branch in delay slot at PC 0x" TARGET_FMT_lx "\n",
- ctx->pc);
- }
+ LOG_DISAS("Branch in delay slot at PC 0x" TARGET_FMT_lx "\n", ctx->pc);
#endif
generate_exception(ctx, EXCP_RI);
goto out;
@@ -3300,21 +3285,11 @@ static void gen_mfc0 (CPUState *env, DisasContext *ctx, TCGv t0, int reg, int se
default:
goto die;
}
-#if defined MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "mfc0 %s (reg %d sel %d)\n",
- rn, reg, sel);
- }
-#endif
+ LOG_DISAS("mfc0 %s (reg %d sel %d)\n", rn, reg, sel);
return;
die:
-#if defined MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "mfc0 %s (reg %d sel %d)\n",
- rn, reg, sel);
- }
-#endif
+ LOG_DISAS("mfc0 %s (reg %d sel %d)\n", rn, reg, sel);
generate_exception(ctx, EXCP_RI);
}
@@ -3904,12 +3879,7 @@ static void gen_mtc0 (CPUState *env, DisasContext *ctx, TCGv t0, int reg, int se
default:
goto die;
}
-#if defined MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "mtc0 %s (reg %d sel %d)\n",
- rn, reg, sel);
- }
-#endif
+ LOG_DISAS("mtc0 %s (reg %d sel %d)\n", rn, reg, sel);
/* For simplicity assume that all writes can cause interrupts. */
if (use_icount) {
gen_io_end();
@@ -3918,12 +3888,7 @@ static void gen_mtc0 (CPUState *env, DisasContext *ctx, TCGv t0, int reg, int se
return;
die:
-#if defined MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "mtc0 %s (reg %d sel %d)\n",
- rn, reg, sel);
- }
-#endif
+ LOG_DISAS("mtc0 %s (reg %d sel %d)\n", rn, reg, sel);
generate_exception(ctx, EXCP_RI);
}
@@ -4486,21 +4451,11 @@ static void gen_dmfc0 (CPUState *env, DisasContext *ctx, TCGv t0, int reg, int s
default:
goto die;
}
-#if defined MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "dmfc0 %s (reg %d sel %d)\n",
- rn, reg, sel);
- }
-#endif
+ LOG_DISAS("dmfc0 %s (reg %d sel %d)\n", rn, reg, sel);
return;
die:
-#if defined MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "dmfc0 %s (reg %d sel %d)\n",
- rn, reg, sel);
- }
-#endif
+ LOG_DISAS("dmfc0 %s (reg %d sel %d)\n", rn, reg, sel);
generate_exception(ctx, EXCP_RI);
}
@@ -5077,12 +5032,7 @@ static void gen_dmtc0 (CPUState *env, DisasContext *ctx, TCGv t0, int reg, int s
default:
goto die;
}
-#if defined MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "dmtc0 %s (reg %d sel %d)\n",
- rn, reg, sel);
- }
-#endif
+ LOG_DISAS("dmtc0 %s (reg %d sel %d)\n", rn, reg, sel);
/* For simplicity assume that all writes can cause interrupts. */
if (use_icount) {
gen_io_end();
@@ -5091,12 +5041,7 @@ static void gen_dmtc0 (CPUState *env, DisasContext *ctx, TCGv t0, int reg, int s
return;
die:
-#if defined MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "dmtc0 %s (reg %d sel %d)\n",
- rn, reg, sel);
- }
-#endif
+ LOG_DISAS("dmtc0 %s (reg %d sel %d)\n", rn, reg, sel);
generate_exception(ctx, EXCP_RI);
}
#endif /* TARGET_MIPS64 */
@@ -5254,24 +5199,14 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd,
default:
goto die;
}
-#if defined MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "mftr (reg %d u %d sel %d h %d)\n",
- rt, u, sel, h);
- }
-#endif
+ LOG_DISAS("mftr (reg %d u %d sel %d h %d)\n", rt, u, sel, h);
gen_store_gpr(t0, rd);
tcg_temp_free(t0);
return;
die:
tcg_temp_free(t0);
-#if defined MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "mftr (reg %d u %d sel %d h %d)\n",
- rt, u, sel, h);
- }
-#endif
+ LOG_DISAS("mftr (reg %d u %d sel %d h %d)\n", rt, u, sel, h);
generate_exception(ctx, EXCP_RI);
}
@@ -5429,23 +5364,13 @@ static void gen_mttr(CPUState *env, DisasContext *ctx, int rd, int rt,
default:
goto die;
}
-#if defined MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "mttr (reg %d u %d sel %d h %d)\n",
- rd, u, sel, h);
- }
-#endif
+ LOG_DISAS("mttr (reg %d u %d sel %d h %d)\n", rd, u, sel, h);
tcg_temp_free(t0);
return;
die:
tcg_temp_free(t0);
-#if defined MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "mttr (reg %d u %d sel %d h %d)\n",
- rd, u, sel, h);
- }
-#endif
+ LOG_DISAS("mttr (reg %d u %d sel %d h %d)\n", rd, u, sel, h);
generate_exception(ctx, EXCP_RI);
}
@@ -5763,7 +5688,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
gen_load_fpr32(fp0, fs);
tcg_gen_ext_i32_tl(t0, fp0);
tcg_temp_free_i32(fp0);
- }
+ }
gen_store_gpr(t0, rt);
opn = "mfc1";
break;
@@ -5775,7 +5700,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
tcg_gen_trunc_tl_i32(fp0, t0);
gen_store_fpr32(fp0, fs);
tcg_temp_free_i32(fp0);
- }
+ }
opn = "mtc1";
break;
case OPC_CFC1:
@@ -5795,7 +5720,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
gen_load_fpr64(ctx, fp0, fs);
tcg_gen_trunc_i64_tl(t0, fp0);
tcg_temp_free_i64(fp0);
- }
+ }
gen_store_gpr(t0, rt);
opn = "dmfc1";
break;
@@ -5807,7 +5732,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
tcg_gen_extu_tl_i64(fp0, t0);
gen_store_fpr64(ctx, fp0, fs);
tcg_temp_free_i64(fp0);
- }
+ }
opn = "dmtc1";
break;
case OPC_MFHC1:
@@ -5817,7 +5742,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
gen_load_fpr32h(fp0, fs);
tcg_gen_ext_i32_tl(t0, fp0);
tcg_temp_free_i32(fp0);
- }
+ }
gen_store_gpr(t0, rt);
opn = "mfhc1";
break;
@@ -5829,7 +5754,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
tcg_gen_trunc_tl_i32(fp0, t0);
gen_store_fpr32h(fp0, fs);
tcg_temp_free_i32(fp0);
- }
+ }
opn = "mthc1";
break;
default:
@@ -7259,9 +7184,8 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
} else if (index == 0) {
gen_load_gpr(t0, base);
} else {
- gen_load_gpr(t0, base);
- gen_load_gpr(t1, index);
- gen_op_addr_add(ctx, t0, t1);
+ gen_load_gpr(t0, index);
+ gen_op_addr_add(ctx, t0, cpu_gpr[base]);
}
/* Don't do NOP if destination is zero: we must perform the actual
memory access. */
@@ -8249,8 +8173,8 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
int num_insns;
int max_insns;
- if (search_pc && loglevel)
- fprintf (logfile, "search pc %d\n", search_pc);
+ if (search_pc)
+ qemu_log("search pc %d\n", search_pc);
pc_start = tb->pc;
/* Leave some spare opc slots for branch handling. */
@@ -8272,17 +8196,11 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
if (max_insns == 0)
max_insns = CF_COUNT_MASK;
#ifdef DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_CPU) {
- fprintf(logfile, "------------------------------------------------\n");
- /* FIXME: This may print out stale hflags from env... */
- cpu_dump_state(env, logfile, fprintf, 0);
- }
-#endif
-#ifdef MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile, "\ntb %p idx %d hflags %04x\n",
- tb, ctx.mem_idx, ctx.hflags);
+ qemu_log_mask(CPU_LOG_TB_CPU, "------------------------------------------------\n");
+ /* FIXME: This may print out stale hflags from env... */
+ log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0);
#endif
+ LOG_DISAS("\ntb %p idx %d hflags %04x\n", tb, ctx.mem_idx, ctx.hflags);
gen_icount_start();
while (ctx.bstate == BS_NONE) {
if (unlikely(!TAILQ_EMPTY(&env->breakpoints))) {
@@ -8339,7 +8257,7 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
save_cpu_state(&ctx, ctx.bstate == BS_NONE);
gen_helper_0i(raise_exception, EXCP_DEBUG);
} else {
- switch (ctx.bstate) {
+ switch (ctx.bstate) {
case BS_STOP:
gen_helper_interrupt_restart();
gen_goto_tb(&ctx, 0, ctx.pc);
@@ -8355,7 +8273,7 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb,
case BS_BRANCH:
default:
break;
- }
+ }
}
done_generating:
gen_icount_end(tb, num_insns);
@@ -8370,18 +8288,13 @@ done_generating:
tb->icount = num_insns;
}
#ifdef DEBUG_DISAS
-#if defined MIPS_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile, "\n");
-#endif
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
- target_disas(logfile, pc_start, ctx.pc - pc_start, 0);
- fprintf(logfile, "\n");
- }
- if (loglevel & CPU_LOG_TB_CPU) {
- fprintf(logfile, "---------------- %d %08x\n", ctx.bstate, ctx.hflags);
+ LOG_DISAS("\n");
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ qemu_log("IN: %s\n", lookup_symbol(pc_start));
+ log_target_disas(pc_start, ctx.pc - pc_start, 0);
+ qemu_log("\n");
}
+ qemu_log_mask(CPU_LOG_TB_CPU, "---------------- %d %08x\n", ctx.bstate, ctx.hflags);
#endif
}
@@ -8499,7 +8412,7 @@ static void mips_tcg_init(void)
/* Initialize various static tables. */
if (inited)
- return;
+ return;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
for (i = 0; i < 32; i++)
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index d0243aa1d..1400414a1 100644
--- a/target-mips/translate_init.c
+++ b/target-mips/translate_init.c
@@ -102,8 +102,8 @@ static const mips_def_t mips_defs[] =
.CP0_PRid = 0x00018000,
.CP0_Config0 = MIPS_CONFIG0 | (MMU_TYPE_R4000 << CP0C0_MT),
.CP0_Config1 = MIPS_CONFIG1 | (15 << CP0C1_MMU) |
- (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
- (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
+ (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
+ (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
.CP0_Config2 = MIPS_CONFIG2,
.CP0_Config3 = MIPS_CONFIG3,
.SYNCI_Step = 32,
@@ -121,8 +121,8 @@ static const mips_def_t mips_defs[] =
no virtual icache, uncached coherency. */
.CP0_Config0 = MIPS_CONFIG0 | (MMU_TYPE_FMT << CP0C0_MT),
.CP0_Config1 = MIPS_CONFIG1 |
- (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
- (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
+ (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
+ (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
.CP0_Config2 = MIPS_CONFIG2,
.CP0_Config3 = MIPS_CONFIG3,
.SYNCI_Step = 32,
@@ -138,8 +138,8 @@ static const mips_def_t mips_defs[] =
.CP0_PRid = 0x00018400,
.CP0_Config0 = MIPS_CONFIG0 | (MMU_TYPE_R4000 << CP0C0_MT),
.CP0_Config1 = MIPS_CONFIG1 | (15 << CP0C1_MMU) |
- (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
- (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
+ (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
+ (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
.CP0_Config2 = MIPS_CONFIG2,
.CP0_Config3 = MIPS_CONFIG3,
.SYNCI_Step = 32,
@@ -155,8 +155,8 @@ static const mips_def_t mips_defs[] =
.CP0_PRid = 0x00018500,
.CP0_Config0 = MIPS_CONFIG0 | (MMU_TYPE_FMT << CP0C0_MT),
.CP0_Config1 = MIPS_CONFIG1 |
- (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
- (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
+ (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
+ (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
.CP0_Config2 = MIPS_CONFIG2,
.CP0_Config3 = MIPS_CONFIG3,
.SYNCI_Step = 32,
@@ -173,8 +173,8 @@ static const mips_def_t mips_defs[] =
.CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
(MMU_TYPE_R4000 << CP0C0_MT),
.CP0_Config1 = MIPS_CONFIG1 | (15 << CP0C1_MMU) |
- (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
- (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
+ (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
+ (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
.CP0_Config2 = MIPS_CONFIG2,
.CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt),
.SYNCI_Step = 32,
@@ -189,10 +189,10 @@ static const mips_def_t mips_defs[] =
.name = "4KEm",
.CP0_PRid = 0x00019100,
.CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
- (MMU_TYPE_FMT << CP0C0_MT),
+ (MMU_TYPE_FMT << CP0C0_MT),
.CP0_Config1 = MIPS_CONFIG1 |
- (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
- (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
+ (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
+ (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
.CP0_Config2 = MIPS_CONFIG2,
.CP0_Config3 = MIPS_CONFIG3,
.SYNCI_Step = 32,
@@ -207,10 +207,10 @@ static const mips_def_t mips_defs[] =
.name = "24Kc",
.CP0_PRid = 0x00019300,
.CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
- (MMU_TYPE_R4000 << CP0C0_MT),
+ (MMU_TYPE_R4000 << CP0C0_MT),
.CP0_Config1 = MIPS_CONFIG1 | (15 << CP0C1_MMU) |
- (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
- (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
+ (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
+ (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
.CP0_Config2 = MIPS_CONFIG2,
.CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt),
.SYNCI_Step = 32,
@@ -228,8 +228,8 @@ static const mips_def_t mips_defs[] =
.CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
(MMU_TYPE_R4000 << CP0C0_MT),
.CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
- (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
- (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
+ (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
+ (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
.CP0_Config2 = MIPS_CONFIG2,
.CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt),
.SYNCI_Step = 32,
@@ -247,10 +247,10 @@ static const mips_def_t mips_defs[] =
.name = "34Kf",
.CP0_PRid = 0x00019500,
.CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
- (MMU_TYPE_R4000 << CP0C0_MT),
+ (MMU_TYPE_R4000 << CP0C0_MT),
.CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) |
- (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
- (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
+ (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
+ (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA),
.CP0_Config2 = MIPS_CONFIG2,
.CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt) | (1 << CP0C3_MT),
.SYNCI_Step = 32,
@@ -293,12 +293,12 @@ static const mips_def_t mips_defs[] =
.CP0_PRid = 0x00000400,
/* No L2 cache, icache size 8k, dcache size 8k, uncached coherency. */
.CP0_Config0 = (1 << 17) | (0x1 << 9) | (0x1 << 6) | (0x2 << CP0C0_K0),
- /* Note: Config1 is only used internally, the R4000 has only Config0. */
+ /* Note: Config1 is only used internally, the R4000 has only Config0. */
.CP0_Config1 = (1 << CP0C1_FP) | (47 << CP0C1_MMU),
.SYNCI_Step = 16,
.CCRes = 2,
.CP0_Status_rw_bitmask = 0x3678FFFF,
- /* The R4000 has a full 64bit FPU but doesn't use the fcr0 bits. */
+ /* The R4000 has a full 64bit FPU but doesn't use the fcr0 bits. */
.CP1_fcr0 = (0x5 << FCR0_PRID) | (0x0 << FCR0_REV),
.SEGBITS = 40,
.PABITS = 36,
@@ -325,11 +325,11 @@ static const mips_def_t mips_defs[] =
.name = "5Kc",
.CP0_PRid = 0x00018100,
.CP0_Config0 = MIPS_CONFIG0 | (0x2 << CP0C0_AT) |
- (MMU_TYPE_R4000 << CP0C0_MT),
+ (MMU_TYPE_R4000 << CP0C0_MT),
.CP0_Config1 = MIPS_CONFIG1 | (31 << CP0C1_MMU) |
- (1 << CP0C1_IS) | (4 << CP0C1_IL) | (1 << CP0C1_IA) |
- (1 << CP0C1_DS) | (4 << CP0C1_DL) | (1 << CP0C1_DA) |
- (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
+ (1 << CP0C1_IS) | (4 << CP0C1_IL) | (1 << CP0C1_IA) |
+ (1 << CP0C1_DS) | (4 << CP0C1_DL) | (1 << CP0C1_DA) |
+ (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
.CP0_Config2 = MIPS_CONFIG2,
.CP0_Config3 = MIPS_CONFIG3,
.SYNCI_Step = 32,
@@ -344,17 +344,17 @@ static const mips_def_t mips_defs[] =
.name = "5Kf",
.CP0_PRid = 0x00018100,
.CP0_Config0 = MIPS_CONFIG0 | (0x2 << CP0C0_AT) |
- (MMU_TYPE_R4000 << CP0C0_MT),
+ (MMU_TYPE_R4000 << CP0C0_MT),
.CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (31 << CP0C1_MMU) |
- (1 << CP0C1_IS) | (4 << CP0C1_IL) | (1 << CP0C1_IA) |
- (1 << CP0C1_DS) | (4 << CP0C1_DL) | (1 << CP0C1_DA) |
- (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
+ (1 << CP0C1_IS) | (4 << CP0C1_IL) | (1 << CP0C1_IA) |
+ (1 << CP0C1_DS) | (4 << CP0C1_DL) | (1 << CP0C1_DA) |
+ (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
.CP0_Config2 = MIPS_CONFIG2,
.CP0_Config3 = MIPS_CONFIG3,
.SYNCI_Step = 32,
.CCRes = 2,
.CP0_Status_rw_bitmask = 0x36F8FFFF,
- /* The 5Kf has F64 / L / W but doesn't use the fcr0 bits. */
+ /* The 5Kf has F64 / L / W but doesn't use the fcr0 bits. */
.CP1_fcr0 = (1 << FCR0_D) | (1 << FCR0_S) |
(0x81 << FCR0_PRID) | (0x0 << FCR0_REV),
.SEGBITS = 42,
@@ -364,21 +364,21 @@ static const mips_def_t mips_defs[] =
},
{
.name = "20Kc",
- /* We emulate a later version of the 20Kc, earlier ones had a broken
+ /* We emulate a later version of the 20Kc, earlier ones had a broken
WAIT instruction. */
.CP0_PRid = 0x000182a0,
.CP0_Config0 = MIPS_CONFIG0 | (0x2 << CP0C0_AT) |
(MMU_TYPE_R4000 << CP0C0_MT) | (1 << CP0C0_VI),
.CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (47 << CP0C1_MMU) |
- (2 << CP0C1_IS) | (4 << CP0C1_IL) | (3 << CP0C1_IA) |
- (2 << CP0C1_DS) | (4 << CP0C1_DL) | (3 << CP0C1_DA) |
- (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
+ (2 << CP0C1_IS) | (4 << CP0C1_IL) | (3 << CP0C1_IA) |
+ (2 << CP0C1_DS) | (4 << CP0C1_DL) | (3 << CP0C1_DA) |
+ (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
.CP0_Config2 = MIPS_CONFIG2,
.CP0_Config3 = MIPS_CONFIG3,
.SYNCI_Step = 32,
.CCRes = 1,
.CP0_Status_rw_bitmask = 0x36FBFFFF,
- /* The 20Kc has F64 / L / W but doesn't use the fcr0 bits. */
+ /* The 20Kc has F64 / L / W but doesn't use the fcr0 bits. */
.CP1_fcr0 = (1 << FCR0_3D) | (1 << FCR0_PS) |
(1 << FCR0_D) | (1 << FCR0_S) |
(0x82 << FCR0_PRID) | (0x0 << FCR0_REV),
@@ -388,16 +388,16 @@ static const mips_def_t mips_defs[] =
.mmu_type = MMU_TYPE_R4000,
},
{
- /* A generic CPU providing MIPS64 Release 2 features.
+ /* A generic CPU providing MIPS64 Release 2 features.
FIXME: Eventually this should be replaced by a real CPU model. */
.name = "MIPS64R2-generic",
.CP0_PRid = 0x00010000,
.CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) | (0x2 << CP0C0_AT) |
- (MMU_TYPE_R4000 << CP0C0_MT),
+ (MMU_TYPE_R4000 << CP0C0_MT),
.CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (63 << CP0C1_MMU) |
- (2 << CP0C1_IS) | (4 << CP0C1_IL) | (3 << CP0C1_IA) |
- (2 << CP0C1_DS) | (4 << CP0C1_DL) | (3 << CP0C1_DA) |
- (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
+ (2 << CP0C1_IS) | (4 << CP0C1_IL) | (3 << CP0C1_IA) |
+ (2 << CP0C1_DS) | (4 << CP0C1_DL) | (3 << CP0C1_DA) |
+ (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP),
.CP0_Config2 = MIPS_CONFIG2,
.CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_LPA),
.SYNCI_Step = 32,
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index a953e1fa7..2bf765092 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -39,6 +39,40 @@
//#define DEBUG_EXCEPTIONS
//#define FLUSH_ALL_TLBS
+#ifdef DEBUG_MMU
+# define LOG_MMU(...) qemu_log(__VA_ARGS__)
+# define LOG_MMU_STATE(env) log_cpu_state((env), 0)
+#else
+# define LOG_MMU(...) do { } while (0)
+# define LOG_MMU_STATE(...) do { } while (0)
+#endif
+
+
+#ifdef DEBUG_SOFTWARE_TLB
+# define LOG_SWTLB(...) qemu_log(__VA_ARGS__)
+#else
+# define LOG_SWTLB(...) do { } while (0)
+#endif
+
+#ifdef DEBUG_BATS
+# define LOG_BATS(...) qemu_log(__VA_ARGS__)
+#else
+# define LOG_BATS(...) do { } while (0)
+#endif
+
+#ifdef DEBUG_SLB
+# define LOG_SLB(...) qemu_log(__VA_ARGS__)
+#else
+# define LOG_SLB(...) do { } while (0)
+#endif
+
+#ifdef DEBUG_EXCEPTIONS
+# define LOG_EXCP(...) qemu_log(__VA_ARGS__)
+#else
+# define LOG_EXCP(...) do { } while (0)
+#endif
+
+
/*****************************************************************************/
/* PowerPC MMU emulation */
@@ -205,8 +239,7 @@ static always_inline int _pte_check (mmu_ctx_t *ctx, int is_64b,
if (ctx->raddr != (target_phys_addr_t)-1ULL) {
/* all matches should have equal RPN, WIMG & PP */
if ((ctx->raddr & mmask) != (pte1 & mmask)) {
- if (loglevel != 0)
- fprintf(logfile, "Bad RPN/WIMG/PP\n");
+ qemu_log("Bad RPN/WIMG/PP\n");
return -3;
}
}
@@ -218,16 +251,10 @@ static always_inline int _pte_check (mmu_ctx_t *ctx, int is_64b,
ret = check_prot(ctx->prot, rw, type);
if (ret == 0) {
/* Access granted */
-#if defined (DEBUG_MMU)
- if (loglevel != 0)
- fprintf(logfile, "PTE access granted !\n");
-#endif
+ LOG_MMU("PTE access granted !\n");
} else {
/* Access right violation */
-#if defined (DEBUG_MMU)
- if (loglevel != 0)
- fprintf(logfile, "PTE access rejected\n");
-#endif
+ LOG_MMU("PTE access rejected\n");
}
}
}
@@ -298,11 +325,7 @@ static always_inline void ppc6xx_tlb_invalidate_all (CPUState *env)
ppc6xx_tlb_t *tlb;
int nr, max;
-#if defined (DEBUG_SOFTWARE_TLB) && 0
- if (loglevel != 0) {
- fprintf(logfile, "Invalidate all TLBs\n");
- }
-#endif
+ //LOG_SWTLB("Invalidate all TLBs\n");
/* Invalidate all defined software TLB */
max = env->nb_tlb;
if (env->id_tlbs == 1)
@@ -328,12 +351,8 @@ static always_inline void __ppc6xx_tlb_invalidate_virt (CPUState *env,
nr = ppc6xx_tlb_getnum(env, eaddr, way, is_code);
tlb = &env->tlb[nr].tlb6;
if (pte_is_valid(tlb->pte0) && (match_epn == 0 || eaddr == tlb->EPN)) {
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "TLB invalidate %d/%d " ADDRX "\n",
+ LOG_SWTLB("TLB invalidate %d/%d " ADDRX "\n",
nr, env->nb_tlb, eaddr);
- }
-#endif
pte_invalidate(&tlb->pte0);
tlb_flush_page(env, tlb->EPN);
}
@@ -359,12 +378,8 @@ void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code,
nr = ppc6xx_tlb_getnum(env, EPN, way, is_code);
tlb = &env->tlb[nr].tlb6;
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "Set TLB %d/%d EPN " ADDRX " PTE0 " ADDRX
+ LOG_SWTLB("Set TLB %d/%d EPN " ADDRX " PTE0 " ADDRX
" PTE1 " ADDRX "\n", nr, env->nb_tlb, EPN, pte0, pte1);
- }
-#endif
/* Invalidate any pending reference in Qemu for this virtual address */
__ppc6xx_tlb_invalidate_virt(env, EPN, is_code, 1);
tlb->pte0 = pte0;
@@ -390,27 +405,19 @@ static always_inline int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx,
tlb = &env->tlb[nr].tlb6;
/* This test "emulates" the PTE index match for hardware TLBs */
if ((eaddr & TARGET_PAGE_MASK) != tlb->EPN) {
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "TLB %d/%d %s [" ADDRX " " ADDRX
+ LOG_SWTLB("TLB %d/%d %s [" ADDRX " " ADDRX
"] <> " ADDRX "\n",
nr, env->nb_tlb,
pte_is_valid(tlb->pte0) ? "valid" : "inval",
tlb->EPN, tlb->EPN + TARGET_PAGE_SIZE, eaddr);
- }
-#endif
continue;
}
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "TLB %d/%d %s " ADDRX " <> " ADDRX " " ADDRX
+ LOG_SWTLB("TLB %d/%d %s " ADDRX " <> " ADDRX " " ADDRX
" %c %c\n",
nr, env->nb_tlb,
pte_is_valid(tlb->pte0) ? "valid" : "inval",
tlb->EPN, eaddr, tlb->pte1,
rw ? 'S' : 'L', access_type == ACCESS_CODE ? 'I' : 'D');
- }
-#endif
switch (pte32_check(ctx, tlb->pte0, tlb->pte1, 0, rw, access_type)) {
case -3:
/* TLB inconsistency */
@@ -437,12 +444,8 @@ static always_inline int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx,
}
if (best != -1) {
done:
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "found TLB at addr " PADDRX " prot=%01x ret=%d\n",
+ LOG_SWTLB("found TLB at addr " PADDRX " prot=%01x ret=%d\n",
ctx->raddr & TARGET_PAGE_MASK, ctx->prot, ret);
- }
-#endif
/* Update page flags */
pte_update_flags(ctx, &env->tlb[best].tlb6.pte1, ret, rw);
}
@@ -485,12 +488,8 @@ static always_inline void bat_601_size_prot (CPUState *env,target_ulong *blp,
int key, pp, valid, prot;
bl = (*BATl & 0x0000003F) << 17;
-#if defined (DEBUG_BATS)
- if (loglevel != 0) {
- fprintf(logfile, "b %02x ==> bl " ADDRX " msk " ADDRX "\n",
+ LOG_BATS("b %02x ==> bl " ADDRX " msk " ADDRX "\n",
(uint8_t)(*BATl & 0x0000003F), bl, ~bl);
- }
-#endif
prot = 0;
valid = (*BATl >> 6) & 1;
if (valid) {
@@ -514,12 +513,8 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
int i, valid, prot;
int ret = -1;
-#if defined (DEBUG_BATS)
- if (loglevel != 0) {
- fprintf(logfile, "%s: %cBAT v " ADDRX "\n", __func__,
+ LOG_BATS("%s: %cBAT v " ADDRX "\n", __func__,
type == ACCESS_CODE ? 'I' : 'D', virtual);
- }
-#endif
switch (type) {
case ACCESS_CODE:
BATlt = env->IBAT[1];
@@ -541,13 +536,9 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
} else {
bat_size_prot(env, &bl, &valid, &prot, BATu, BATl);
}
-#if defined (DEBUG_BATS)
- if (loglevel != 0) {
- fprintf(logfile, "%s: %cBAT%d v " ADDRX " BATu " ADDRX
+ LOG_BATS("%s: %cBAT%d v " ADDRX " BATu " ADDRX
" BATl " ADDRX "\n", __func__,
type == ACCESS_CODE ? 'I' : 'D', i, virtual, *BATu, *BATl);
- }
-#endif
if ((virtual & 0xF0000000) == BEPIu &&
((virtual & 0x0FFE0000) & ~bl) == BEPIl) {
/* BAT matches */
@@ -559,28 +550,25 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
/* Compute access rights */
ctx->prot = prot;
ret = check_prot(ctx->prot, rw, type);
-#if defined (DEBUG_BATS)
- if (ret == 0 && loglevel != 0) {
- fprintf(logfile, "BAT %d match: r " PADDRX " prot=%c%c\n",
- i, ctx->raddr, ctx->prot & PAGE_READ ? 'R' : '-',
- ctx->prot & PAGE_WRITE ? 'W' : '-');
- }
-#endif
+ if (ret == 0)
+ LOG_BATS("BAT %d match: r " PADDRX " prot=%c%c\n",
+ i, ctx->raddr, ctx->prot & PAGE_READ ? 'R' : '-',
+ ctx->prot & PAGE_WRITE ? 'W' : '-');
break;
}
}
}
if (ret < 0) {
-#if defined (DEBUG_BATS)
- if (loglevel != 0) {
- fprintf(logfile, "no BAT match for " ADDRX ":\n", virtual);
+#if defined(DEBUG_BATS)
+ if (IS_LOGGING) {
+ QEMU_LOG0("no BAT match for " ADDRX ":\n", virtual);
for (i = 0; i < 4; i++) {
BATu = &BATut[i];
BATl = &BATlt[i];
BEPIu = *BATu & 0xF0000000;
BEPIl = *BATu & 0x0FFE0000;
bl = (*BATu & 0x00001FFC) << 15;
- fprintf(logfile, "%s: %cBAT%d v " ADDRX " BATu " ADDRX
+ QEMU_LOG0("%s: %cBAT%d v " ADDRX " BATu " ADDRX
" BATl " ADDRX " \n\t" ADDRX " " ADDRX " " ADDRX "\n",
__func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual,
*BATu, *BATl, BEPIu, BEPIl, bl);
@@ -588,7 +576,6 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
}
#endif
}
-
/* No hit */
return ret;
}
@@ -609,30 +596,22 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h,
pte0 = ldq_phys(base + (i * 16));
pte1 = ldq_phys(base + (i * 16) + 8);
r = pte64_check(ctx, pte0, pte1, h, rw, type);
-#if defined (DEBUG_MMU)
- if (loglevel != 0) {
- fprintf(logfile, "Load pte from " ADDRX " => " ADDRX " " ADDRX
+ LOG_MMU("Load pte from " ADDRX " => " ADDRX " " ADDRX
" %d %d %d " ADDRX "\n",
base + (i * 16), pte0, pte1,
(int)(pte0 & 1), h, (int)((pte0 >> 1) & 1),
ctx->ptem);
- }
-#endif
} else
#endif
{
pte0 = ldl_phys(base + (i * 8));
pte1 = ldl_phys(base + (i * 8) + 4);
r = pte32_check(ctx, pte0, pte1, h, rw, type);
-#if defined (DEBUG_MMU)
- if (loglevel != 0) {
- fprintf(logfile, "Load pte from " ADDRX " => " ADDRX " " ADDRX
+ LOG_MMU("Load pte from " ADDRX " => " ADDRX " " ADDRX
" %d %d %d " ADDRX "\n",
base + (i * 8), pte0, pte1,
(int)(pte0 >> 31), h, (int)((pte0 >> 6) & 1),
ctx->ptem);
- }
-#endif
}
switch (r) {
case -3:
@@ -660,12 +639,8 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h,
}
if (good != -1) {
done:
-#if defined (DEBUG_MMU)
- if (loglevel != 0) {
- fprintf(logfile, "found PTE at addr " PADDRX " prot=%01x ret=%d\n",
+ LOG_MMU("found PTE at addr " PADDRX " prot=%01x ret=%d\n",
ctx->raddr, ctx->prot, ret);
- }
-#endif
/* Update page flags */
pte1 = ctx->raddr;
if (pte_update_flags(ctx, &pte1, ret, rw) == 1) {
@@ -729,22 +704,14 @@ static always_inline int slb_lookup (CPUPPCState *env, target_ulong eaddr,
ret = -5;
sr_base = env->spr[SPR_ASR];
-#if defined(DEBUG_SLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: eaddr " ADDRX " base " PADDRX "\n",
+ LOG_SLB("%s: eaddr " ADDRX " base " PADDRX "\n",
__func__, eaddr, sr_base);
- }
-#endif
mask = 0x0000000000000000ULL; /* Avoid gcc warning */
for (n = 0; n < env->slb_nr; n++) {
tmp64 = ldq_phys(sr_base);
tmp = ldl_phys(sr_base + 8);
-#if defined(DEBUG_SLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: seg %d " PADDRX " %016" PRIx64 " %08"
+ LOG_SLB("%s: seg %d " PADDRX " %016" PRIx64 " %08"
PRIx32 "\n", __func__, n, sr_base, tmp64, tmp);
- }
-#endif
if (slb_is_valid(tmp64)) {
/* SLB entry is valid */
switch (tmp64 & 0x0000000006000000ULL) {
@@ -848,12 +815,8 @@ target_ulong ppc_load_slb (CPUPPCState *env, int slb_nr)
} else {
rt = 0;
}
-#if defined(DEBUG_SLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: " PADDRX " %016" PRIx64 " %08" PRIx32 " => %d "
+ LOG_SLB("%s: " PADDRX " %016" PRIx64 " %08" PRIx32 " => %d "
ADDRX "\n", __func__, sr_base, tmp64, tmp, slb_nr, rt);
- }
-#endif
return rt;
}
@@ -875,13 +838,9 @@ void ppc_store_slb (CPUPPCState *env, int slb_nr, target_ulong rs)
tmp64 |= 1 << 27;
/* Set ESID */
tmp64 |= (uint32_t)slb_nr << 28;
-#if defined(DEBUG_SLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: %d " ADDRX " => " PADDRX " %016" PRIx64
+ LOG_SLB("%s: %d " ADDRX " => " PADDRX " %016" PRIx64
" %08" PRIx32 "\n", __func__,
slb_nr, rs, sr_base, tmp64, tmp);
- }
-#endif
/* Write SLB entry to memory */
stq_phys(sr_base, tmp64);
stl_phys(sr_base + 8, tmp);
@@ -911,11 +870,7 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
pr = msr_pr;
#if defined(TARGET_PPC64)
if (env->mmu_model & POWERPC_MMU_64) {
-#if defined (DEBUG_MMU)
- if (loglevel != 0) {
- fprintf(logfile, "Check SLBs\n");
- }
-#endif
+ LOG_MMU("Check SLBs\n");
ret = slb_lookup(env, eaddr, &vsid, &page_mask, &attr);
if (ret < 0)
return ret;
@@ -941,22 +896,14 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
vsid_sh = 6;
sdr_sh = 16;
sdr_mask = 0xFFC0;
-#if defined (DEBUG_MMU)
- if (loglevel != 0) {
- fprintf(logfile, "Check segment v=" ADDRX " %d " ADDRX
+ LOG_MMU("Check segment v=" ADDRX " %d " ADDRX
" nip=" ADDRX " lr=" ADDRX " ir=%d dr=%d pr=%d %d t=%d\n",
eaddr, (int)(eaddr >> 28), sr, env->nip,
env->lr, (int)msr_ir, (int)msr_dr, pr != 0 ? 1 : 0,
rw, type);
- }
-#endif
}
-#if defined (DEBUG_MMU)
- if (loglevel != 0) {
- fprintf(logfile, "pte segment: key=%d ds %d nx %d vsid " ADDRX "\n",
+ LOG_MMU("pte segment: key=%d ds %d nx %d vsid " ADDRX "\n",
ctx->key, ds, ctx->nx, vsid);
- }
-#endif
ret = -1;
if (!ds) {
/* Check if instruction fetch is allowed, if needed */
@@ -977,23 +924,15 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
hash = ((vsid ^ pgidx) << vsid_sh) & vsid_mask;
}
mask = (htab_mask << sdr_sh) | sdr_mask;
-#if defined (DEBUG_MMU)
- if (loglevel != 0) {
- fprintf(logfile, "sdr " PADDRX " sh %d hash " PADDRX
+ LOG_MMU("sdr " PADDRX " sh %d hash " PADDRX
" mask " PADDRX " " ADDRX "\n",
sdr, sdr_sh, hash, mask, page_mask);
- }
-#endif
ctx->pg_addr[0] = get_pgaddr(sdr, sdr_sh, hash, mask);
/* Secondary table address */
hash = (~hash) & vsid_mask;
-#if defined (DEBUG_MMU)
- if (loglevel != 0) {
- fprintf(logfile, "sdr " PADDRX " sh %d hash " PADDRX
+ LOG_MMU("sdr " PADDRX " sh %d hash " PADDRX
" mask " PADDRX "\n",
sdr, sdr_sh, hash, mask);
- }
-#endif
ctx->pg_addr[1] = get_pgaddr(sdr, sdr_sh, hash, mask);
#if defined(TARGET_PPC64)
if (env->mmu_model & POWERPC_MMU_64) {
@@ -1011,37 +950,30 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
/* Software TLB search */
ret = ppc6xx_tlb_check(env, ctx, eaddr, rw, type);
} else {
-#if defined (DEBUG_MMU)
- if (loglevel != 0) {
- fprintf(logfile, "0 sdr1=" PADDRX " vsid=" ADDRX " "
+ LOG_MMU("0 sdr1=" PADDRX " vsid=" ADDRX " "
"api=" ADDRX " hash=" PADDRX
" pg_addr=" PADDRX "\n",
sdr, vsid, pgidx, hash, ctx->pg_addr[0]);
- }
-#endif
/* Primary table lookup */
ret = find_pte(env, ctx, 0, rw, type);
if (ret < 0) {
/* Secondary table lookup */
-#if defined (DEBUG_MMU)
- if (eaddr != 0xEFFFFFFF && loglevel != 0) {
- fprintf(logfile, "1 sdr1=" PADDRX " vsid=" ADDRX " "
+ if (eaddr != 0xEFFFFFFF)
+ LOG_MMU("1 sdr1=" PADDRX " vsid=" ADDRX " "
"api=" ADDRX " hash=" PADDRX
" pg_addr=" PADDRX "\n",
sdr, vsid, pgidx, hash, ctx->pg_addr[1]);
- }
-#endif
ret2 = find_pte(env, ctx, 1, rw, type);
if (ret2 != -1)
ret = ret2;
}
}
#if defined (DUMP_PAGE_TABLES)
- if (loglevel != 0) {
+ if (qemu_log_enabled()) {
target_phys_addr_t curaddr;
uint32_t a0, a1, a2, a3;
- fprintf(logfile, "Page table: " PADDRX " len " PADDRX "\n",
- sdr, mask + 0x80);
+ qemu_log("Page table: " PADDRX " len " PADDRX "\n",
+ sdr, mask + 0x80);
for (curaddr = sdr; curaddr < (sdr + mask + 0x80);
curaddr += 16) {
a0 = ldl_phys(curaddr);
@@ -1049,24 +981,18 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
a2 = ldl_phys(curaddr + 8);
a3 = ldl_phys(curaddr + 12);
if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) {
- fprintf(logfile, PADDRX ": %08x %08x %08x %08x\n",
- curaddr, a0, a1, a2, a3);
+ qemu_log(PADDRX ": %08x %08x %08x %08x\n",
+ curaddr, a0, a1, a2, a3);
}
}
}
#endif
} else {
-#if defined (DEBUG_MMU)
- if (loglevel != 0)
- fprintf(logfile, "No access allowed\n");
-#endif
+ LOG_MMU("No access allowed\n");
ret = -3;
}
} else {
-#if defined (DEBUG_MMU)
- if (loglevel != 0)
- fprintf(logfile, "direct store...\n");
-#endif
+ LOG_MMU("direct store...\n");
/* Direct-store segment : absolutely *BUGGY* for now */
switch (type) {
case ACCESS_INT:
@@ -1092,10 +1018,8 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
/* eciwx or ecowx */
return -4;
default:
- if (logfile) {
- fprintf(logfile, "ERROR: instruction should not need "
+ qemu_log("ERROR: instruction should not need "
"address translation\n");
- }
return -4;
}
if ((rw == 1 || ctx->key != 1) && (rw == 0 || ctx->key != 0)) {
@@ -1119,18 +1043,13 @@ static always_inline int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb,
/* Check valid flag */
if (!(tlb->prot & PAGE_VALID)) {
- if (loglevel != 0)
- fprintf(logfile, "%s: TLB %d not valid\n", __func__, i);
+ qemu_log("%s: TLB %d not valid\n", __func__, i);
return -1;
}
mask = ~(tlb->size - 1);
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: TLB %d address " ADDRX " PID %u <=> " ADDRX
+ LOG_SWTLB("%s: TLB %d address " ADDRX " PID %u <=> " ADDRX
" " ADDRX " %u\n",
__func__, i, address, pid, tlb->EPN, mask, (uint32_t)tlb->PID);
- }
-#endif
/* Check PID */
if (tlb->PID != 0 && tlb->PID != pid)
return -1;
@@ -1223,12 +1142,8 @@ static int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
continue;
zsel = (tlb->attr >> 4) & 0xF;
zpr = (env->spr[SPR_40x_ZPR] >> (28 - (2 * zsel))) & 0x3;
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: TLB %d zsel %d zpr %d rw %d attr %08x\n",
+ LOG_SWTLB("%s: TLB %d zsel %d zpr %d rw %d attr %08x\n",
__func__, i, zsel, zpr, rw, tlb->attr);
- }
-#endif
/* Check execute enable bit */
switch (zpr) {
case 0x2:
@@ -1258,23 +1173,15 @@ static int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
}
if (ret >= 0) {
ctx->raddr = raddr;
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: access granted " ADDRX " => " PADDRX
+ LOG_SWTLB("%s: access granted " ADDRX " => " PADDRX
" %d %d\n", __func__, address, ctx->raddr, ctx->prot,
ret);
- }
-#endif
return 0;
}
}
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: access refused " ADDRX " => " PADDRX
+ LOG_SWTLB("%s: access refused " ADDRX " => " PADDRX
" %d %d\n", __func__, address, raddr, ctx->prot,
ret);
- }
-#endif
return ret;
}
@@ -1406,9 +1313,7 @@ int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr,
int ret;
#if 0
- if (loglevel != 0) {
- fprintf(logfile, "%s\n", __func__);
- }
+ qemu_log("%s\n", __func__);
#endif
if ((access_type == ACCESS_CODE && msr_ir == 0) ||
(access_type != ACCESS_CODE && msr_dr == 0)) {
@@ -1459,10 +1364,8 @@ int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr,
}
}
#if 0
- if (loglevel != 0) {
- fprintf(logfile, "%s address " ADDRX " => %d " PADDRX "\n",
+ qemu_log("%s address " ADDRX " => %d " PADDRX "\n",
__func__, eaddr, ret, ctx->raddr);
- }
#endif
return ret;
@@ -1500,10 +1403,7 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
ctx.raddr & TARGET_PAGE_MASK, ctx.prot,
mmu_idx, is_softmmu);
} else if (ret < 0) {
-#if defined (DEBUG_MMU)
- if (loglevel != 0)
- cpu_dump_state(env, logfile, fprintf, 0);
-#endif
+ LOG_MMU_STATE(env);
if (access_type == ACCESS_CODE) {
switch (ret) {
case -1:
@@ -1753,30 +1653,19 @@ static always_inline void do_invalidate_BAT (CPUPPCState *env,
base = BATu & ~0x0001FFFF;
end = base + mask + 0x00020000;
-#if defined (DEBUG_BATS)
- if (loglevel != 0) {
- fprintf(logfile, "Flush BAT from " ADDRX " to " ADDRX " (" ADDRX ")\n",
+ LOG_BATS("Flush BAT from " ADDRX " to " ADDRX " (" ADDRX ")\n",
base, end, mask);
- }
-#endif
for (page = base; page != end; page += TARGET_PAGE_SIZE)
tlb_flush_page(env, page);
-#if defined (DEBUG_BATS)
- if (loglevel != 0)
- fprintf(logfile, "Flush done\n");
-#endif
+ LOG_BATS("Flush done\n");
}
#endif
static always_inline void dump_store_bat (CPUPPCState *env, char ID,
int ul, int nr, target_ulong value)
{
-#if defined (DEBUG_BATS)
- if (loglevel != 0) {
- fprintf(logfile, "Set %cBAT%d%c to " ADDRX " (" ADDRX ")\n",
+ LOG_BATS("Set %cBAT%d%c to " ADDRX " (" ADDRX ")\n",
ID, nr, ul == 0 ? 'u' : 'l', value, env->nip);
- }
-#endif
}
void ppc_store_ibatu (CPUPPCState *env, int nr, target_ulong value)
@@ -1939,7 +1828,8 @@ void ppc_tlb_invalidate_all (CPUPPCState *env)
break;
case POWERPC_MMU_BOOKE_FSL:
/* XXX: TODO */
- cpu_abort(env, "BookE MMU model is not implemented\n");
+ if (!kvm_enabled())
+ cpu_abort(env, "BookE MMU model is not implemented\n");
break;
case POWERPC_MMU_32B:
case POWERPC_MMU_601:
@@ -2045,11 +1935,7 @@ void ppc_store_asr (CPUPPCState *env, target_ulong value)
void ppc_store_sdr1 (CPUPPCState *env, target_ulong value)
{
-#if defined (DEBUG_MMU)
- if (loglevel != 0) {
- fprintf(logfile, "%s: " ADDRX "\n", __func__, value);
- }
-#endif
+ LOG_MMU("%s: " ADDRX "\n", __func__, value);
if (env->sdr1 != value) {
/* XXX: for PowerPC 64, should check that the HTABSIZE value
* is <= 28
@@ -2061,12 +1947,8 @@ void ppc_store_sdr1 (CPUPPCState *env, target_ulong value)
void ppc_store_sr (CPUPPCState *env, int srnum, target_ulong value)
{
-#if defined (DEBUG_MMU)
- if (loglevel != 0) {
- fprintf(logfile, "%s: reg=%d " ADDRX " " ADDRX "\n",
+ LOG_MMU("%s: reg=%d " ADDRX " " ADDRX "\n",
__func__, srnum, value, env->sr[srnum]);
- }
-#endif
if (env->sr[srnum] != value) {
env->sr[srnum] = value;
#if !defined(FLUSH_ALL_TLBS) && 0
@@ -2108,7 +1990,7 @@ void ppc_hw_interrupt (CPUState *env)
#else /* defined (CONFIG_USER_ONLY) */
static always_inline void dump_syscall (CPUState *env)
{
- fprintf(logfile, "syscall r0=" REGX " r3=" REGX " r4=" REGX
+ qemu_log_mask(CPU_LOG_INT, "syscall r0=" REGX " r3=" REGX " r4=" REGX
" r5=" REGX " r6=" REGX " nip=" ADDRX "\n",
ppc_dump_gpr(env, 0), ppc_dump_gpr(env, 3), ppc_dump_gpr(env, 4),
ppc_dump_gpr(env, 5), ppc_dump_gpr(env, 6), env->nip);
@@ -2134,10 +2016,8 @@ static always_inline void powerpc_excp (CPUState *env,
lpes1 = 1;
}
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "Raise exception at " ADDRX " => %08x (%02x)\n",
- env->nip, excp, env->error_code);
- }
+ qemu_log_mask(CPU_LOG_INT, "Raise exception at " ADDRX " => %08x (%02x)\n",
+ env->nip, excp, env->error_code);
msr = env->msr;
new_msr = msr;
srr0 = SPR_SRR0;
@@ -2171,8 +2051,8 @@ static always_inline void powerpc_excp (CPUState *env,
/* Machine check exception is not enabled.
* Enter checkstop state.
*/
- if (loglevel != 0) {
- fprintf(logfile, "Machine check while not allowed. "
+ if (qemu_log_enabled()) {
+ qemu_log("Machine check while not allowed. "
"Entering checkstop state\n");
} else {
fprintf(stderr, "Machine check while not allowed. "
@@ -2204,23 +2084,15 @@ static always_inline void powerpc_excp (CPUState *env,
}
goto store_next;
case POWERPC_EXCP_DSI: /* Data storage exception */
-#if defined (DEBUG_EXCEPTIONS)
- if (loglevel != 0) {
- fprintf(logfile, "DSI exception: DSISR=" ADDRX" DAR=" ADDRX "\n",
+ LOG_EXCP("DSI exception: DSISR=" ADDRX" DAR=" ADDRX "\n",
env->spr[SPR_DSISR], env->spr[SPR_DAR]);
- }
-#endif
new_msr &= ~((target_ulong)1 << MSR_RI);
if (lpes1 == 0)
new_msr |= (target_ulong)MSR_HVB;
goto store_next;
case POWERPC_EXCP_ISI: /* Instruction storage exception */
-#if defined (DEBUG_EXCEPTIONS)
- if (loglevel != 0) {
- fprintf(logfile, "ISI exception: msr=" ADDRX ", nip=" ADDRX "\n",
+ LOG_EXCP("ISI exception: msr=" ADDRX ", nip=" ADDRX "\n",
msr, env->nip);
- }
-#endif
new_msr &= ~((target_ulong)1 << MSR_RI);
if (lpes1 == 0)
new_msr |= (target_ulong)MSR_HVB;
@@ -2243,11 +2115,7 @@ static always_inline void powerpc_excp (CPUState *env,
switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP:
if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) {
-#if defined (DEBUG_EXCEPTIONS)
- if (loglevel != 0) {
- fprintf(logfile, "Ignore floating point exception\n");
- }
-#endif
+ LOG_EXCP("Ignore floating point exception\n");
env->exception_index = POWERPC_EXCP_NONE;
env->error_code = 0;
return;
@@ -2261,12 +2129,8 @@ static always_inline void powerpc_excp (CPUState *env,
msr |= 0x00010000;
break;
case POWERPC_EXCP_INVAL:
-#if defined (DEBUG_EXCEPTIONS)
- if (loglevel != 0) {
- fprintf(logfile, "Invalid instruction at " ADDRX "\n",
+ LOG_EXCP("Invalid instruction at " ADDRX "\n",
env->nip);
- }
-#endif
new_msr &= ~((target_ulong)1 << MSR_RI);
if (lpes1 == 0)
new_msr |= (target_ulong)MSR_HVB;
@@ -2308,9 +2172,7 @@ static always_inline void powerpc_excp (CPUState *env,
return;
}
}
- if (loglevel & CPU_LOG_INT) {
- dump_syscall(env);
- }
+ dump_syscall(env);
new_msr &= ~((target_ulong)1 << MSR_RI);
lev = env->error_code;
if (lev == 1 || (lpes0 == 0 && lpes1 == 0))
@@ -2326,17 +2188,11 @@ static always_inline void powerpc_excp (CPUState *env,
goto store_next;
case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
/* FIT on 4xx */
-#if defined (DEBUG_EXCEPTIONS)
- if (loglevel != 0)
- fprintf(logfile, "FIT exception\n");
-#endif
+ LOG_EXCP("FIT exception\n");
new_msr &= ~((target_ulong)1 << MSR_RI); /* XXX: check this */
goto store_next;
case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
-#if defined (DEBUG_EXCEPTIONS)
- if (loglevel != 0)
- fprintf(logfile, "WDT exception\n");
-#endif
+ LOG_EXCP("WDT exception\n");
switch (excp_model) {
case POWERPC_EXCP_BOOKE:
srr0 = SPR_BOOKE_CSRR0;
@@ -2457,10 +2313,7 @@ static always_inline void powerpc_excp (CPUState *env,
new_msr |= (target_ulong)MSR_HVB;
goto store_current;
case POWERPC_EXCP_PIT: /* Programmable interval timer interrupt */
-#if defined (DEBUG_EXCEPTIONS)
- if (loglevel != 0)
- fprintf(logfile, "PIT exception\n");
-#endif
+ LOG_EXCP("PIT exception\n");
new_msr &= ~((target_ulong)1 << MSR_RI); /* XXX: check this */
goto store_next;
case POWERPC_EXCP_IO: /* IO error exception */
@@ -2533,7 +2386,7 @@ static always_inline void powerpc_excp (CPUState *env,
case POWERPC_EXCP_7x5:
tlb_miss:
#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
+ if (qemu_log_enabled()) {
const unsigned char *es;
target_ulong *miss, *cmp;
int en;
@@ -2551,7 +2404,7 @@ static always_inline void powerpc_excp (CPUState *env,
miss = &env->spr[SPR_DMISS];
cmp = &env->spr[SPR_DCMP];
}
- fprintf(logfile, "6xx %sTLB miss: %cM " ADDRX " %cC " ADDRX
+ qemu_log("6xx %sTLB miss: %cM " ADDRX " %cC " ADDRX
" H1 " ADDRX " H2 " ADDRX " %08x\n",
es, en, *miss, en, *cmp,
env->spr[SPR_HASH1], env->spr[SPR_HASH2],
@@ -2566,7 +2419,7 @@ static always_inline void powerpc_excp (CPUState *env,
case POWERPC_EXCP_74xx:
tlb_miss_74xx:
#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
+ if (qemu_log_enabled()) {
const unsigned char *es;
target_ulong *miss, *cmp;
int en;
@@ -2584,7 +2437,7 @@ static always_inline void powerpc_excp (CPUState *env,
miss = &env->spr[SPR_TLBMISS];
cmp = &env->spr[SPR_PTEHI];
}
- fprintf(logfile, "74xx %sTLB miss: %cM " ADDRX " %cC " ADDRX
+ qemu_log("74xx %sTLB miss: %cM " ADDRX " %cC " ADDRX
" %08x\n",
es, en, *miss, en, *cmp, env->error_code);
}
@@ -2736,11 +2589,9 @@ void ppc_hw_interrupt (CPUPPCState *env)
int hdice;
#if 0
- if (loglevel & CPU_LOG_INT) {
- fprintf(logfile, "%s: %p pending %08x req %08x me %d ee %d\n",
+ qemu_log_mask(CPU_LOG_INT, "%s: %p pending %08x req %08x me %d ee %d\n",
__func__, env, env->pending_interrupts,
env->interrupt_request, (int)msr_me, (int)msr_ee);
- }
#endif
/* External reset */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_RESET)) {
@@ -2852,16 +2703,8 @@ void ppc_hw_interrupt (CPUPPCState *env)
void cpu_dump_rfi (target_ulong RA, target_ulong msr)
{
- FILE *f;
-
- if (logfile) {
- f = logfile;
- } else {
- f = stdout;
- return;
- }
- fprintf(f, "Return from exception at " ADDRX " with flags " ADDRX "\n",
- RA, msr);
+ qemu_log("Return from exception at " ADDRX " with flags " ADDRX "\n",
+ RA, msr);
}
void cpu_ppc_reset (void *opaque)
diff --git a/target-ppc/kvm_ppc.c b/target-ppc/kvm_ppc.c
index 0caa5b98c..f7ce52b04 100644
--- a/target-ppc/kvm_ppc.c
+++ b/target-ppc/kvm_ppc.c
@@ -27,7 +27,7 @@ static int kvmppc_read_host_property(const char *node_path, const char *prop,
{
char *path;
FILE *f;
- int ret;
+ int ret = 0;
int pathlen;
pathlen = snprintf(NULL, 0, "%s/%s/%s", PROC_DEVTREE_PATH, node_path, prop)
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index c931adbd9..d531dd870 100644
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -28,6 +28,13 @@
//#define DEBUG_EXCEPTIONS
//#define DEBUG_SOFTWARE_TLB
+#ifdef DEBUG_SOFTWARE_TLB
+# define LOG_SWTLB(...) qemu_log(__VA_ARGS__)
+#else
+# define LOG_SWTLB(...) do { } while (0)
+#endif
+
+
/*****************************************************************************/
/* Exceptions processing helpers */
@@ -74,18 +81,14 @@ void helper_store_cr (target_ulong val, uint32_t mask)
/* SPR accesses */
void helper_load_dump_spr (uint32_t sprn)
{
- if (loglevel != 0) {
- fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n",
+ qemu_log("Read SPR %d %03x => " ADDRX "\n",
sprn, sprn, env->spr[sprn]);
- }
}
void helper_store_dump_spr (uint32_t sprn)
{
- if (loglevel != 0) {
- fprintf(logfile, "Write SPR %d %03x <= " ADDRX "\n",
+ qemu_log("Write SPR %d %03x <= " ADDRX "\n",
sprn, sprn, env->spr[sprn]);
- }
}
target_ulong helper_load_tbl (void)
@@ -182,10 +185,8 @@ void helper_store_hid0_601 (target_ulong val)
env->hflags_nmsr &= ~(1 << MSR_LE);
env->hflags_nmsr |= (1 << MSR_LE) & (((val >> 3) & 1) << MSR_LE);
env->hflags |= env->hflags_nmsr;
- if (loglevel != 0) {
- fprintf(logfile, "%s: set endianness to %c => " ADDRX "\n",
+ qemu_log("%s: set endianness to %c => " ADDRX "\n",
__func__, val & 0x8 ? 'l' : 'b', env->hflags);
- }
}
env->spr[SPR_HID0] = (uint32_t)val;
}
@@ -1860,15 +1861,11 @@ target_ulong helper_load_dcr (target_ulong dcrn)
target_ulong val = 0;
if (unlikely(env->dcr_env == NULL)) {
- if (loglevel != 0) {
- fprintf(logfile, "No DCR environment\n");
- }
+ qemu_log("No DCR environment\n");
helper_raise_exception_err(POWERPC_EXCP_PROGRAM,
POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL);
} else if (unlikely(ppc_dcr_read(env->dcr_env, dcrn, &val) != 0)) {
- if (loglevel != 0) {
- fprintf(logfile, "DCR read error %d %03x\n", (int)dcrn, (int)dcrn);
- }
+ qemu_log("DCR read error %d %03x\n", (int)dcrn, (int)dcrn);
helper_raise_exception_err(POWERPC_EXCP_PROGRAM,
POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
}
@@ -1878,15 +1875,11 @@ target_ulong helper_load_dcr (target_ulong dcrn)
void helper_store_dcr (target_ulong dcrn, target_ulong val)
{
if (unlikely(env->dcr_env == NULL)) {
- if (loglevel != 0) {
- fprintf(logfile, "No DCR environment\n");
- }
+ qemu_log("No DCR environment\n");
helper_raise_exception_err(POWERPC_EXCP_PROGRAM,
POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL);
} else if (unlikely(ppc_dcr_write(env->dcr_env, dcrn, val) != 0)) {
- if (loglevel != 0) {
- fprintf(logfile, "DCR write error %d %03x\n", (int)dcrn, (int)dcrn);
- }
+ qemu_log("DCR write error %d %03x\n", (int)dcrn, (int)dcrn);
helper_raise_exception_err(POWERPC_EXCP_PROGRAM,
POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
}
@@ -3564,13 +3557,9 @@ static void do_6xx_tlb (target_ulong new_EPN, int is_code)
EPN = env->spr[SPR_DMISS];
}
way = (env->spr[SPR_SRR1] >> 17) & 1;
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: EPN " ADDRX " " ADDRX " PTE0 " ADDRX
+ LOG_SWTLB("%s: EPN " ADDRX " " ADDRX " PTE0 " ADDRX
" PTE1 " ADDRX " way %d\n",
__func__, new_EPN, EPN, CMP, RPN, way);
- }
-#endif
/* Store this TLB */
ppc6xx_tlb_store(env, (uint32_t)(new_EPN & TARGET_PAGE_MASK),
way, is_code, CMP, RPN);
@@ -3596,13 +3585,9 @@ static void do_74xx_tlb (target_ulong new_EPN, int is_code)
CMP = env->spr[SPR_PTEHI];
EPN = env->spr[SPR_TLBMISS] & ~0x3;
way = env->spr[SPR_TLBMISS] & 0x3;
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: EPN " ADDRX " " ADDRX " PTE0 " ADDRX
+ LOG_SWTLB("%s: EPN " ADDRX " " ADDRX " PTE0 " ADDRX
" PTE1 " ADDRX " way %d\n",
__func__, new_EPN, EPN, CMP, RPN, way);
- }
-#endif
/* Store this TLB */
ppc6xx_tlb_store(env, (uint32_t)(new_EPN & TARGET_PAGE_MASK),
way, is_code, CMP, RPN);
@@ -3726,22 +3711,14 @@ void helper_4xx_tlbwe_hi (target_ulong entry, target_ulong val)
ppcemb_tlb_t *tlb;
target_ulong page, end;
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s entry %d val " ADDRX "\n", __func__, (int)entry, val);
- }
-#endif
+ LOG_SWTLB("%s entry %d val " ADDRX "\n", __func__, (int)entry, val);
entry &= 0x3F;
tlb = &env->tlb[entry].tlbe;
/* Invalidate previous TLB (if it's valid) */
if (tlb->prot & PAGE_VALID) {
end = tlb->EPN + tlb->size;
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: invalidate old TLB %d start " ADDRX
+ LOG_SWTLB("%s: invalidate old TLB %d start " ADDRX
" end " ADDRX "\n", __func__, (int)entry, tlb->EPN, end);
- }
-#endif
for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE)
tlb_flush_page(env, page);
}
@@ -3766,26 +3743,18 @@ void helper_4xx_tlbwe_hi (target_ulong entry, target_ulong val)
}
tlb->PID = env->spr[SPR_40x_PID]; /* PID */
tlb->attr = val & 0xFF;
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX
+ LOG_SWTLB("%s: set up TLB %d RPN " PADDRX " EPN " ADDRX
" size " ADDRX " prot %c%c%c%c PID %d\n", __func__,
(int)entry, tlb->RPN, tlb->EPN, tlb->size,
tlb->prot & PAGE_READ ? 'r' : '-',
tlb->prot & PAGE_WRITE ? 'w' : '-',
tlb->prot & PAGE_EXEC ? 'x' : '-',
tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID);
- }
-#endif
/* Invalidate new TLB (if valid) */
if (tlb->prot & PAGE_VALID) {
end = tlb->EPN + tlb->size;
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: invalidate TLB %d start " ADDRX
+ LOG_SWTLB("%s: invalidate TLB %d start " ADDRX
" end " ADDRX "\n", __func__, (int)entry, tlb->EPN, end);
- }
-#endif
for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE)
tlb_flush_page(env, page);
}
@@ -3795,11 +3764,7 @@ void helper_4xx_tlbwe_lo (target_ulong entry, target_ulong val)
{
ppcemb_tlb_t *tlb;
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s entry %i val " ADDRX "\n", __func__, (int)entry, val);
- }
-#endif
+ LOG_SWTLB("%s entry %i val " ADDRX "\n", __func__, (int)entry, val);
entry &= 0x3F;
tlb = &env->tlb[entry].tlbe;
tlb->RPN = val & 0xFFFFFC00;
@@ -3808,17 +3773,13 @@ void helper_4xx_tlbwe_lo (target_ulong entry, target_ulong val)
tlb->prot |= PAGE_EXEC;
if (val & 0x100)
tlb->prot |= PAGE_WRITE;
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX
+ LOG_SWTLB("%s: set up TLB %d RPN " PADDRX " EPN " ADDRX
" size " ADDRX " prot %c%c%c%c PID %d\n", __func__,
(int)entry, tlb->RPN, tlb->EPN, tlb->size,
tlb->prot & PAGE_READ ? 'r' : '-',
tlb->prot & PAGE_WRITE ? 'w' : '-',
tlb->prot & PAGE_EXEC ? 'x' : '-',
tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID);
- }
-#endif
}
target_ulong helper_4xx_tlbsx (target_ulong address)
@@ -3833,12 +3794,8 @@ void helper_440_tlbwe (uint32_t word, target_ulong entry, target_ulong value)
target_ulong EPN, RPN, size;
int do_flush_tlbs;
-#if defined (DEBUG_SOFTWARE_TLB)
- if (loglevel != 0) {
- fprintf(logfile, "%s word %d entry %d value " ADDRX "\n",
+ LOG_SWTLB("%s word %d entry %d value " ADDRX "\n",
__func__, word, (int)entry, value);
- }
-#endif
do_flush_tlbs = 0;
entry &= 0x3F;
tlb = &env->tlb[entry].tlbe;
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 0cfcc0872..1bbe7f5af 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -42,6 +42,11 @@
//#define PPC_DEBUG_DISAS
//#define DO_PPC_STATISTICS
+#ifdef PPC_DEBUG_DISAS
+# define LOG_DISAS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__)
+#else
+# define LOG_DISAS(...) do { } while (0)
+#endif
/*****************************************************************************/
/* Code translation helpers */
@@ -3892,10 +3897,8 @@ static always_inline void gen_op_mfspr (DisasContext *ctx)
* allowing userland application to read the PVR
*/
if (sprn != SPR_PVR) {
- if (loglevel != 0) {
- fprintf(logfile, "Trying to read privileged spr %d %03x at "
+ qemu_log("Trying to read privileged spr %d %03x at "
ADDRX "\n", sprn, sprn, ctx->nip);
- }
printf("Trying to read privileged spr %d %03x at " ADDRX "\n",
sprn, sprn, ctx->nip);
}
@@ -3903,10 +3906,8 @@ static always_inline void gen_op_mfspr (DisasContext *ctx)
}
} else {
/* Not defined */
- if (loglevel != 0) {
- fprintf(logfile, "Trying to read invalid spr %d %03x at "
+ qemu_log("Trying to read invalid spr %d %03x at "
ADDRX "\n", sprn, sprn, ctx->nip);
- }
printf("Trying to read invalid spr %d %03x at " ADDRX "\n",
sprn, sprn, ctx->nip);
gen_inval_exception(ctx, POWERPC_EXCP_INVAL_SPR);
@@ -4038,20 +4039,16 @@ GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000001, PPC_MISC)
(*write_cb)(ctx, sprn, rS(ctx->opcode));
} else {
/* Privilege exception */
- if (loglevel != 0) {
- fprintf(logfile, "Trying to write privileged spr %d %03x at "
+ qemu_log("Trying to write privileged spr %d %03x at "
ADDRX "\n", sprn, sprn, ctx->nip);
- }
printf("Trying to write privileged spr %d %03x at " ADDRX "\n",
sprn, sprn, ctx->nip);
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG);
}
} else {
/* Not defined */
- if (loglevel != 0) {
- fprintf(logfile, "Trying to write invalid spr %d %03x at "
+ qemu_log("Trying to write invalid spr %d %03x at "
ADDRX "\n", sprn, sprn, ctx->nip);
- }
printf("Trying to write invalid spr %d %03x at " ADDRX "\n",
sprn, sprn, ctx->nip);
gen_inval_exception(ctx, POWERPC_EXCP_INVAL_SPR);
@@ -6077,7 +6074,7 @@ GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, PPC_WRTEE)
/* Stop translation to have a chance to raise an exception */
gen_stop_exception(ctx);
} else {
- tcg_gen_andi_tl(cpu_msr, cpu_msr, (1 << MSR_EE));
+ tcg_gen_andi_tl(cpu_msr, cpu_msr, ~(1 << MSR_EE));
}
#endif
}
@@ -8232,13 +8229,9 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
gen_opc_icount[lj] = num_insns;
}
}
-#if defined PPC_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "----------------\n");
- fprintf(logfile, "nip=" ADDRX " super=%d ir=%d\n",
- ctx.nip, ctx.mem_idx, (int)msr_ir);
- }
-#endif
+ LOG_DISAS("----------------\n");
+ LOG_DISAS("nip=" ADDRX " super=%d ir=%d\n",
+ ctx.nip, ctx.mem_idx, (int)msr_ir);
if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
gen_io_start();
if (unlikely(ctx.le_mode)) {
@@ -8246,13 +8239,9 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
} else {
ctx.opcode = ldl_code(ctx.nip);
}
-#if defined PPC_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "translate opcode %08x (%02x %02x %02x) (%s)\n",
+ LOG_DISAS("translate opcode %08x (%02x %02x %02x) (%s)\n",
ctx.opcode, opc1(ctx.opcode), opc2(ctx.opcode),
opc3(ctx.opcode), little_endian ? "little" : "big");
- }
-#endif
ctx.nip += 4;
table = env->opcodes;
num_insns++;
@@ -8267,11 +8256,11 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
}
/* Is opcode *REALLY* valid ? */
if (unlikely(handler->handler == &gen_invalid)) {
- if (loglevel != 0) {
- fprintf(logfile, "invalid/unsupported opcode: "
- "%02x - %02x - %02x (%08x) " ADDRX " %d\n",
- opc1(ctx.opcode), opc2(ctx.opcode),
- opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir);
+ if (qemu_log_enabled()) {
+ qemu_log("invalid/unsupported opcode: "
+ "%02x - %02x - %02x (%08x) " ADDRX " %d\n",
+ opc1(ctx.opcode), opc2(ctx.opcode),
+ opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir);
} else {
printf("invalid/unsupported opcode: "
"%02x - %02x - %02x (%08x) " ADDRX " %d\n",
@@ -8280,12 +8269,12 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
}
} else {
if (unlikely((ctx.opcode & handler->inval) != 0)) {
- if (loglevel != 0) {
- fprintf(logfile, "invalid bits: %08x for opcode: "
- "%02x - %02x - %02x (%08x) " ADDRX "\n",
- ctx.opcode & handler->inval, opc1(ctx.opcode),
- opc2(ctx.opcode), opc3(ctx.opcode),
- ctx.opcode, ctx.nip - 4);
+ if (qemu_log_enabled()) {
+ qemu_log("invalid bits: %08x for opcode: "
+ "%02x - %02x - %02x (%08x) " ADDRX "\n",
+ ctx.opcode & handler->inval, opc1(ctx.opcode),
+ opc2(ctx.opcode), opc3(ctx.opcode),
+ ctx.opcode, ctx.nip - 4);
} else {
printf("invalid bits: %08x for opcode: "
"%02x - %02x - %02x (%08x) " ADDRX "\n",
@@ -8343,17 +8332,15 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
tb->icount = num_insns;
}
#if defined(DEBUG_DISAS)
- if (loglevel & CPU_LOG_TB_CPU) {
- fprintf(logfile, "---------------- excp: %04x\n", ctx.exception);
- cpu_dump_state(env, logfile, fprintf, 0);
- }
- if (loglevel & CPU_LOG_TB_IN_ASM) {
+ qemu_log_mask(CPU_LOG_TB_CPU, "---------------- excp: %04x\n", ctx.exception);
+ log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0);
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
int flags;
flags = env->bfd_mach;
flags |= ctx.le_mode << 16;
- fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
- target_disas(logfile, pc_start, ctx.nip - pc_start, flags);
- fprintf(logfile, "\n");
+ qemu_log("IN: %s\n", lookup_symbol(pc_start));
+ log_target_disas(pc_start, ctx.nip - pc_start, flags);
+ qemu_log("\n");
}
#endif
}
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index a790aeb03..7f5430abc 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -105,7 +105,7 @@ void do_interrupt(CPUState * env)
}
}
- if (loglevel & CPU_LOG_INT) {
+ if (qemu_loglevel_mask(CPU_LOG_INT)) {
const char *expname;
switch (env->exception_index) {
case 0x0e0:
@@ -151,9 +151,9 @@ void do_interrupt(CPUState * env)
expname = do_irq ? "interrupt" : "???";
break;
}
- fprintf(logfile, "exception 0x%03x [%s] raised\n",
- irq_vector, expname);
- cpu_dump_state(env, logfile, fprintf, 0);
+ qemu_log("exception 0x%03x [%s] raised\n",
+ irq_vector, expname);
+ log_cpu_state(env, 0);
}
env->ssr = env->sr;
diff --git a/target-sh4/helper.h b/target-sh4/helper.h
index 631e7e196..e66518558 100644
--- a/target-sh4/helper.h
+++ b/target-sh4/helper.h
@@ -35,6 +35,7 @@ DEF_HELPER_2(fdiv_FT, i32, i32, i32)
DEF_HELPER_2(fdiv_DT, i64, i64, i64)
DEF_HELPER_1(float_FT, i32, i32)
DEF_HELPER_1(float_DT, i64, i32)
+DEF_HELPER_3(fmac_FT, i32, i32, i32, i32)
DEF_HELPER_2(fmul_FT, i32, i32, i32)
DEF_HELPER_2(fmul_DT, i64, i64, i64)
DEF_HELPER_1(fneg_T, i32, i32)
diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c
index aa81d9ed4..84e1ad331 100644
--- a/target-sh4/op_helper.c
+++ b/target-sh4/op_helper.c
@@ -531,6 +531,17 @@ uint64_t helper_float_DT(uint32_t t0)
return d.ll;
}
+uint32_t helper_fmac_FT(uint32_t t0, uint32_t t1, uint32_t t2)
+{
+ CPU_FloatU f0, f1, f2;
+ f0.l = t0;
+ f1.l = t1;
+ f2.l = t2;
+ f0.f = float32_mul(f0.f, f1.f, &env->fp_status);
+ f0.f = float32_add(f0.f, f2.f, &env->fp_status);
+ return f0.l;
+}
+
uint32_t helper_fmul_FT(uint32_t t0, uint32_t t1)
{
CPU_FloatU f0, f1;
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index ef50f9b53..9137e3801 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1176,6 +1176,17 @@ static void _decode_opc(DisasContext * ctx)
}
}
return;
+ case 0xf00e: /* fmac FR0,RM,Rn */
+ {
+ CHECK_FPU_ENABLED
+ if (ctx->fpscr & FPSCR_PR) {
+ break; /* illegal instruction */
+ } else {
+ gen_helper_fmac_FT(cpu_fregs[FREG(B11_8)],
+ cpu_fregs[FREG(0)], cpu_fregs[FREG(B7_4)], cpu_fregs[FREG(B11_8)]);
+ return;
+ }
+ }
}
switch (ctx->opcode & 0xff00) {
@@ -1829,11 +1840,9 @@ gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb,
ctx.features = env->features;
#ifdef DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_CPU) {
- fprintf(logfile,
- "------------------------------------------------\n");
- cpu_dump_state(env, logfile, fprintf, 0);
- }
+ qemu_log_mask(CPU_LOG_TB_CPU,
+ "------------------------------------------------\n");
+ log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0);
#endif
ii = -1;
@@ -1926,13 +1935,12 @@ gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb,
#ifdef DEBUG_DISAS
#ifdef SH4_DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile, "\n");
+ qemu_log_mask(CPU_LOG_TB_IN_ASM, "\n");
#endif
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "IN:\n"); /* , lookup_symbol(pc_start)); */
- target_disas(logfile, pc_start, ctx.pc - pc_start, 0);
- fprintf(logfile, "\n");
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ qemu_log("IN:\n"); /* , lookup_symbol(pc_start)); */
+ log_target_disas(pc_start, ctx.pc - pc_start, 0);
+ qemu_log("\n");
}
#endif
}
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index d2865ee7d..d34b83763 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -644,7 +644,6 @@ void cpu_reset(CPUSPARCState *env)
env->wim = 1;
env->regwptr = env->regbase + (env->cwp * 16);
#if defined(CONFIG_USER_ONLY)
- env->user_mode_only = 1;
#ifdef TARGET_SPARC64
env->cleanwin = env->nwindows - 2;
env->cansave = env->nwindows - 2;
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index 0cde69586..2f88f4c1e 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -2811,7 +2811,7 @@ void do_interrupt(CPUState *env)
int intno = env->exception_index;
#ifdef DEBUG_PCALL
- if (loglevel & CPU_LOG_INT) {
+ if (qemu_loglevel_mask(CPU_LOG_INT)) {
static int count;
const char *name;
@@ -2829,23 +2829,23 @@ void do_interrupt(CPUState *env)
name = "Unknown";
}
- fprintf(logfile, "%6d: %s (v=%04x) pc=%016" PRIx64 " npc=%016" PRIx64
+ qemu_log("%6d: %s (v=%04x) pc=%016" PRIx64 " npc=%016" PRIx64
" SP=%016" PRIx64 "\n",
count, name, intno,
env->pc,
env->npc, env->regwptr[6]);
- cpu_dump_state(env, logfile, fprintf, 0);
+ log_cpu_state(env, 0);
#if 0
{
int i;
uint8_t *ptr;
- fprintf(logfile, " code=");
+ qemu_log(" code=");
ptr = (uint8_t *)env->pc;
for(i = 0; i < 16; i++) {
- fprintf(logfile, " %02x", ldub(ptr + i));
+ qemu_log(" %02x", ldub(ptr + i));
}
- fprintf(logfile, "\n");
+ qemu_log("\n");
}
#endif
count++;
@@ -2942,7 +2942,7 @@ void do_interrupt(CPUState *env)
int cwp, intno = env->exception_index;
#ifdef DEBUG_PCALL
- if (loglevel & CPU_LOG_INT) {
+ if (qemu_loglevel_mask(CPU_LOG_INT)) {
static int count;
const char *name;
@@ -2956,22 +2956,22 @@ void do_interrupt(CPUState *env)
name = "Unknown";
}
- fprintf(logfile, "%6d: %s (v=%02x) pc=%08x npc=%08x SP=%08x\n",
+ qemu_log("%6d: %s (v=%02x) pc=%08x npc=%08x SP=%08x\n",
count, name, intno,
env->pc,
env->npc, env->regwptr[6]);
- cpu_dump_state(env, logfile, fprintf, 0);
+ log_cpu_state(env, 0);
#if 0
{
int i;
uint8_t *ptr;
- fprintf(logfile, " code=");
+ qemu_log(" code=");
ptr = (uint8_t *)env->pc;
for(i = 0; i < 16; i++) {
- fprintf(logfile, " %02x", ldub(ptr + i));
+ qemu_log(" %02x", ldub(ptr + i));
}
- fprintf(logfile, "\n");
+ qemu_log("\n");
}
#endif
count++;
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 37530e30e..53997ae93 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -1933,7 +1933,7 @@ static void disas_sparc_insn(DisasContext * dc)
{
unsigned int insn, opc, rs1, rs2, rd;
- if (unlikely(loglevel & CPU_LOG_TB_OP))
+ if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP)))
tcg_gen_debug_insn_start(dc->pc);
insn = ldl_code(dc->pc);
opc = GET_FIELD(insn, 0, 1);
@@ -4829,8 +4829,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
}
}
if (spc) {
- if (loglevel > 0)
- fprintf(logfile, "Search PC...\n");
+ qemu_log("Search PC...\n");
j = gen_opc_ptr - gen_opc_buf;
if (lj < j) {
lj++;
@@ -4897,9 +4896,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
while (lj <= j)
gen_opc_instr_start[lj++] = 0;
#if 0
- if (loglevel > 0) {
- page_dump(logfile);
- }
+ log_page_dump();
#endif
gen_opc_jump_pc[0] = dc->jump_pc[0];
gen_opc_jump_pc[1] = dc->jump_pc[1];
@@ -4908,11 +4905,11 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
tb->icount = num_insns;
}
#ifdef DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_IN_ASM) {
- fprintf(logfile, "--------------\n");
- fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
- target_disas(logfile, pc_start, last_pc + 4 - pc_start, 0);
- fprintf(logfile, "\n");
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ qemu_log("--------------\n");
+ qemu_log("IN: %s\n", lookup_symbol(pc_start));
+ log_target_disas(pc_start, last_pc + 4 - pc_start, 0);
+ qemu_log("\n");
}
#endif
}
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 21b69fe04..8fe365809 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1878,10 +1878,10 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
const TCGArg *args;
#ifdef DEBUG_DISAS
- if (unlikely(loglevel & CPU_LOG_TB_OP)) {
- fprintf(logfile, "OP:\n");
+ if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {
+ qemu_log("OP:\n");
tcg_dump_ops(s, logfile);
- fprintf(logfile, "\n");
+ qemu_log("\n");
}
#endif
@@ -1894,10 +1894,10 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
#endif
#ifdef DEBUG_DISAS
- if (unlikely(loglevel & CPU_LOG_TB_OP_OPT)) {
- fprintf(logfile, "OP after la:\n");
+ if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) {
+ qemu_log("OP after la:\n");
tcg_dump_ops(s, logfile);
- fprintf(logfile, "\n");
+ qemu_log("\n");
}
#endif
diff --git a/tcg/tcg.h b/tcg/tcg.h
index e83073b03..323cc52c1 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -457,7 +457,7 @@ uint64_t tcg_helper_divu_i64(uint64_t arg1, uint64_t arg2);
uint64_t tcg_helper_remu_i64(uint64_t arg1, uint64_t arg2);
extern uint8_t code_gen_prologue[];
-#if defined(__powerpc__) && !defined(__powerpc64__)
+#if defined(_ARCH_PPC) && !defined(_ARCH_PPC64)
#define tcg_qemu_tb_exec(tb_ptr) \
((long REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr)
#else
diff --git a/tests/qruncom.c b/tests/qruncom.c
index 6bc0b2b2d..5e503bccc 100644
--- a/tests/qruncom.c
+++ b/tests/qruncom.c
@@ -199,10 +199,6 @@ int main(int argc, char **argv)
env = cpu_init("qemu32");
- /* set user mode state (XXX: should be done automatically by
- cpu_init ?) */
- env->user_mode_only = 1;
-
cpu_x86_set_cpl(env, 3);
env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
diff --git a/translate-all.c b/translate-all.c
index 1d1364b81..4bdf2c99d 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -127,11 +127,11 @@ int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr)
#endif
#ifdef DEBUG_DISAS
- if (loglevel & CPU_LOG_TB_OUT_ASM) {
- fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr);
- disas(logfile, tb->tc_ptr, *gen_code_size_ptr);
- fprintf(logfile, "\n");
- fflush(logfile);
+ if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
+ qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr);
+ log_disas(tb->tc_ptr, *gen_code_size_ptr);
+ qemu_log("\n");
+ qemu_log_flush();
}
#endif
return 0;
diff --git a/usb-bsd.c b/usb-bsd.c
index 0e4157c58..a8a805f06 100644
--- a/usb-bsd.c
+++ b/usb-bsd.c
@@ -178,7 +178,7 @@ static int usb_host_handle_control(USBDevice *dev,
req.ucr_flags = USBD_SHORT_XFER_OK;
ret = ioctl(s->devfd, USB_SET_TIMEOUT, &timeout);
-#if (__NetBSD__ || __OpenBSD__)
+#if defined(__NetBSD__) || defined(__OpenBSD__)
if (ret < 0 && errno != EINVAL) {
#else
if (ret < 0) {
@@ -372,7 +372,7 @@ USBDevice *usb_host_device_open(const char *devname)
"host:%s", devname);
pstrcpy(dev->devpath, sizeof(dev->devpath), "/dev/");
- strcat(dev->devpath, dev_info.udi_devnames[0]);
+ pstrcat(dev->devpath, sizeof(dev->devpath), dev_info.udi_devnames[0]);
/* Mark the endpoints as not yet open */
for (i = 0; i < USB_MAX_ENDPOINTS; i++)
@@ -550,10 +550,10 @@ static const char *usb_class_str(uint8_t class)
return p->class_name;
}
-void usb_info_device(int bus_num, int addr, int class_id,
- int vendor_id, int product_id,
- const char *product_name,
- int speed)
+static void usb_info_device(int bus_num, int addr, int class_id,
+ int vendor_id, int product_id,
+ const char *product_name,
+ int speed)
{
const char *class_str, *speed_str;
diff --git a/vl.c b/vl.c
index e44c95e7d..dd26f079a 100644
--- a/vl.c
+++ b/vl.c
@@ -158,6 +158,13 @@
//#define DEBUG_NET
//#define DEBUG_SLIRP
+
+#ifdef DEBUG_IOPORT
+# define LOG_IOPORT(...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
+#else
+# define LOG_IOPORT(...) do { } while (0)
+#endif
+
#ifdef TARGET_PPC
#define DEFAULT_RAM_SIZE 144
#else
@@ -185,9 +192,10 @@ int nb_drives;
int extboot_drive = -1;
static int vga_ram_size;
enum vga_retrace_method vga_retrace_method = VGA_RETRACE_DUMB;
-DisplayState display_state;
+static DisplayState *display_state;
int nographic;
static int curses;
+static int sdl;
const char* keyboard_layout = NULL;
int64_t ticks_per_sec;
ram_addr_t ram_size;
@@ -197,6 +205,7 @@ int vm_running;
static int rtc_utc = 1;
static int rtc_date_offset = -1; /* -1 means no change */
int cirrus_vga_enabled = 1;
+int std_vga_enabled = 0;
int vmsvga_enabled = 0;
#ifdef TARGET_SPARC
int graphic_width = 1024;
@@ -214,8 +223,10 @@ static int no_frame = 0;
int no_quit = 0;
CharDriverState *serial_hds[MAX_SERIAL_PORTS];
CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
+CharDriverState *virtcon_hds[MAX_VIRTIO_CONSOLES];
#ifdef TARGET_I386
int win2k_install_hack = 0;
+int rtc_td_hack = 0;
#endif
int usb_enabled = 0;
const char *assigned_devices[MAX_DEV_ASSIGN_CMDLINE];
@@ -429,10 +440,7 @@ void isa_unassign_ioport(int start, int length)
void cpu_outb(CPUState *env, int addr, int val)
{
-#ifdef DEBUG_IOPORT
- if (loglevel & CPU_LOG_IOPORT)
- fprintf(logfile, "outb: %04x %02x\n", addr, val);
-#endif
+ LOG_IOPORT("outb: %04x %02x\n", addr, val);
ioport_write(0, addr, val);
#ifdef USE_KQEMU
if (env)
@@ -442,10 +450,7 @@ void cpu_outb(CPUState *env, int addr, int val)
void cpu_outw(CPUState *env, int addr, int val)
{
-#ifdef DEBUG_IOPORT
- if (loglevel & CPU_LOG_IOPORT)
- fprintf(logfile, "outw: %04x %04x\n", addr, val);
-#endif
+ LOG_IOPORT("outw: %04x %04x\n", addr, val);
ioport_write(1, addr, val);
#ifdef USE_KQEMU
if (env)
@@ -455,10 +460,7 @@ void cpu_outw(CPUState *env, int addr, int val)
void cpu_outl(CPUState *env, int addr, int val)
{
-#ifdef DEBUG_IOPORT
- if (loglevel & CPU_LOG_IOPORT)
- fprintf(logfile, "outl: %04x %08x\n", addr, val);
-#endif
+ LOG_IOPORT("outl: %04x %08x\n", addr, val);
ioport_write(2, addr, val);
#ifdef USE_KQEMU
if (env)
@@ -470,10 +472,7 @@ int cpu_inb(CPUState *env, int addr)
{
int val;
val = ioport_read(0, addr);
-#ifdef DEBUG_IOPORT
- if (loglevel & CPU_LOG_IOPORT)
- fprintf(logfile, "inb : %04x %02x\n", addr, val);
-#endif
+ LOG_IOPORT("inb : %04x %02x\n", addr, val);
#ifdef USE_KQEMU
if (env)
env->last_io_time = cpu_get_time_fast();
@@ -485,10 +484,7 @@ int cpu_inw(CPUState *env, int addr)
{
int val;
val = ioport_read(1, addr);
-#ifdef DEBUG_IOPORT
- if (loglevel & CPU_LOG_IOPORT)
- fprintf(logfile, "inw : %04x %04x\n", addr, val);
-#endif
+ LOG_IOPORT("inw : %04x %04x\n", addr, val);
#ifdef USE_KQEMU
if (env)
env->last_io_time = cpu_get_time_fast();
@@ -500,10 +496,7 @@ int cpu_inl(CPUState *env, int addr)
{
int val;
val = ioport_read(2, addr);
-#ifdef DEBUG_IOPORT
- if (loglevel & CPU_LOG_IOPORT)
- fprintf(logfile, "inl : %04x %08x\n", addr, val);
-#endif
+ LOG_IOPORT("inl : %04x %08x\n", addr, val);
#ifdef USE_KQEMU
if (env)
env->last_io_time = cpu_get_time_fast();
@@ -2853,26 +2846,44 @@ void pcmcia_info(void)
}
/***********************************************************/
+/* register display */
+
+void register_displaystate(DisplayState *ds)
+{
+ DisplayState **s;
+ s = &display_state;
+ while (*s != NULL)
+ s = &(*s)->next;
+ ds->next = NULL;
+ *s = ds;
+}
+
+DisplayState *get_displaystate(void)
+{
+ return display_state;
+}
+
/* dumb display */
static void dumb_update(DisplayState *ds, int x, int y, int w, int h)
{
}
-static void dumb_resize(DisplayState *ds, int w, int h)
+static void dumb_resize(DisplayState *ds)
{
}
static void dumb_display_init(DisplayState *ds)
{
- ds->data = NULL;
- ds->linesize = 0;
- ds->depth = 0;
- ds->dpy_update = dumb_update;
- ds->dpy_resize = dumb_resize;
- ds->dpy_refresh = NULL;
- ds->gui_timer_interval = 0;
- ds->idle = 1;
+ DisplayChangeListener *dcl = qemu_mallocz(sizeof(DisplayChangeListener));
+ if (!dcl)
+ exit(1);
+ dcl->dpy_update = dumb_update;
+ dcl->dpy_resize = dumb_resize;
+ dcl->dpy_refresh = NULL;
+ dcl->idle = 1;
+ dcl->gui_timer_interval = 500;
+ register_displaychangelistener(ds, dcl);
}
/***********************************************************/
@@ -3451,13 +3462,19 @@ static QEMUMachine *find_machine(const char *name)
static void gui_update(void *opaque)
{
+ uint64_t interval = GUI_REFRESH_INTERVAL;
DisplayState *ds = opaque;
- ds->dpy_refresh(ds);
- qemu_mod_timer(ds->gui_timer,
- (ds->gui_timer_interval ?
- ds->gui_timer_interval :
- GUI_REFRESH_INTERVAL)
- + qemu_get_clock(rt_clock));
+ DisplayChangeListener *dcl = ds->listeners;
+
+ dpy_refresh(ds);
+
+ while (dcl != NULL) {
+ if (dcl->gui_timer_interval &&
+ dcl->gui_timer_interval < interval)
+ interval = dcl->gui_timer_interval;
+ dcl = dcl->next;
+ }
+ qemu_mod_timer(ds->gui_timer, interval + qemu_get_clock(rt_clock));
}
struct vm_change_state_entry {
@@ -3976,6 +3993,7 @@ static void help(int exitcode)
"-no-frame open SDL window without a frame and window decorations\n"
"-alt-grab use Ctrl-Alt-Shift to grab mouse (instead of Ctrl-Alt)\n"
"-no-quit disable SDL window close capability\n"
+ "-sdl enable SDL\n"
#endif
#ifdef TARGET_I386
"-no-fd-bootchk disable boot signature checking for floppy disks\n"
@@ -3994,12 +4012,13 @@ static void help(int exitcode)
" use -soundhw ? to get the list of supported cards\n"
" use -soundhw all to enable all of them\n"
#endif
- "-vga [std|cirrus|vmware]\n"
+ "-vga [std|cirrus|vmware|none]\n"
" select video card type\n"
"-localtime set the real time clock to local time [default=utc]\n"
"-full-screen start in full screen\n"
#ifdef TARGET_I386
"-win2k-hack use it when installing Windows 2000 to avoid a disk full bug\n"
+ "-rtc-td-hack use it to fix time drift in Windows ACPI HAL\n"
#endif
"-usb enable the USB driver (will be the default soon)\n"
"-usbdevice name add the host or guest USB device 'name'\n"
@@ -4205,18 +4224,21 @@ enum {
QEMU_OPTION_echr,
QEMU_OPTION_monitor,
QEMU_OPTION_serial,
+ QEMU_OPTION_virtiocon,
QEMU_OPTION_parallel,
QEMU_OPTION_loadvm,
QEMU_OPTION_full_screen,
QEMU_OPTION_no_frame,
QEMU_OPTION_alt_grab,
QEMU_OPTION_no_quit,
+ QEMU_OPTION_sdl,
QEMU_OPTION_pidfile,
QEMU_OPTION_no_kqemu,
QEMU_OPTION_kernel_kqemu,
QEMU_OPTION_enable_kvm,
QEMU_OPTION_enable_nesting,
QEMU_OPTION_win2k_hack,
+ QEMU_OPTION_rtc_td_hack,
QEMU_OPTION_usb,
QEMU_OPTION_usbdevice,
QEMU_OPTION_smp,
@@ -4339,6 +4361,7 @@ static const QEMUOption qemu_options[] = {
{ "echr", HAS_ARG, QEMU_OPTION_echr },
{ "monitor", HAS_ARG, QEMU_OPTION_monitor },
{ "serial", HAS_ARG, QEMU_OPTION_serial },
+ { "virtioconsole", HAS_ARG, QEMU_OPTION_virtiocon },
{ "parallel", HAS_ARG, QEMU_OPTION_parallel },
{ "loadvm", HAS_ARG, QEMU_OPTION_loadvm },
{ "incoming", 1, QEMU_OPTION_incoming },
@@ -4347,9 +4370,11 @@ static const QEMUOption qemu_options[] = {
{ "no-frame", 0, QEMU_OPTION_no_frame },
{ "alt-grab", 0, QEMU_OPTION_alt_grab },
{ "no-quit", 0, QEMU_OPTION_no_quit },
+ { "sdl", 0, QEMU_OPTION_sdl },
#endif
{ "pidfile", HAS_ARG, QEMU_OPTION_pidfile },
{ "win2k-hack", 0, QEMU_OPTION_win2k_hack },
+ { "rtc-td-hack", 0, QEMU_OPTION_rtc_td_hack },
{ "usbdevice", HAS_ARG, QEMU_OPTION_usbdevice },
{ "smp", HAS_ARG, QEMU_OPTION_smp },
{ "vnc", HAS_ARG, QEMU_OPTION_vnc },
@@ -4575,14 +4600,21 @@ static void select_vgahw (const char *p)
const char *opts;
if (strstart(p, "std", &opts)) {
+ std_vga_enabled = 1;
cirrus_vga_enabled = 0;
vmsvga_enabled = 0;
} else if (strstart(p, "cirrus", &opts)) {
cirrus_vga_enabled = 1;
+ std_vga_enabled = 0;
vmsvga_enabled = 0;
} else if (strstart(p, "vmware", &opts)) {
cirrus_vga_enabled = 0;
+ std_vga_enabled = 0;
vmsvga_enabled = 1;
+ } else if (strstart(p, "none", &opts)) {
+ cirrus_vga_enabled = 0;
+ std_vga_enabled = 0;
+ vmsvga_enabled = 0;
} else {
invalid_vga:
fprintf(stderr, "Unknown vga type: %s\n", p);
@@ -4763,7 +4795,8 @@ int main(int argc, char **argv, char **envp)
const char *initrd_filename;
const char *kernel_filename, *kernel_cmdline;
const char *boot_devices = "";
- DisplayState *ds = &display_state;
+ DisplayState *ds;
+ DisplayChangeListener *dcl;
int cyls, heads, secs, translation;
const char *net_clients[MAX_NET_CLIENTS];
int nb_net_clients;
@@ -4772,12 +4805,14 @@ int main(int argc, char **argv, char **envp)
int hda_index;
int optind;
const char *r, *optarg;
- CharDriverState *monitor_hd;
+ CharDriverState *monitor_hd = NULL;
const char *monitor_device;
const char *serial_devices[MAX_SERIAL_PORTS];
int serial_device_index;
const char *parallel_devices[MAX_PARALLEL_PORTS];
int parallel_device_index;
+ const char *virtio_consoles[MAX_VIRTIO_CONSOLES];
+ int virtio_console_index;
const char *loadvm = NULL;
QEMUMachine *machine;
const char *cpu_model;
@@ -4851,6 +4886,11 @@ int main(int argc, char **argv, char **envp)
parallel_devices[i] = NULL;
parallel_device_index = 0;
+ virtio_consoles[0] = "vc:80Cx24C";
+ for(i = 1; i < MAX_VIRTIO_CONSOLES; i++)
+ virtio_consoles[i] = NULL;
+ virtio_console_index = 0;
+
usb_devices_index = 0;
assigned_devices_index = 0;
@@ -5238,6 +5278,14 @@ int main(int argc, char **argv, char **envp)
serial_devices[serial_device_index] = optarg;
serial_device_index++;
break;
+ case QEMU_OPTION_virtiocon:
+ if (virtio_console_index >= MAX_VIRTIO_CONSOLES) {
+ fprintf(stderr, "qemu: too many virtio consoles\n");
+ exit(1);
+ }
+ virtio_consoles[virtio_console_index] = optarg;
+ virtio_console_index++;
+ break;
case QEMU_OPTION_parallel:
if (parallel_device_index >= MAX_PARALLEL_PORTS) {
fprintf(stderr, "qemu: too many parallel ports\n");
@@ -5262,6 +5310,9 @@ int main(int argc, char **argv, char **envp)
case QEMU_OPTION_no_quit:
no_quit = 1;
break;
+ case QEMU_OPTION_sdl:
+ sdl = 1;
+ break;
#endif
case QEMU_OPTION_pidfile:
pid_file = optarg;
@@ -5270,6 +5321,9 @@ int main(int argc, char **argv, char **envp)
case QEMU_OPTION_win2k_hack:
win2k_install_hack = 1;
break;
+ case QEMU_OPTION_rtc_td_hack:
+ rtc_td_hack = 1;
+ break;
#endif
#ifdef USE_KQEMU
case QEMU_OPTION_no_kqemu:
@@ -5494,6 +5548,8 @@ int main(int argc, char **argv, char **envp)
parallel_devices[0] = "null";
if (strncmp(monitor_device, "vc", 2) == 0)
monitor_device = "stdio";
+ if (virtio_console_index == 0)
+ virtio_consoles[0] = "null";
}
#ifndef _WIN32
@@ -5728,35 +5784,6 @@ int main(int argc, char **argv, char **envp)
register_savevm("timer", 0, 2, timer_save, timer_load, NULL);
register_savevm_live("ram", 0, 3, ram_save_live, NULL, ram_load, NULL);
- /* terminal init */
- memset(&display_state, 0, sizeof(display_state));
- if (nographic) {
- if (curses) {
- fprintf(stderr, "fatal: -nographic can't be used with -curses\n");
- exit(1);
- }
- /* nearly nothing to do */
- dumb_display_init(ds);
- } else if (vnc_display != NULL) {
- vnc_display_init(ds);
- if (vnc_display_open(ds, vnc_display) < 0)
- exit(1);
- } else
-#if defined(CONFIG_CURSES)
- if (curses) {
- curses_display_init(ds, full_screen);
- } else
-#endif
- {
-#if defined(CONFIG_SDL)
- sdl_display_init(ds, full_screen, no_frame);
-#elif defined(CONFIG_COCOA)
- cocoa_display_init(ds, full_screen);
-#else
- dumb_display_init(ds);
-#endif
- }
-
#ifndef _WIN32
/* must be after terminal init, SDL library changes signal handlers */
termsig_setup();
@@ -5776,13 +5803,25 @@ int main(int argc, char **argv, char **envp)
}
}
}
+
+#ifdef KVM_UPSTREAM
+ if (kvm_enabled()) {
+ int ret;
+
+ ret = kvm_init(smp_cpus);
+ if (ret < 0) {
+ fprintf(stderr, "failed to initialize KVM\n");
+ exit(1);
+ }
+ }
+#endif
+
if (monitor_device) {
monitor_hd = qemu_chr_open("monitor", monitor_device);
if (!monitor_hd) {
fprintf(stderr, "qemu: could not open monitor device '%s'\n", monitor_device);
exit(1);
}
- monitor_init(monitor_hd, !nographic);
}
for(i = 0; i < MAX_SERIAL_PORTS; i++) {
@@ -5796,8 +5835,6 @@ int main(int argc, char **argv, char **envp)
devname);
exit(1);
}
- if (strstart(devname, "vc", 0))
- qemu_chr_printf(serial_hds[i], "serial%d console\r\n", i);
}
}
@@ -5812,27 +5849,27 @@ int main(int argc, char **argv, char **envp)
devname);
exit(1);
}
- if (strstart(devname, "vc", 0))
- qemu_chr_printf(parallel_hds[i], "parallel%d console\r\n", i);
}
}
- if (kvm_enabled())
- kvm_init_ap();
-
-#ifdef KVM_UPSTREAM
- if (kvm_enabled()) {
- int ret;
-
- ret = kvm_init(smp_cpus);
- if (ret < 0) {
- fprintf(stderr, "failed to initialize KVM\n");
- exit(1);
+ for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
+ const char *devname = virtio_consoles[i];
+ if (devname && strcmp(devname, "none")) {
+ char label[32];
+ snprintf(label, sizeof(label), "virtcon%d", i);
+ virtcon_hds[i] = qemu_chr_open(label, devname);
+ if (!virtcon_hds[i]) {
+ fprintf(stderr, "qemu: could not open virtio console '%s'\n",
+ devname);
+ exit(1);
+ }
}
}
-#endif
- machine->init(ram_size, vga_ram_size, boot_devices, ds,
+ if (kvm_enabled())
+ kvm_init_ap();
+
+ machine->init(ram_size, vga_ram_size, boot_devices,
kernel_filename, kernel_cmdline, initrd_filename, cpu_model);
current_machine = machine;
@@ -5858,9 +5895,83 @@ int main(int argc, char **argv, char **envp)
}
}
- if (display_state.dpy_refresh) {
- display_state.gui_timer = qemu_new_timer(rt_clock, gui_update, &display_state);
- qemu_mod_timer(display_state.gui_timer, qemu_get_clock(rt_clock));
+ /* just use the first displaystate for the moment */
+ ds = display_state;
+ /* terminal init */
+ if (nographic) {
+ if (curses) {
+ fprintf(stderr, "fatal: -nographic can't be used with -curses\n");
+ exit(1);
+ }
+ /* nearly nothing to do */
+ dumb_display_init(ds);
+ } else {
+#if defined(CONFIG_CURSES)
+ if (curses) {
+ /* At the moment curses cannot be used with other displays */
+ curses_display_init(ds, full_screen);
+ } else
+#endif
+ {
+ if (vnc_display != NULL) {
+ vnc_display_init(ds);
+ if (vnc_display_open(ds, vnc_display) < 0)
+ exit(1);
+ }
+ if (sdl || !vnc_display)
+#if defined(CONFIG_SDL)
+ sdl_display_init(ds, full_screen, no_frame);
+#elif defined(CONFIG_COCOA)
+ cocoa_display_init(ds, full_screen);
+#else
+ dumb_display_init(ds);
+#endif
+ }
+ }
+ dpy_resize(ds);
+
+ dcl = ds->listeners;
+ while (dcl != NULL) {
+ if (dcl->dpy_refresh != NULL) {
+ ds->gui_timer = qemu_new_timer(rt_clock, gui_update, ds);
+ qemu_mod_timer(ds->gui_timer, qemu_get_clock(rt_clock));
+ }
+ dcl = dcl->next;
+ }
+
+ text_consoles_set_display(display_state);
+
+ if (monitor_device && monitor_hd)
+ monitor_init(monitor_hd, !nographic);
+
+ for(i = 0; i < MAX_SERIAL_PORTS; i++) {
+ const char *devname = serial_devices[i];
+ if (devname && strcmp(devname, "none")) {
+ char label[32];
+ snprintf(label, sizeof(label), "serial%d", i);
+ if (strstart(devname, "vc", 0))
+ qemu_chr_printf(serial_hds[i], "serial%d console\r\n", i);
+ }
+ }
+
+ for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
+ const char *devname = parallel_devices[i];
+ if (devname && strcmp(devname, "none")) {
+ char label[32];
+ snprintf(label, sizeof(label), "parallel%d", i);
+ if (strstart(devname, "vc", 0))
+ qemu_chr_printf(parallel_hds[i], "parallel%d console\r\n", i);
+ }
+ }
+
+ for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
+ const char *devname = virtio_consoles[i];
+ if (virtcon_hds[i] && devname) {
+ char label[32];
+ snprintf(label, sizeof(label), "virtcon%d", i);
+ if (strstart(devname, "vc", 0))
+ qemu_chr_printf(virtcon_hds[i], "virtio console%d\r\n", i);
+ }
}
#ifdef CONFIG_GDBSTUB
diff --git a/vnc.c b/vnc.c
index 575fd6898..17ea9a20e 100644
--- a/vnc.c
+++ b/vnc.c
@@ -124,11 +124,8 @@ struct VncState
int csock;
DisplayState *ds;
int need_update;
- int width;
- int height;
uint32_t dirty_row[VNC_MAX_HEIGHT][VNC_DIRTY_WORDS];
char *old_data;
- int depth; /* internal VNC frame buffer byte per pixel */
int has_resize;
int has_hextile;
int has_pointer_type_change;
@@ -165,10 +162,7 @@ struct VncState
/* current output mode information */
VncWritePixels *write_pixels;
VncSendHextileTile *send_hextile_tile;
- int pix_bpp, pix_big_endian;
- int client_red_shift, client_red_max, server_red_shift, server_red_max;
- int client_green_shift, client_green_max, server_green_shift, server_green_max;
- int client_blue_shift, client_blue_max, server_blue_shift, server_blue_max;
+ DisplaySurface clientds, serverds;
CaptureVoiceOut *audio_cap;
struct audsettings as;
@@ -180,6 +174,7 @@ struct VncState
};
static VncState *vnc_state; /* needed for info vnc */
+static DisplayChangeListener *dcl;
void do_info_vnc(void)
{
@@ -213,7 +208,7 @@ static void vnc_flush(VncState *vs);
static void vnc_update_client(void *opaque);
static void vnc_client_read(void *opaque);
-static void vnc_colordepth(DisplayState *ds, int depth);
+static void vnc_colordepth(DisplayState *ds);
static inline void vnc_set_bit(uint32_t *d, int k)
{
@@ -270,10 +265,10 @@ static void vnc_dpy_update(DisplayState *ds, int x, int y, int w, int h)
w += (x % 16);
x -= (x % 16);
- x = MIN(x, vs->width);
- y = MIN(y, vs->height);
- w = MIN(x + w, vs->width) - x;
- h = MIN(h, vs->height);
+ x = MIN(x, vs->serverds.width);
+ y = MIN(y, vs->serverds.height);
+ w = MIN(x + w, vs->serverds.width) - x;
+ h = MIN(h, vs->serverds.height);
for (; y < h; y++)
for (i = 0; i < w; i += 16)
@@ -291,35 +286,30 @@ static void vnc_framebuffer_update(VncState *vs, int x, int y, int w, int h,
vnc_write_s32(vs, encoding);
}
-static void vnc_dpy_resize(DisplayState *ds, int w, int h)
+static void vnc_dpy_resize(DisplayState *ds)
{
int size_changed;
VncState *vs = ds->opaque;
- ds->data = qemu_realloc(ds->data, w * h * vs->depth);
- vs->old_data = qemu_realloc(vs->old_data, w * h * vs->depth);
+ vs->old_data = qemu_realloc(vs->old_data, ds_get_linesize(ds) * ds_get_height(ds));
- if (ds->data == NULL || vs->old_data == NULL) {
+ if (vs->old_data == NULL) {
fprintf(stderr, "vnc: memory allocation failed\n");
exit(1);
}
- if (ds->depth != vs->depth * 8) {
- ds->depth = vs->depth * 8;
+ if (ds_get_bytes_per_pixel(ds) != vs->serverds.pf.bytes_per_pixel)
console_color_init(ds);
- }
- size_changed = ds->width != w || ds->height != h;
- ds->width = w;
- ds->height = h;
- ds->linesize = w * vs->depth;
+ vnc_colordepth(ds);
+ size_changed = ds_get_width(ds) != vs->serverds.width ||
+ ds_get_height(ds) != vs->serverds.height;
+ vs->serverds = *(ds->surface);
if (size_changed) {
- vs->width = ds->width;
- vs->height = ds->height;
if (vs->csock != -1 && vs->has_resize) {
vnc_write_u8(vs, 0); /* msg id */
vnc_write_u8(vs, 0);
vnc_write_u16(vs, 1); /* number of rects */
- vnc_framebuffer_update(vs, 0, 0, ds->width, ds->height, -223);
+ vnc_framebuffer_update(vs, 0, 0, ds_get_width(ds), ds_get_height(ds), -223);
vnc_flush(vs);
}
}
@@ -339,21 +329,21 @@ static void vnc_convert_pixel(VncState *vs, uint8_t *buf, uint32_t v)
{
uint8_t r, g, b;
- r = ((v >> vs->server_red_shift) & vs->server_red_max) * (vs->client_red_max + 1) /
- (vs->server_red_max + 1);
- g = ((v >> vs->server_green_shift) & vs->server_green_max) * (vs->client_green_max + 1) /
- (vs->server_green_max + 1);
- b = ((v >> vs->server_blue_shift) & vs->server_blue_max) * (vs->client_blue_max + 1) /
- (vs->server_blue_max + 1);
- v = (r << vs->client_red_shift) |
- (g << vs->client_green_shift) |
- (b << vs->client_blue_shift);
- switch(vs->pix_bpp) {
+ r = ((v >> vs->serverds.pf.rshift) & vs->serverds.pf.rmax) * (vs->clientds.pf.rmax + 1) /
+ (vs->serverds.pf.rmax + 1);
+ g = ((v >> vs->serverds.pf.gshift) & vs->serverds.pf.gmax) * (vs->clientds.pf.gmax + 1) /
+ (vs->serverds.pf.gmax + 1);
+ b = ((v >> vs->serverds.pf.bshift) & vs->serverds.pf.bmax) * (vs->clientds.pf.bmax + 1) /
+ (vs->serverds.pf.bmax + 1);
+ v = (r << vs->clientds.pf.rshift) |
+ (g << vs->clientds.pf.gshift) |
+ (b << vs->clientds.pf.bshift);
+ switch(vs->clientds.pf.bytes_per_pixel) {
case 1:
buf[0] = v;
break;
case 2:
- if (vs->pix_big_endian) {
+ if (vs->clientds.flags & QEMU_BIG_ENDIAN_FLAG) {
buf[0] = v >> 8;
buf[1] = v;
} else {
@@ -363,7 +353,7 @@ static void vnc_convert_pixel(VncState *vs, uint8_t *buf, uint32_t v)
break;
default:
case 4:
- if (vs->pix_big_endian) {
+ if (vs->clientds.flags & QEMU_BIG_ENDIAN_FLAG) {
buf[0] = v >> 24;
buf[1] = v >> 16;
buf[2] = v >> 8;
@@ -382,29 +372,29 @@ static void vnc_write_pixels_generic(VncState *vs, void *pixels1, int size)
{
uint8_t buf[4];
- if (vs->depth == 4) {
+ if (vs->serverds.pf.bytes_per_pixel == 4) {
uint32_t *pixels = pixels1;
int n, i;
n = size >> 2;
for(i = 0; i < n; i++) {
vnc_convert_pixel(vs, buf, pixels[i]);
- vnc_write(vs, buf, vs->pix_bpp);
+ vnc_write(vs, buf, vs->clientds.pf.bytes_per_pixel);
}
- } else if (vs->depth == 2) {
+ } else if (vs->serverds.pf.bytes_per_pixel == 2) {
uint16_t *pixels = pixels1;
int n, i;
n = size >> 1;
for(i = 0; i < n; i++) {
vnc_convert_pixel(vs, buf, pixels[i]);
- vnc_write(vs, buf, vs->pix_bpp);
+ vnc_write(vs, buf, vs->clientds.pf.bytes_per_pixel);
}
- } else if (vs->depth == 1) {
+ } else if (vs->serverds.pf.bytes_per_pixel == 1) {
uint8_t *pixels = pixels1;
int n, i;
n = size;
for(i = 0; i < n; i++) {
vnc_convert_pixel(vs, buf, pixels[i]);
- vnc_write(vs, buf, vs->pix_bpp);
+ vnc_write(vs, buf, vs->clientds.pf.bytes_per_pixel);
}
} else {
fprintf(stderr, "vnc_write_pixels_generic: VncState color depth not supported\n");
@@ -418,9 +408,9 @@ static void send_framebuffer_update_raw(VncState *vs, int x, int y, int w, int h
vnc_framebuffer_update(vs, x, y, w, h, 0);
- row = ds_get_data(vs->ds) + y * ds_get_linesize(vs->ds) + x * vs->depth;
+ row = ds_get_data(vs->ds) + y * ds_get_linesize(vs->ds) + x * ds_get_bytes_per_pixel(vs->ds);
for (i = 0; i < h; i++) {
- vs->write_pixels(vs, row, w * vs->depth);
+ vs->write_pixels(vs, row, w * ds_get_bytes_per_pixel(vs->ds));
row += ds_get_linesize(vs->ds);
}
}
@@ -469,8 +459,8 @@ static void send_framebuffer_update_hextile(VncState *vs, int x, int y, int w, i
vnc_framebuffer_update(vs, x, y, w, h, 5);
- last_fg = (uint8_t *) malloc(vs->depth);
- last_bg = (uint8_t *) malloc(vs->depth);
+ last_fg = (uint8_t *) malloc(vs->serverds.pf.bytes_per_pixel);
+ last_bg = (uint8_t *) malloc(vs->serverds.pf.bytes_per_pixel);
has_fg = has_bg = 0;
for (j = y; j < (y + h); j += 16) {
for (i = x; i < (x + w); i += 16) {
@@ -494,36 +484,10 @@ static void send_framebuffer_update(VncState *vs, int x, int y, int w, int h)
static void vnc_copy(DisplayState *ds, int src_x, int src_y, int dst_x, int dst_y, int w, int h)
{
- int src, dst;
- uint8_t *src_row;
- uint8_t *dst_row;
- char *old_row;
- int y = 0;
- int pitch = ds_get_linesize(ds);
VncState *vs = ds->opaque;
vnc_update_client(vs);
- if (dst_y > src_y) {
- y = h - 1;
- pitch = -pitch;
- }
-
- src = (ds_get_linesize(ds) * (src_y + y) + vs->depth * src_x);
- dst = (ds_get_linesize(ds) * (dst_y + y) + vs->depth * dst_x);
-
- src_row = ds_get_data(ds) + src;
- dst_row = ds_get_data(ds) + dst;
- old_row = vs->old_data + dst;
-
- for (y = 0; y < h; y++) {
- memmove(old_row, src_row, w * vs->depth);
- memmove(dst_row, src_row, w * vs->depth);
- src_row += pitch;
- dst_row += pitch;
- old_row += pitch;
- }
-
vnc_write_u8(vs, 0); /* msg id */
vnc_write_u8(vs, 0);
vnc_write_u16(vs, 1); /* number of rects */
@@ -537,7 +501,7 @@ static int find_dirty_height(VncState *vs, int y, int last_x, int x)
{
int h;
- for (h = 1; h < (vs->height - y); h++) {
+ for (h = 1; h < (vs->serverds.height - y); h++) {
int tmp_x;
if (!vnc_get_bit(vs->dirty_row[y + h], last_x))
break;
@@ -563,14 +527,14 @@ static void vnc_update_client(void *opaque)
vga_hw_update();
- vnc_set_bits(width_mask, (vs->width / 16), VNC_DIRTY_WORDS);
+ vnc_set_bits(width_mask, (ds_get_width(vs->ds) / 16), VNC_DIRTY_WORDS);
/* Walk through the dirty map and eliminate tiles that
really aren't dirty */
row = ds_get_data(vs->ds);
old_row = vs->old_data;
- for (y = 0; y < vs->height; y++) {
+ for (y = 0; y < ds_get_height(vs->ds); y++) {
if (vnc_and_bits(vs->dirty_row[y], width_mask, VNC_DIRTY_WORDS)) {
int x;
uint8_t *ptr;
@@ -580,15 +544,15 @@ static void vnc_update_client(void *opaque)
old_ptr = (char*)old_row;
for (x = 0; x < ds_get_width(vs->ds); x += 16) {
- if (memcmp(old_ptr, ptr, 16 * vs->depth) == 0) {
+ if (memcmp(old_ptr, ptr, 16 * ds_get_bytes_per_pixel(vs->ds)) == 0) {
vnc_clear_bit(vs->dirty_row[y], (x / 16));
} else {
has_dirty = 1;
- memcpy(old_ptr, ptr, 16 * vs->depth);
+ memcpy(old_ptr, ptr, 16 * ds_get_bytes_per_pixel(vs->ds));
}
- ptr += 16 * vs->depth;
- old_ptr += 16 * vs->depth;
+ ptr += 16 * ds_get_bytes_per_pixel(vs->ds);
+ old_ptr += 16 * ds_get_bytes_per_pixel(vs->ds);
}
}
@@ -608,10 +572,10 @@ static void vnc_update_client(void *opaque)
saved_offset = vs->output.offset;
vnc_write_u16(vs, 0);
- for (y = 0; y < vs->height; y++) {
+ for (y = 0; y < vs->serverds.height; y++) {
int x;
int last_x = -1;
- for (x = 0; x < vs->width / 16; x++) {
+ for (x = 0; x < vs->serverds.width / 16; x++) {
if (vnc_get_bit(vs->dirty_row[y], x)) {
if (last_x == -1) {
last_x = x;
@@ -770,7 +734,7 @@ static int vnc_client_io_error(VncState *vs, int ret, int last_errno)
qemu_set_fd_handler2(vs->csock, NULL, NULL, NULL, NULL);
closesocket(vs->csock);
vs->csock = -1;
- vs->ds->idle = 1;
+ dcl->idle = 1;
buffer_reset(&vs->input);
buffer_reset(&vs->output);
vs->need_update = 0;
@@ -1193,7 +1157,7 @@ static void framebuffer_update_request(VncState *vs, int incremental,
for (i = 0; i < h; i++) {
vnc_set_bits(vs->dirty_row[y_position + i],
(ds_get_width(vs->ds) / 16), VNC_DIRTY_WORDS);
- memset(old_row, 42, ds_get_width(vs->ds) * vs->depth);
+ memset(old_row, 42, ds_get_width(vs->ds) * ds_get_bytes_per_pixel(vs->ds));
old_row += ds_get_linesize(vs->ds);
}
}
@@ -1226,7 +1190,7 @@ static void set_encodings(VncState *vs, int32_t *encodings, size_t n_encodings)
vs->has_pointer_type_change = 0;
vs->has_WMVi = 0;
vs->absolute = -1;
- vs->ds->dpy_copy = NULL;
+ dcl->dpy_copy = NULL;
for (i = n_encodings - 1; i >= 0; i--) {
switch (encodings[i]) {
@@ -1234,7 +1198,7 @@ static void set_encodings(VncState *vs, int32_t *encodings, size_t n_encodings)
vs->has_hextile = 0;
break;
case 1: /* CopyRect */
- vs->ds->dpy_copy = vnc_copy;
+ dcl->dpy_copy = vnc_copy;
break;
case 5: /* Hextile */
vs->has_hextile = 1;
@@ -1262,75 +1226,66 @@ static void set_encodings(VncState *vs, int32_t *encodings, size_t n_encodings)
check_pointer_type_change(vs, kbd_mouse_is_absolute());
}
+static void set_pixel_conversion(VncState *vs)
+{
+ if ((vs->clientds.flags & QEMU_BIG_ENDIAN_FLAG) ==
+ (vs->ds->surface->flags & QEMU_BIG_ENDIAN_FLAG) &&
+ !memcmp(&(vs->clientds.pf), &(vs->ds->surface->pf), sizeof(PixelFormat))) {
+ vs->write_pixels = vnc_write_pixels_copy;
+ switch (vs->ds->surface->pf.bits_per_pixel) {
+ case 8:
+ vs->send_hextile_tile = send_hextile_tile_8;
+ break;
+ case 16:
+ vs->send_hextile_tile = send_hextile_tile_16;
+ break;
+ case 32:
+ vs->send_hextile_tile = send_hextile_tile_32;
+ break;
+ }
+ } else {
+ vs->write_pixels = vnc_write_pixels_generic;
+ switch (vs->ds->surface->pf.bits_per_pixel) {
+ case 8:
+ vs->send_hextile_tile = send_hextile_tile_generic_8;
+ break;
+ case 16:
+ vs->send_hextile_tile = send_hextile_tile_generic_16;
+ break;
+ case 32:
+ vs->send_hextile_tile = send_hextile_tile_generic_32;
+ break;
+ }
+ }
+}
+
static void set_pixel_format(VncState *vs,
int bits_per_pixel, int depth,
int big_endian_flag, int true_color_flag,
int red_max, int green_max, int blue_max,
int red_shift, int green_shift, int blue_shift)
{
- int host_big_endian_flag;
-
-#ifdef WORDS_BIGENDIAN
- host_big_endian_flag = 1;
-#else
- host_big_endian_flag = 0;
-#endif
if (!true_color_flag) {
- fail:
vnc_client_error(vs);
return;
}
- if (bits_per_pixel == 32 &&
- bits_per_pixel == vs->depth * 8 &&
- host_big_endian_flag == big_endian_flag &&
- red_max == 0xff && green_max == 0xff && blue_max == 0xff &&
- red_shift == 16 && green_shift == 8 && blue_shift == 0) {
- vs->depth = 4;
- vs->write_pixels = vnc_write_pixels_copy;
- vs->send_hextile_tile = send_hextile_tile_32;
- } else
- if (bits_per_pixel == 16 &&
- bits_per_pixel == vs->depth * 8 &&
- host_big_endian_flag == big_endian_flag &&
- red_max == 31 && green_max == 63 && blue_max == 31 &&
- red_shift == 11 && green_shift == 5 && blue_shift == 0) {
- vs->depth = 2;
- vs->write_pixels = vnc_write_pixels_copy;
- vs->send_hextile_tile = send_hextile_tile_16;
- } else
- if (bits_per_pixel == 8 &&
- bits_per_pixel == vs->depth * 8 &&
- red_max == 7 && green_max == 7 && blue_max == 3 &&
- red_shift == 5 && green_shift == 2 && blue_shift == 0) {
- vs->depth = 1;
- vs->write_pixels = vnc_write_pixels_copy;
- vs->send_hextile_tile = send_hextile_tile_8;
- } else
- {
- /* generic and slower case */
- if (bits_per_pixel != 8 &&
- bits_per_pixel != 16 &&
- bits_per_pixel != 32)
- goto fail;
- if (vs->depth == 4) {
- vs->send_hextile_tile = send_hextile_tile_generic_32;
- } else if (vs->depth == 2) {
- vs->send_hextile_tile = send_hextile_tile_generic_16;
- } else {
- vs->send_hextile_tile = send_hextile_tile_generic_8;
- }
- vs->pix_big_endian = big_endian_flag;
- vs->write_pixels = vnc_write_pixels_generic;
- }
+ vs->clientds = vs->serverds;
+ vs->clientds.pf.rmax = red_max;
+ vs->clientds.pf.rshift = red_shift;
+ vs->clientds.pf.rmask = red_max << red_shift;
+ vs->clientds.pf.gmax = green_max;
+ vs->clientds.pf.gshift = green_shift;
+ vs->clientds.pf.gmask = green_max << green_shift;
+ vs->clientds.pf.bmax = blue_max;
+ vs->clientds.pf.bshift = blue_shift;
+ vs->clientds.pf.bmask = blue_max << blue_shift;
+ vs->clientds.pf.bits_per_pixel = bits_per_pixel;
+ vs->clientds.pf.bytes_per_pixel = bits_per_pixel / 8;
+ vs->clientds.pf.depth = bits_per_pixel == 32 ? 24 : bits_per_pixel;
+ vs->clientds.flags = big_endian_flag ? QEMU_BIG_ENDIAN_FLAG : 0x00;
- vs->client_red_shift = red_shift;
- vs->client_red_max = red_max;
- vs->client_green_shift = green_shift;
- vs->client_green_max = green_max;
- vs->client_blue_shift = blue_shift;
- vs->client_blue_max = blue_max;
- vs->pix_bpp = bits_per_pixel / 8;
+ set_pixel_conversion(vs);
vga_hw_invalidate();
vga_hw_update();
@@ -1339,9 +1294,8 @@ static void set_pixel_format(VncState *vs,
static void pixel_format_message (VncState *vs) {
char pad[3] = { 0, 0, 0 };
- vnc_write_u8(vs, vs->depth * 8); /* bits-per-pixel */
- if (vs->depth == 4) vnc_write_u8(vs, 24); /* depth */
- else vnc_write_u8(vs, vs->depth * 8); /* depth */
+ vnc_write_u8(vs, vs->ds->surface->pf.bits_per_pixel); /* bits-per-pixel */
+ vnc_write_u8(vs, vs->ds->surface->pf.depth); /* depth */
#ifdef WORDS_BIGENDIAN
vnc_write_u8(vs, 1); /* big-endian-flag */
@@ -1349,137 +1303,44 @@ static void pixel_format_message (VncState *vs) {
vnc_write_u8(vs, 0); /* big-endian-flag */
#endif
vnc_write_u8(vs, 1); /* true-color-flag */
- if (vs->depth == 4) {
- vnc_write_u16(vs, 0xFF); /* red-max */
- vnc_write_u16(vs, 0xFF); /* green-max */
- vnc_write_u16(vs, 0xFF); /* blue-max */
- vnc_write_u8(vs, 16); /* red-shift */
- vnc_write_u8(vs, 8); /* green-shift */
- vnc_write_u8(vs, 0); /* blue-shift */
+ vnc_write_u16(vs, vs->ds->surface->pf.rmax); /* red-max */
+ vnc_write_u16(vs, vs->ds->surface->pf.gmax); /* green-max */
+ vnc_write_u16(vs, vs->ds->surface->pf.bmax); /* blue-max */
+ vnc_write_u8(vs, vs->ds->surface->pf.rshift); /* red-shift */
+ vnc_write_u8(vs, vs->ds->surface->pf.gshift); /* green-shift */
+ vnc_write_u8(vs, vs->ds->surface->pf.bshift); /* blue-shift */
+ if (vs->ds->surface->pf.bits_per_pixel == 32)
vs->send_hextile_tile = send_hextile_tile_32;
- } else if (vs->depth == 2) {
- vnc_write_u16(vs, 31); /* red-max */
- vnc_write_u16(vs, 63); /* green-max */
- vnc_write_u16(vs, 31); /* blue-max */
- vnc_write_u8(vs, 11); /* red-shift */
- vnc_write_u8(vs, 5); /* green-shift */
- vnc_write_u8(vs, 0); /* blue-shift */
+ else if (vs->ds->surface->pf.bits_per_pixel == 16)
vs->send_hextile_tile = send_hextile_tile_16;
- } else if (vs->depth == 1) {
- /* XXX: change QEMU pixel 8 bit pixel format to match the VNC one ? */
- vnc_write_u16(vs, 7); /* red-max */
- vnc_write_u16(vs, 7); /* green-max */
- vnc_write_u16(vs, 3); /* blue-max */
- vnc_write_u8(vs, 5); /* red-shift */
- vnc_write_u8(vs, 2); /* green-shift */
- vnc_write_u8(vs, 0); /* blue-shift */
+ else if (vs->ds->surface->pf.bits_per_pixel == 8)
vs->send_hextile_tile = send_hextile_tile_8;
- }
- vs->client_red_max = vs->server_red_max;
- vs->client_green_max = vs->server_green_max;
- vs->client_blue_max = vs->server_blue_max;
- vs->client_red_shift = vs->server_red_shift;
- vs->client_green_shift = vs->server_green_shift;
- vs->client_blue_shift = vs->server_blue_shift;
- vs->pix_bpp = vs->depth * 8;
+ vs->clientds = *(vs->ds->surface);
+ vs->clientds.flags |= ~QEMU_ALLOCATED_FLAG;
vs->write_pixels = vnc_write_pixels_copy;
vnc_write(vs, pad, 3); /* padding */
}
-static void vnc_colordepth(DisplayState *ds, int depth)
+static void vnc_dpy_setdata(DisplayState *ds)
{
- int host_big_endian_flag;
- struct VncState *vs = ds->opaque;
-
- switch (depth) {
- case 24:
- if (ds->depth == 32) return;
- depth = 32;
- break;
- case 15:
- case 8:
- case 0:
- return;
- default:
- break;
- }
+ /* We don't have to do anything */
+}
-#ifdef WORDS_BIGENDIAN
- host_big_endian_flag = 1;
-#else
- host_big_endian_flag = 0;
-#endif
-
- switch (depth) {
- case 8:
- vs->depth = depth / 8;
- vs->server_red_max = 7;
- vs->server_green_max = 7;
- vs->server_blue_max = 3;
- vs->server_red_shift = 5;
- vs->server_green_shift = 2;
- vs->server_blue_shift = 0;
- break;
- case 16:
- vs->depth = depth / 8;
- vs->server_red_max = 31;
- vs->server_green_max = 63;
- vs->server_blue_max = 31;
- vs->server_red_shift = 11;
- vs->server_green_shift = 5;
- vs->server_blue_shift = 0;
- break;
- case 32:
- vs->depth = 4;
- vs->server_red_max = 255;
- vs->server_green_max = 255;
- vs->server_blue_max = 255;
- vs->server_red_shift = 16;
- vs->server_green_shift = 8;
- vs->server_blue_shift = 0;
- break;
- default:
- return;
- }
+static void vnc_colordepth(DisplayState *ds)
+{
+ struct VncState *vs = ds->opaque;
if (vs->csock != -1 && vs->has_WMVi) {
/* Sending a WMVi message to notify the client*/
vnc_write_u8(vs, 0); /* msg id */
vnc_write_u8(vs, 0);
vnc_write_u16(vs, 1); /* number of rects */
- vnc_framebuffer_update(vs, 0, 0, ds->width, ds->height, 0x574D5669);
+ vnc_framebuffer_update(vs, 0, 0, ds_get_width(ds), ds_get_height(ds), 0x574D5669);
pixel_format_message(vs);
vnc_flush(vs);
} else {
- if (vs->pix_bpp == 4 && vs->depth == 4 &&
- host_big_endian_flag == vs->pix_big_endian &&
- vs->client_red_max == 0xff && vs->client_green_max == 0xff && vs->client_blue_max == 0xff &&
- vs->client_red_shift == 16 && vs->client_green_shift == 8 && vs->client_blue_shift == 0) {
- vs->write_pixels = vnc_write_pixels_copy;
- vs->send_hextile_tile = send_hextile_tile_32;
- } else if (vs->pix_bpp == 2 && vs->depth == 2 &&
- host_big_endian_flag == vs->pix_big_endian &&
- vs->client_red_max == 31 && vs->client_green_max == 63 && vs->client_blue_max == 31 &&
- vs->client_red_shift == 11 && vs->client_green_shift == 5 && vs->client_blue_shift == 0) {
- vs->write_pixels = vnc_write_pixels_copy;
- vs->send_hextile_tile = send_hextile_tile_16;
- } else if (vs->pix_bpp == 1 && vs->depth == 1 &&
- host_big_endian_flag == vs->pix_big_endian &&
- vs->client_red_max == 7 && vs->client_green_max == 7 && vs->client_blue_max == 3 &&
- vs->client_red_shift == 5 && vs->client_green_shift == 2 && vs->client_blue_shift == 0) {
- vs->write_pixels = vnc_write_pixels_copy;
- vs->send_hextile_tile = send_hextile_tile_8;
- } else {
- if (vs->depth == 4) {
- vs->send_hextile_tile = send_hextile_tile_generic_32;
- } else if (vs->depth == 2) {
- vs->send_hextile_tile = send_hextile_tile_generic_16;
- } else {
- vs->send_hextile_tile = send_hextile_tile_generic_8;
- }
- vs->write_pixels = vnc_write_pixels_generic;
- }
+ set_pixel_conversion(vs);
}
}
@@ -1624,8 +1485,6 @@ static int protocol_client_init(VncState *vs, uint8_t *data, size_t len)
char buf[1024];
int size;
- vs->width = ds_get_width(vs->ds);
- vs->height = ds_get_height(vs->ds);
vnc_write_u16(vs, ds_get_width(vs->ds));
vnc_write_u16(vs, ds_get_height(vs->ds));
@@ -2237,7 +2096,7 @@ static int protocol_version(VncState *vs, uint8_t *version, size_t len)
static void vnc_connect(VncState *vs)
{
VNC_DEBUG("New client on socket %d\n", vs->csock);
- vs->ds->idle = 0;
+ dcl->idle = 0;
socket_set_nonblock(vs->csock);
qemu_set_fd_handler2(vs->csock, NULL, vnc_client_read, NULL, vs);
vnc_write(vs, "RFB 003.008\n", 12);
@@ -2247,7 +2106,7 @@ static void vnc_connect(VncState *vs)
memset(vs->dirty_row, 0xFF, sizeof(vs->dirty_row));
vs->has_resize = 0;
vs->has_hextile = 0;
- vs->ds->dpy_copy = NULL;
+ dcl->dpy_copy = NULL;
vnc_update_client(vs);
reset_keys(vs);
}
@@ -2272,11 +2131,12 @@ void vnc_display_init(DisplayState *ds)
VncState *vs;
vs = qemu_mallocz(sizeof(VncState));
- if (!vs)
+ dcl = qemu_mallocz(sizeof(DisplayChangeListener));
+ if (!vs || !dcl)
exit(1);
ds->opaque = vs;
- ds->idle = 1;
+ dcl->idle = 1;
vnc_state = vs;
vs->display = NULL;
vs->password = NULL;
@@ -2298,13 +2158,11 @@ void vnc_display_init(DisplayState *ds)
vs->timer = qemu_new_timer(rt_clock, vnc_update_client, vs);
- vs->ds->data = NULL;
- vs->ds->dpy_update = vnc_dpy_update;
- vs->ds->dpy_resize = vnc_dpy_resize;
- vs->ds->dpy_refresh = NULL;
-
- vnc_colordepth(vs->ds, 32);
- vnc_dpy_resize(vs->ds, 640, 400);
+ dcl->dpy_update = vnc_dpy_update;
+ dcl->dpy_resize = vnc_dpy_resize;
+ dcl->dpy_setdata = vnc_dpy_setdata;
+ dcl->dpy_refresh = NULL;
+ register_displaychangelistener(ds, dcl);
vs->as.freq = 44100;
vs->as.nchannels = 2;
@@ -2546,7 +2404,7 @@ int vnc_display_open(DisplayState *ds, const char *display)
char *dpy;
dpy = qemu_malloc(256);
if (strncmp(display, "unix:", 5) == 0) {
- strcpy(dpy, "unix:");
+ pstrcpy(dpy, 256, "unix:");
vs->lsock = unix_listen(display+5, dpy+5, 256-5);
} else {
vs->lsock = inet_listen(display, dpy, 256, SOCK_STREAM, 5900);
diff --git a/vnchextile.h b/vnchextile.h
index e0a62bbb0..f3fdfb4a2 100644
--- a/vnchextile.h
+++ b/vnchextile.h
@@ -13,7 +13,7 @@ static void CONCAT(send_hextile_tile_, NAME)(VncState *vs,
void *last_fg_,
int *has_bg, int *has_fg)
{
- uint8_t *row = (ds_get_data(vs->ds) + y * ds_get_linesize(vs->ds) + x * vs->depth);
+ uint8_t *row = (ds_get_data(vs->ds) + y * ds_get_linesize(vs->ds) + x * ds_get_bytes_per_pixel(vs->ds));
pixel_t *irow = (pixel_t *)row;
int j, i;
pixel_t *last_bg = (pixel_t *)last_bg_;
@@ -24,7 +24,7 @@ static void CONCAT(send_hextile_tile_, NAME)(VncState *vs,
int bg_count = 0;
int fg_count = 0;
int flags = 0;
- uint8_t data[(vs->pix_bpp + 2) * 16 * 16];
+ uint8_t data[(vs->clientds.pf.bytes_per_pixel + 2) * 16 * 16];
int n_data = 0;
int n_subtiles = 0;
@@ -132,7 +132,7 @@ static void CONCAT(send_hextile_tile_, NAME)(VncState *vs,
has_color = 0;
#ifdef GENERIC
vnc_convert_pixel(vs, data + n_data, color);
- n_data += vs->pix_bpp;
+ n_data += vs->clientds.pf.bytes_per_pixel;
#else
memcpy(data + n_data, &color, sizeof(color));
n_data += sizeof(pixel_t);
@@ -152,7 +152,7 @@ static void CONCAT(send_hextile_tile_, NAME)(VncState *vs,
if (has_color) {
#ifdef GENERIC
vnc_convert_pixel(vs, data + n_data, color);
- n_data += vs->pix_bpp;
+ n_data += vs->clientds.pf.bytes_per_pixel;
#else
memcpy(data + n_data, &color, sizeof(color));
n_data += sizeof(pixel_t);
@@ -197,7 +197,7 @@ static void CONCAT(send_hextile_tile_, NAME)(VncState *vs,
}
} else {
for (j = 0; j < h; j++) {
- vs->write_pixels(vs, row, w * vs->depth);
+ vs->write_pixels(vs, row, w * ds_get_bytes_per_pixel(vs->ds));
row += ds_get_linesize(vs->ds);
}
}