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authorAvi Kivity <avi@redhat.com>2009-09-16 12:25:51 +0300
committerMarcelo Tosatti <mtosatti@redhat.com>2009-09-16 16:00:47 -0300
commitb7ddba10ff51df73a985fd7e6e13d89376056a36 (patch)
treee4b24cd069accc5e3de11c9b0fc365d2f25d4c34
parenttest-device: add support for irq injection (diff)
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test: Use function table for APIC access
Prepare for x2apic. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
-rw-r--r--kvm/user/test/x86/apic.c41
1 files changed, 39 insertions, 2 deletions
diff --git a/kvm/user/test/x86/apic.c b/kvm/user/test/x86/apic.c
index b712ef8d6..72dd963f3 100644
--- a/kvm/user/test/x86/apic.c
+++ b/kvm/user/test/x86/apic.c
@@ -102,6 +102,12 @@ static idt_entry_t idt[256];
static int g_fail;
static int g_tests;
+struct apic_ops {
+ u32 (*reg_read)(unsigned reg);
+ void (*reg_write)(unsigned reg, u32 val);
+ void (*icr_write)(u32 val, u32 dest);
+};
+
static void outb(unsigned char data, unsigned short port)
{
asm volatile ("out %0, %1" : : "a"(data), "d"(port));
@@ -115,16 +121,47 @@ static void report(const char *msg, int pass)
++g_fail;
}
-static u32 apic_read(unsigned reg)
+static u32 xapic_read(unsigned reg)
{
return *(volatile u32 *)(g_apic + reg);
}
-static void apic_write(unsigned reg, u32 val)
+static void xapic_write(unsigned reg, u32 val)
{
*(volatile u32 *)(g_apic + reg) = val;
}
+static void xapic_icr_write(u32 val, u32 dest)
+{
+ while (xapic_read(APIC_ICR) & APIC_ICR_BUSY)
+ ;
+ xapic_write(APIC_ICR2, dest << 24);
+ xapic_write(APIC_ICR, val);
+}
+
+static const struct apic_ops xapic_ops = {
+ .reg_read = xapic_read,
+ .reg_write = xapic_write,
+ .icr_write = xapic_icr_write,
+};
+
+static const struct apic_ops *apic_ops = &xapic_ops;
+
+static u32 apic_read(unsigned reg)
+{
+ return apic_ops->reg_read(reg);
+}
+
+static void apic_write(unsigned reg, u32 val)
+{
+ apic_ops->reg_write(reg, val);
+}
+
+static void apic_icr_write(u32 val, u32 dest)
+{
+ apic_ops->icr_write(val, dest);
+}
+
static void test_lapic_existence(void)
{
u32 lvr;