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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-16 11:59:40 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-05-16 11:59:40 +0000
commit69d357286d0ab5a852e827dad1dc4b05917aaaa8 (patch)
treedbf5fae9642821155fdb93539c266e7c5dc12406 /host-utils.c
parentFull MIPS64 MMU implementation, by Aurelien Jarno. (diff)
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More generic 64 bit multiplication support, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2821 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'host-utils.c')
-rw-r--r--host-utils.c75
1 files changed, 75 insertions, 0 deletions
diff --git a/host-utils.c b/host-utils.c
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index 000000000..10341063f
--- /dev/null
+++ b/host-utils.c
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+/*
+ * Utility compute operations used by translated code.
+ *
+ * Copyright (c) 2007 Aurelien Jarno
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "vl.h"
+
+/* Signed 64x64 -> 128 multiplication */
+
+void muls64(int64_t *phigh, int64_t *plow, int64_t a, int64_t b)
+{
+#if defined(__x86_64__)
+ __asm__ ("imul %0\n\t"
+ : "=d" (*phigh), "=a" (*plow)
+ : "a" (a), "0" (b)
+ );
+#else
+ int64_t ph;
+ uint64_t pm1, pm2, pl;
+
+ pl = (uint64_t)((uint32_t)a) * (uint64_t)((uint32_t)b);
+ pm1 = (a >> 32) * (uint32_t)b;
+ pm2 = (uint32_t)a * (b >> 32);
+ ph = (a >> 32) * (b >> 32);
+
+ ph += (int64_t)pm1 >> 32;
+ pm1 = (uint64_t)((uint32_t)pm1) + pm2 + (pl >> 32);
+
+ *phigh = ph + ((int64_t)pm1 >> 32);
+ *plow = (pm1 << 32) + (uint32_t)pl;
+#endif
+}
+
+/* Unsigned 64x64 -> 128 multiplication */
+void mulu64(uint64_t *phigh, uint64_t *plow, uint64_t a, uint64_t b)
+{
+#if defined(__x86_64__)
+ __asm__ ("mul %0\n\t"
+ : "=d" (*phigh), "=a" (*plow)
+ : "a" (a), "0" (b)
+ );
+#else
+ uint64_t ph, pm1, pm2, pl;
+
+ pl = (uint64_t)((uint32_t)a) * (uint64_t)((uint32_t)b);
+ pm1 = (a >> 32) * (uint32_t)b;
+ pm2 = (uint32_t)a * (b >> 32);
+ ph = (a >> 32) * (b >> 32);
+
+ ph += pm1 >> 32;
+ pm1 = (uint64_t)((uint32_t)pm1) + pm2 + (pl >> 32);
+
+ *phigh = ph + (pm1 >> 32);
+ *plow = (pm1 << 32) + (uint32_t)pl;
+#endif
+}