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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-08 13:16:14 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-10-08 13:16:14 +0000
commitf1ccf904778f7a840d2b751b5e429d4088ba9cb4 (patch)
treef5484cea23f7b1bc193f2fb0e4c6de9f3f4f1755 /softmmu_header.h
parentCRIS MMU emulation, by Edgar E. Iglesias. (diff)
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CRIS support in toplevel, by Edgar E. Iglesias.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3363 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'softmmu_header.h')
-rw-r--r--softmmu_header.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/softmmu_header.h b/softmmu_header.h
index 768b87781..384518bb6 100644
--- a/softmmu_header.h
+++ b/softmmu_header.h
@@ -67,6 +67,9 @@
#define CPU_MEM_INDEX ((env->ps >> 3) & 3)
#elif defined (TARGET_M68K)
#define CPU_MEM_INDEX ((env->sr & SR_S) == 0)
+#elif defined (TARGET_CRIS)
+/* CRIS FIXME: I guess we want to validate supervisor mode acceses here. */
+#define CPU_MEM_INDEX (0)
#else
#error unsupported CPU
#endif
@@ -90,6 +93,9 @@
#define CPU_MEM_INDEX ((env->ps >> 3) & 3)
#elif defined (TARGET_M68K)
#define CPU_MEM_INDEX ((env->sr & SR_S) == 0)
+#elif defined (TARGET_CRIS)
+/* CRIS FIXME: I guess we want to validate supervisor mode acceses here. */
+#define CPU_MEM_INDEX (0)
#else
#error unsupported CPU
#endif