summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJuha Riihimäki <juha.riihimaki@nokia.com>2009-10-26 11:46:42 +0200
committerAurelien Jarno <aurelien@aurel32.net>2009-10-27 09:46:26 +0100
commit71b3c3dea21a310c5df7406cdc1cffc64cf14c18 (patch)
tree3c4f9947cdbc9c45978bf7b4852207453f905c0b /target-arm
parenttarget-arm: add support for neon vld1.64/vst1.64 instructions (diff)
downloadqemu-kvm-71b3c3dea21a310c5df7406cdc1cffc64cf14c18.tar.gz
qemu-kvm-71b3c3dea21a310c5df7406cdc1cffc64cf14c18.tar.bz2
qemu-kvm-71b3c3dea21a310c5df7406cdc1cffc64cf14c18.zip
target-arm: allow modifying vfp fpexc en bit only
All other bits except for the EN in the VFP FPEXC register are defined as subarchitecture specific and real functionality for any of the other bits has not been implemented in QEMU. However, current code allows modifying all bits in the VFP FPEXC register leading to problems when guest code is writing 1's to the subarchitecture specific bits and checking whether the bits stay up to verify the existence of functionality which in fact does not exist in QEMU. This patch has been revised to include the same behavior change in the gdb register write function. Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/helper.c2
-rw-r--r--target-arm/translate.c3
2 files changed, 4 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 021d121df..5e10533f1 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -234,7 +234,7 @@ static int vfp_gdb_set_reg(CPUState *env, uint8_t *buf, int reg)
switch (reg - nregs) {
case 0: env->vfp.xregs[ARM_VFP_FPSID] = ldl_p(buf); return 4;
case 1: env->vfp.xregs[ARM_VFP_FPSCR] = ldl_p(buf); return 4;
- case 2: env->vfp.xregs[ARM_VFP_FPEXC] = ldl_p(buf); return 4;
+ case 2: env->vfp.xregs[ARM_VFP_FPEXC] = ldl_p(buf) & (1 << 30); return 4;
}
return 0;
}
diff --git a/target-arm/translate.c b/target-arm/translate.c
index f0ebf4fad..70cf1b268 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -2788,6 +2788,9 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn)
case ARM_VFP_FPEXC:
if (IS_USER(s))
return 1;
+ /* TODO: VFP subarchitecture support.
+ * For now, keep the EN bit only */
+ tcg_gen_andi_i32(tmp, tmp, 1 << 30);
store_cpu_field(tmp, vfp.xregs[rn]);
gen_lookup_tb(s);
break;