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authorJuha.Riihimaki@nokia.com <Juha.Riihimaki@nokia.com>2009-10-21 12:17:38 +0200
committerAurelien Jarno <aurelien@aurel32.net>2009-10-23 17:22:13 +0200
commit7b2919a0b4b3e408e5fee0841c8d717e888917de (patch)
treedf7ff7a06a1b44a2f069bef54b966c2293bffe72 /target-arm
parenttarget-arm: cleanup internal resource leaks (diff)
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target-arm: optimize thumb 32-bit multiply
Current implementation of thumb mul instruction is implemented as a 32x32->64 multiply which then uses only 32 least significant bits of the result. Replace that with a simple 32x32->32 multiply. Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/translate.c18
1 files changed, 1 insertions, 17 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 813f661ca..9d13d42ab 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -310,22 +310,6 @@ static TCGv_i64 gen_muls_i64_i32(TCGv a, TCGv b)
return tmp1;
}
-/* Unsigned 32x32->64 multiply. */
-static void gen_mull(TCGv a, TCGv b)
-{
- TCGv_i64 tmp1 = tcg_temp_new_i64();
- TCGv_i64 tmp2 = tcg_temp_new_i64();
-
- tcg_gen_extu_i32_i64(tmp1, a);
- tcg_gen_extu_i32_i64(tmp2, b);
- tcg_gen_mul_i64(tmp1, tmp1, tmp2);
- tcg_temp_free_i64(tmp2);
- tcg_gen_trunc_i64_i32(a, tmp1);
- tcg_gen_shri_i64(tmp1, tmp1, 32);
- tcg_gen_trunc_i64_i32(b, tmp1);
- tcg_temp_free_i64(tmp1);
-}
-
/* Signed 32x32->64 multiply. */
static void gen_imull(TCGv a, TCGv b)
{
@@ -8363,7 +8347,7 @@ static void disas_thumb_insn(CPUState *env, DisasContext *s)
gen_logic_CC(tmp);
break;
case 0xd: /* mul */
- gen_mull(tmp, tmp2);
+ tcg_gen_mul_i32(tmp, tmp, tmp2);
if (!s->condexec_mask)
gen_logic_CC(tmp);
break;