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-rw-r--r--.gitignore1
-rw-r--r--Makefile2
-rw-r--r--audio/alsaaudio.c55
-rw-r--r--audio/ossaudio.c68
-rw-r--r--audio/sdlaudio.c80
-rw-r--r--block/vdi.c4
-rw-r--r--block/vvfat.c4
-rw-r--r--bsd-user/elfload.c4
-rwxr-xr-xconfigure37
-rw-r--r--gdbstub.c2
-rw-r--r--hw/cirrus_vga.c2
-rw-r--r--hw/eepro100.c102
-rw-r--r--hw/escc.c8
-rw-r--r--hw/omap_dma.c122
-rw-r--r--hw/twl92230.c4
-rw-r--r--hw/vga.c24
-rw-r--r--linux-user/arm/nwfpe/fpa11.c2
-rw-r--r--linux-user/elfload.c4
-rw-r--r--linux-user/syscall.c2
-rw-r--r--monitor.c3
-rw-r--r--net.c2
-rw-r--r--slirp/ip_input.c2
-rw-r--r--target-i386/cpu.h5
-rw-r--r--target-i386/helper.h1
-rw-r--r--target-i386/machine.c4
-rw-r--r--target-i386/op_helper.c22
-rw-r--r--target-i386/ops_sse.h44
-rw-r--r--target-i386/ops_sse_header.h4
-rw-r--r--target-i386/translate.c304
-rw-r--r--target-mips/helper.c1
-rw-r--r--target-mips/translate.c18
-rw-r--r--tcg/i386/tcg-target.c8
-rw-r--r--tcg/i386/tcg-target.h2
-rw-r--r--tcg/tcg-op.h24
-rw-r--r--tcg/tcg-opc.h15
-rw-r--r--tcg/tcg.c5
-rw-r--r--tcg/tcg.h2
-rw-r--r--tcg/x86_64/tcg-target.c20
-rw-r--r--tcg/x86_64/tcg-target.h6
-rw-r--r--tests/sha1.c2
-rw-r--r--vl.c3
41 files changed, 708 insertions, 316 deletions
diff --git a/.gitignore b/.gitignore
index 59a0244e3..f6cbffb57 100644
--- a/.gitignore
+++ b/.gitignore
@@ -6,6 +6,7 @@ i386
*-bsd-user
libhw32
libhw64
+libuser
qemu-doc.html
qemu-tech.html
qemu-doc.info
diff --git a/Makefile b/Makefile
index 54210e210..ef585d094 100644
--- a/Makefile
+++ b/Makefile
@@ -342,6 +342,7 @@ tarbin:
$(bindir)/qemu-system-arm \
$(bindir)/qemu-system-cris \
$(bindir)/qemu-system-m68k \
+ $(bindir)/qemu-system-microblaze \
$(bindir)/qemu-system-mips \
$(bindir)/qemu-system-mipsel \
$(bindir)/qemu-system-mips64 \
@@ -359,6 +360,7 @@ tarbin:
$(bindir)/qemu-armeb \
$(bindir)/qemu-cris \
$(bindir)/qemu-m68k \
+ $(bindir)/qemu-microblaze \
$(bindir)/qemu-mips \
$(bindir)/qemu-mipsel \
$(bindir)/qemu-ppc \
diff --git a/audio/alsaaudio.c b/audio/alsaaudio.c
index a4baebcb4..7698d1010 100644
--- a/audio/alsaaudio.c
+++ b/audio/alsaaudio.c
@@ -74,7 +74,8 @@ static struct {
int period_size_out_overridden;
int verbose;
} conf = {
- .buffer_size_out = 1024,
+ .buffer_size_out = 4096,
+ .period_size_out = 1024,
.pcm_name_out = "default",
.pcm_name_in = "default",
};
@@ -861,22 +862,25 @@ static int alsa_voice_ctl (snd_pcm_t *handle, const char *typ, int pause)
static int alsa_ctl_out (HWVoiceOut *hw, int cmd, ...)
{
- va_list ap;
- int poll_mode;
ALSAVoiceOut *alsa = (ALSAVoiceOut *) hw;
- va_start (ap, cmd);
- poll_mode = va_arg (ap, int);
- va_end (ap);
-
switch (cmd) {
case VOICE_ENABLE:
- ldebug ("enabling voice\n");
- if (poll_mode && alsa_poll_out (hw)) {
- poll_mode = 0;
+ {
+ va_list ap;
+ int poll_mode;
+
+ va_start (ap, cmd);
+ poll_mode = va_arg (ap, int);
+ va_end (ap);
+
+ ldebug ("enabling voice\n");
+ if (poll_mode && alsa_poll_out (hw)) {
+ poll_mode = 0;
+ }
+ hw->poll_mode = poll_mode;
+ return alsa_voice_ctl (alsa->handle, "playback", 0);
}
- hw->poll_mode = poll_mode;
- return alsa_voice_ctl (alsa->handle, "playback", 0);
case VOICE_DISABLE:
ldebug ("disabling voice\n");
@@ -1075,23 +1079,26 @@ static int alsa_read (SWVoiceIn *sw, void *buf, int size)
static int alsa_ctl_in (HWVoiceIn *hw, int cmd, ...)
{
- va_list ap;
- int poll_mode;
ALSAVoiceIn *alsa = (ALSAVoiceIn *) hw;
- va_start (ap, cmd);
- poll_mode = va_arg (ap, int);
- va_end (ap);
-
switch (cmd) {
case VOICE_ENABLE:
- ldebug ("enabling voice\n");
- if (poll_mode && alsa_poll_in (hw)) {
- poll_mode = 0;
- }
- hw->poll_mode = poll_mode;
+ {
+ va_list ap;
+ int poll_mode;
+
+ va_start (ap, cmd);
+ poll_mode = va_arg (ap, int);
+ va_end (ap);
- return alsa_voice_ctl (alsa->handle, "capture", 0);
+ ldebug ("enabling voice\n");
+ if (poll_mode && alsa_poll_in (hw)) {
+ poll_mode = 0;
+ }
+ hw->poll_mode = poll_mode;
+
+ return alsa_voice_ctl (alsa->handle, "capture", 0);
+ }
case VOICE_DISABLE:
ldebug ("disabling voice\n");
diff --git a/audio/ossaudio.c b/audio/ossaudio.c
index 946a9dc98..4002f1467 100644
--- a/audio/ossaudio.c
+++ b/audio/ossaudio.c
@@ -583,34 +583,37 @@ static int oss_init_out (HWVoiceOut *hw, struct audsettings *as)
static int oss_ctl_out (HWVoiceOut *hw, int cmd, ...)
{
int trig;
- va_list ap;
- int poll_mode;
OSSVoiceOut *oss = (OSSVoiceOut *) hw;
- va_start (ap, cmd);
- poll_mode = va_arg (ap, int);
- va_end (ap);
-
switch (cmd) {
case VOICE_ENABLE:
- ldebug ("enabling voice\n");
- if (poll_mode && oss_poll_out (hw)) {
- poll_mode = 0;
- }
- hw->poll_mode = poll_mode;
+ {
+ va_list ap;
+ int poll_mode;
- if (!oss->mmapped) {
- return 0;
- }
+ va_start (ap, cmd);
+ poll_mode = va_arg (ap, int);
+ va_end (ap);
- audio_pcm_info_clear_buf (&hw->info, oss->pcm_buf, hw->samples);
- trig = PCM_ENABLE_OUTPUT;
- if (ioctl (oss->fd, SNDCTL_DSP_SETTRIGGER, &trig) < 0) {
- oss_logerr (
- errno,
- "SNDCTL_DSP_SETTRIGGER PCM_ENABLE_OUTPUT failed\n"
- );
- return -1;
+ ldebug ("enabling voice\n");
+ if (poll_mode && oss_poll_out (hw)) {
+ poll_mode = 0;
+ }
+ hw->poll_mode = poll_mode;
+
+ if (!oss->mmapped) {
+ return 0;
+ }
+
+ audio_pcm_info_clear_buf (&hw->info, oss->pcm_buf, hw->samples);
+ trig = PCM_ENABLE_OUTPUT;
+ if (ioctl (oss->fd, SNDCTL_DSP_SETTRIGGER, &trig) < 0) {
+ oss_logerr (
+ errno,
+ "SNDCTL_DSP_SETTRIGGER PCM_ENABLE_OUTPUT failed\n"
+ );
+ return -1;
+ }
}
break;
@@ -778,20 +781,23 @@ static int oss_read (SWVoiceIn *sw, void *buf, int size)
static int oss_ctl_in (HWVoiceIn *hw, int cmd, ...)
{
- va_list ap;
- int poll_mode;
OSSVoiceIn *oss = (OSSVoiceIn *) hw;
- va_start (ap, cmd);
- poll_mode = va_arg (ap, int);
- va_end (ap);
-
switch (cmd) {
case VOICE_ENABLE:
- if (poll_mode && oss_poll_in (hw)) {
- poll_mode = 0;
+ {
+ va_list ap;
+ int poll_mode;
+
+ va_start (ap, cmd);
+ poll_mode = va_arg (ap, int);
+ va_end (ap);
+
+ if (poll_mode && oss_poll_in (hw)) {
+ poll_mode = 0;
+ }
+ hw->poll_mode = poll_mode;
}
- hw->poll_mode = poll_mode;
break;
case VOICE_DISABLE:
diff --git a/audio/sdlaudio.c b/audio/sdlaudio.c
index 8e7e5cb70..aa39c3379 100644
--- a/audio/sdlaudio.c
+++ b/audio/sdlaudio.c
@@ -41,8 +41,8 @@
typedef struct SDLVoiceOut {
HWVoiceOut hw;
int live;
- int rpos;
int decr;
+ int pending;
} SDLVoiceOut;
static struct {
@@ -225,6 +225,10 @@ static void sdl_callback (void *opaque, Uint8 *buf, int len)
HWVoiceOut *hw = &sdl->hw;
int samples = len >> hw->info.shift;
+ if (sdl_lock (s, "sdl_callback")) {
+ return;
+ }
+
if (s->exit) {
return;
}
@@ -232,49 +236,34 @@ static void sdl_callback (void *opaque, Uint8 *buf, int len)
while (samples) {
int to_mix, decr;
- /* dolog ("in callback samples=%d\n", samples); */
- sdl_wait (s, "sdl_callback");
- if (s->exit) {
- return;
- }
-
- if (sdl_lock (s, "sdl_callback")) {
- return;
- }
-
- if (audio_bug (AUDIO_FUNC, sdl->live < 0 || sdl->live > hw->samples)) {
- dolog ("sdl->live=%d hw->samples=%d\n",
- sdl->live, hw->samples);
- return;
- }
-
- if (!sdl->live) {
- goto again;
+ while (!sdl->pending) {
+ if (sdl_unlock (s, "sdl_callback")) {
+ return;
+ }
+
+ sdl_wait (s, "sdl_callback");
+ if (s->exit) {
+ return;
+ }
+
+ if (sdl_lock (s, "sdl_callback")) {
+ return;
+ }
+ sdl->pending += sdl->live;
+ sdl->live = 0;
}
- /* dolog ("in callback live=%d\n", live); */
- to_mix = audio_MIN (samples, sdl->live);
- decr = to_mix;
- while (to_mix) {
- int chunk = audio_MIN (to_mix, hw->samples - hw->rpos);
- struct st_sample *src = hw->mix_buf + hw->rpos;
-
- /* dolog ("in callback to_mix %d, chunk %d\n", to_mix, chunk); */
- hw->clip (buf, src, chunk);
- sdl->rpos = (sdl->rpos + chunk) % hw->samples;
- to_mix -= chunk;
- buf += chunk << hw->info.shift;
- }
+ to_mix = audio_MIN (samples, sdl->pending);
+ decr = audio_pcm_hw_clip_out (hw, buf, to_mix, 0);
+ buf += decr << hw->info.shift;
samples -= decr;
- sdl->live -= decr;
sdl->decr += decr;
+ sdl->pending -= decr;
+ }
- again:
- if (sdl_unlock (s, "sdl_callback")) {
- return;
- }
+ if (sdl_unlock (s, "sdl_callback")) {
+ return;
}
- /* dolog ("done len=%d\n", len); */
}
static int sdl_write_out (SWVoiceOut *sw, void *buf, int len)
@@ -292,18 +281,9 @@ static int sdl_run_out (HWVoiceOut *hw, int live)
return 0;
}
- if (sdl->decr > live) {
- ldebug ("sdl->decr %d live %d sdl->live %d\n",
- sdl->decr,
- live,
- sdl->live);
- }
-
- decr = audio_MIN (sdl->decr, live);
- sdl->decr -= decr;
-
- sdl->live = live - decr;
- hw->rpos = sdl->rpos;
+ sdl->live = live;
+ decr = sdl->decr;
+ sdl->decr = 0;
if (sdl->live > 0) {
sdl_unlock_and_post (s, "sdl_run_out");
diff --git a/block/vdi.c b/block/vdi.c
index f5e38dbd2..45aa81c70 100644
--- a/block/vdi.c
+++ b/block/vdi.c
@@ -53,7 +53,7 @@
#include "block_int.h"
#include "module.h"
-#if defined(HAVE_UUID_H)
+#if defined(CONFIG_UUID)
#include <uuid/uuid.h>
#else
/* TODO: move uuid emulation to some central place in QEMU. */
@@ -116,7 +116,7 @@ void uuid_unparse(const uuid_t uu, char *out);
/* Unallocated blocks use this index (no need to convert endianess). */
#define VDI_UNALLOCATED UINT32_MAX
-#if !defined(HAVE_UUID_H)
+#if !defined(CONFIG_UUID)
void uuid_generate(uuid_t out)
{
memset(out, 0, sizeof(out));
diff --git a/block/vvfat.c b/block/vvfat.c
index 1e37b9f9f..063f7318c 100644
--- a/block/vvfat.c
+++ b/block/vvfat.c
@@ -379,7 +379,7 @@ static void init_mbr(BDRVVVFATState* s)
{
/* TODO: if the files mbr.img and bootsect.img exist, use them */
mbr_t* real_mbr=(mbr_t*)s->first_sectors;
- partition_t* partition=&(real_mbr->partition[0]);
+ partition_t* partition = &(real_mbr->partition[0]);
int lba;
memset(s->first_sectors,0,512);
@@ -526,7 +526,7 @@ static uint16_t fat_datetime(time_t time,int return_time) {
t=localtime(&time); /* this is not thread safe */
#else
struct tm t1;
- t=&t1;
+ t = &t1;
localtime_r(&time,t);
#endif
if(return_time)
diff --git a/bsd-user/elfload.c b/bsd-user/elfload.c
index 19981f0a9..8ac14b795 100644
--- a/bsd-user/elfload.c
+++ b/bsd-user/elfload.c
@@ -1246,7 +1246,7 @@ int load_elf_binary(struct linux_binprm * bprm, struct target_pt_regs * regs,
}
#if 0
- printf("Using ELF interpreter %s\n", elf_interpreter);
+ printf("Using ELF interpreter %s\n", path(elf_interpreter));
#endif
if (retval >= 0) {
retval = open(path(elf_interpreter), O_RDONLY);
@@ -1268,7 +1268,7 @@ int load_elf_binary(struct linux_binprm * bprm, struct target_pt_regs * regs,
}
if (retval >= 0) {
interp_ex = *((struct exec *) bprm->buf); /* aout exec-header */
- interp_elf_ex=*((struct elfhdr *) bprm->buf); /* elf exec-header */
+ interp_elf_ex = *((struct elfhdr *) bprm->buf); /* elf exec-header */
}
if (retval < 0) {
perror("load_elf_binary3");
diff --git a/configure b/configure
index 3153cc670..28e5b78c3 100755
--- a/configure
+++ b/configure
@@ -197,6 +197,7 @@ kvm=""
nptl=""
sdl=""
sparse="no"
+uuid=""
vde=""
vnc_tls=""
vnc_sasl=""
@@ -314,6 +315,7 @@ SunOS)
solaris="yes"
make="gmake"
install="ginstall"
+ ld="gld"
needs_libsunmath="no"
solarisrev=`uname -r | cut -f2 -d.`
# have to select again, because `uname -m` returns i86pc
@@ -473,6 +475,10 @@ for opt do
;;
--disable-slirp) slirp="no"
;;
+ --disable-uuid) uuid="no"
+ ;;
+ --enable-uuid) uuid="yes"
+ ;;
--disable-vde) vde="no"
;;
--enable-vde) vde="yes"
@@ -733,6 +739,8 @@ echo " --fmod-inc path to FMOD includes"
echo " --oss-lib path to OSS library"
echo " --enable-uname-release=R Return R for uname -r in usermode emulation"
echo " --sparc_cpu=V Build qemu for Sparc architecture v7, v8, v8plus, v8plusa, v9"
+echo " --disable-uuid disable uuid support"
+echo " --enable-uuid enable uuid support"
echo " --disable-vde disable support for vde network"
echo " --enable-vde enable support for vde network"
echo " --disable-linux-aio disable Linux AIO support"
@@ -1087,6 +1095,31 @@ if compile_prog "" "" ; then
fi
##########################################
+# uuid_generate() probe, used for vdi block driver
+if test "$uuid" != "no" ; then
+ uuid_libs="-luuid"
+ cat > $TMPC << EOF
+#include <uuid/uuid.h>
+int main(void)
+{
+ uuid_t my_uuid;
+ uuid_generate(my_uuid);
+ return 0;
+}
+EOF
+ if compile_prog "" "$uuid_libs" ; then
+ uuid="yes"
+ libs_softmmu="$uuid_libs $libs_softmmu"
+ libs_tools="$uuid_libs $libs_tools"
+ else
+ if test "$uuid" = "yes" ; then
+ feature_not_found "uuid"
+ fi
+ uuid=no
+ fi
+fi
+
+##########################################
# vde libraries probe
if test "$vde" != "no" ; then
vde_libs="-lvdeplug"
@@ -1898,6 +1931,7 @@ echo "KVM trace support $kvm_trace"
echo "fdt support $fdt"
echo "preadv support $preadv"
echo "fdatasync $fdatasync"
+echo "uuid support $uuid"
if test $sdl_too_old = "yes"; then
echo "-> Your SDL version is too old - please upgrade to have SDL support"
@@ -2008,6 +2042,9 @@ fi
if test "$fnmatch" = "yes" ; then
echo "CONFIG_FNMATCH=y" >> $config_host_mak
fi
+if test "$uuid" = "yes" ; then
+ echo "CONFIG_UUID=y" >> $config_host_mak
+fi
qemu_version=`head $source_path/VERSION`
echo "VERSION=$qemu_version" >>$config_host_mak
echo "PKGVERSION=$pkgversion" >>$config_host_mak
diff --git a/gdbstub.c b/gdbstub.c
index a33aba037..ecf98c343 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -1314,7 +1314,7 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
else if (n<63) {
uint64_t val;
- val=*((uint64_t *)&env->fir[n-32]);
+ val = *((uint64_t *)&env->fir[n-32]);
GET_REGL(val);
}
else if (n==63) {
diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c
index 2e10658c9..463f7508d 100644
--- a/hw/cirrus_vga.c
+++ b/hw/cirrus_vga.c
@@ -1491,9 +1491,11 @@ cirrus_vga_write_gr(CirrusVGAState * s, unsigned reg_index, int reg_value)
#endif
switch (reg_index) {
case 0x00: // Standard VGA, BGCOLOR 0x000000ff
+ s->vga.gr[reg_index] = reg_value & gr_mask[reg_index];
s->cirrus_shadow_gr0 = reg_value;
break;
case 0x01: // Standard VGA, FGCOLOR 0x000000ff
+ s->vga.gr[reg_index] = reg_value & gr_mask[reg_index];
s->cirrus_shadow_gr1 = reg_value;
break;
case 0x02: // Standard VGA
diff --git a/hw/eepro100.c b/hw/eepro100.c
index 3f84e26f5..1d66edb99 100644
--- a/hw/eepro100.c
+++ b/hw/eepro100.c
@@ -78,10 +78,15 @@
#define MAX_ETH_FRAME_SIZE 1514
/* This driver supports several different devices which are declared here. */
+#define i82550 0x82550
#define i82551 0x82551
+#define i82557A 0x82557a
#define i82557B 0x82557b
#define i82557C 0x82557c
+#define i82558A 0x82558a
#define i82558B 0x82558b
+#define i82559A 0x82559a
+#define i82559B 0x82559b
#define i82559C 0x82559c
#define i82559ER 0x82559e
#define i82562 0x82562
@@ -1758,9 +1763,9 @@ static void nic_cleanup(VLANClientState *vc)
eeprom93xx_free(s->eeprom);
}
-static int pci_nic_uninit(PCIDevice *dev)
+static int pci_nic_uninit(PCIDevice *pci_dev)
{
- EEPRO100State *s = DO_UPCAST(EEPRO100State, dev, dev);
+ EEPRO100State *s = DO_UPCAST(EEPRO100State, dev, pci_dev);
cpu_unregister_io_memory(s->mmio_index);
@@ -1814,35 +1819,116 @@ static int nic_init(PCIDevice *pci_dev, uint32_t device)
return 0;
}
-static int pci_i82551_init(PCIDevice *dev)
+static int pci_i82550_init(PCIDevice *pci_dev)
+{
+ return nic_init(pci_dev, i82550);
+}
+
+static int pci_i82551_init(PCIDevice *pci_dev)
+{
+ return nic_init(pci_dev, i82551);
+}
+
+static int pci_i82557a_init(PCIDevice *pci_dev)
+{
+ return nic_init(pci_dev, i82557A);
+}
+
+static int pci_i82557b_init(PCIDevice *pci_dev)
+{
+ return nic_init(pci_dev, i82557B);
+}
+
+static int pci_i82557c_init(PCIDevice *pci_dev)
+{
+ return nic_init(pci_dev, i82557C);
+}
+
+static int pci_i82558a_init(PCIDevice *pci_dev)
+{
+ return nic_init(pci_dev, i82558A);
+}
+
+static int pci_i82558b_init(PCIDevice *pci_dev)
+{
+ return nic_init(pci_dev, i82558B);
+}
+
+static int pci_i82559a_init(PCIDevice *pci_dev)
+{
+ return nic_init(pci_dev, i82559A);
+}
+
+static int pci_i82559b_init(PCIDevice *pci_dev)
+{
+ return nic_init(pci_dev, i82559B);
+}
+
+static int pci_i82559c_init(PCIDevice *pci_dev)
{
- return nic_init(dev, i82551);
+ return nic_init(pci_dev, i82559C);
}
-static int pci_i82557b_init(PCIDevice *dev)
+static int pci_i82559er_init(PCIDevice *pci_dev)
{
- return nic_init(dev, i82557B);
+ return nic_init(pci_dev, i82559ER);
}
-static int pci_i82559er_init(PCIDevice *dev)
+static int pci_i82562_init(PCIDevice *pci_dev)
{
- return nic_init(dev, i82559ER);
+ return nic_init(pci_dev, i82562);
}
static PCIDeviceInfo eepro100_info[] = {
{
+ .qdev.name = "i82550",
+ .qdev.size = sizeof(EEPRO100State),
+ .init = pci_i82550_init,
+ },{
.qdev.name = "i82551",
.qdev.size = sizeof(EEPRO100State),
.init = pci_i82551_init,
},{
+ .qdev.name = "i82557a",
+ .qdev.size = sizeof(EEPRO100State),
+ .init = pci_i82557a_init,
+ },{
.qdev.name = "i82557b",
.qdev.size = sizeof(EEPRO100State),
.init = pci_i82557b_init,
},{
+ .qdev.name = "i82557c",
+ .qdev.size = sizeof(EEPRO100State),
+ .init = pci_i82557c_init,
+ },{
+ .qdev.name = "i82558a",
+ .qdev.size = sizeof(EEPRO100State),
+ .init = pci_i82558a_init,
+ },{
+ .qdev.name = "i82558b",
+ .qdev.size = sizeof(EEPRO100State),
+ .init = pci_i82558b_init,
+ },{
+ .qdev.name = "i82559a",
+ .qdev.size = sizeof(EEPRO100State),
+ .init = pci_i82559a_init,
+ },{
+ .qdev.name = "i82559b",
+ .qdev.size = sizeof(EEPRO100State),
+ .init = pci_i82559b_init,
+ },{
+ .qdev.name = "i82559c",
+ .qdev.size = sizeof(EEPRO100State),
+ .init = pci_i82559c_init,
+ },{
.qdev.name = "i82559er",
.qdev.size = sizeof(EEPRO100State),
.init = pci_i82559er_init,
},{
+ .qdev.name = "i82562",
+ .qdev.size = sizeof(EEPRO100State),
+ .init = pci_i82562_init,
+ },{
/* end of list */
}
};
diff --git a/hw/escc.c b/hw/escc.c
index 17694ed3f..382719ded 100644
--- a/hw/escc.c
+++ b/hw/escc.c
@@ -869,18 +869,18 @@ static void sunmouse_event(void *opaque,
ch = dx;
if (ch > 127)
- ch=127;
+ ch = 127;
else if (ch < -127)
- ch=-127;
+ ch = -127;
put_queue(s, ch & 0xff);
ch = -dy;
if (ch > 127)
- ch=127;
+ ch = 127;
else if (ch < -127)
- ch=-127;
+ ch = -127;
put_queue(s, ch & 0xff);
diff --git a/hw/omap_dma.c b/hw/omap_dma.c
index 6f5eacacf..3e718ba7f 100644
--- a/hw/omap_dma.c
+++ b/hw/omap_dma.c
@@ -591,84 +591,88 @@ static void omap_dma_transfer_setup(struct soc_dma_ch_s *dma)
if (dma->update) {
#endif
- /* If the channel is element synchronized, deactivate it */
- if (min_elems == elements[omap_dma_intr_element_sync])
- omap_dma_deactivate_channel(s, ch);
+ /* If the channel is element synchronized, deactivate it */
+ if (min_elems == elements[omap_dma_intr_element_sync])
+ omap_dma_deactivate_channel(s, ch);
- /* If it is the last frame, set the LAST_FRAME interrupt */
- if (min_elems == elements[omap_dma_intr_last_frame])
- ch->status |= LAST_FRAME_INTR;
+ /* If it is the last frame, set the LAST_FRAME interrupt */
+ if (min_elems == elements[omap_dma_intr_last_frame])
+ ch->status |= LAST_FRAME_INTR;
- /* If exactly half of the frame was reached, set the HALF_FRAME
- interrupt */
- if (min_elems == elements[omap_dma_intr_half_frame])
- ch->status |= HALF_FRAME_INTR;
+ /* If exactly half of the frame was reached, set the HALF_FRAME
+ interrupt */
+ if (min_elems == elements[omap_dma_intr_half_frame])
+ ch->status |= HALF_FRAME_INTR;
- /* If a full packet has been transferred, set the END_PKT interrupt */
- if (min_elems == elements[omap_dma_intr_packet])
- ch->status |= END_PKT_INTR;
+ /* If a full packet has been transferred, set the END_PKT interrupt */
+ if (min_elems == elements[omap_dma_intr_packet])
+ ch->status |= END_PKT_INTR;
- /* If the channel is packet-synchronized, deactivate it */
- if (min_elems == elements[omap_dma_intr_packet_sync])
- omap_dma_deactivate_channel(s, ch);
+ /* If the channel is packet-synchronized, deactivate it */
+ if (min_elems == elements[omap_dma_intr_packet_sync])
+ omap_dma_deactivate_channel(s, ch);
- /* If the channel is frame synchronized, deactivate it */
- if (min_elems == elements[omap_dma_intr_frame_sync])
- omap_dma_deactivate_channel(s, ch);
+ /* If the channel is frame synchronized, deactivate it */
+ if (min_elems == elements[omap_dma_intr_frame_sync])
+ omap_dma_deactivate_channel(s, ch);
- /* Set the END_FRAME interrupt */
- if (min_elems == elements[omap_dma_intr_frame])
- ch->status |= END_FRAME_INTR;
+ /* Set the END_FRAME interrupt */
+ if (min_elems == elements[omap_dma_intr_frame])
+ ch->status |= END_FRAME_INTR;
- if (min_elems == elements[omap_dma_intr_block]) {
- /* End of Block */
- /* Disable the channel */
+ if (min_elems == elements[omap_dma_intr_block]) {
+ /* End of Block */
+ /* Disable the channel */
- if (ch->omap_3_1_compatible_disable) {
- omap_dma_disable_channel(s, ch);
- if (ch->link_enabled)
- omap_dma_enable_channel(s, &s->ch[ch->link_next_ch]);
- } else {
- if (!ch->auto_init)
+ if (ch->omap_3_1_compatible_disable) {
omap_dma_disable_channel(s, ch);
- else if (ch->repeat || ch->end_prog)
- omap_dma_channel_load(ch);
- else {
- ch->waiting_end_prog = 1;
- omap_dma_deactivate_channel(s, ch);
+ if (ch->link_enabled)
+ omap_dma_enable_channel(s, &s->ch[ch->link_next_ch]);
+ } else {
+ if (!ch->auto_init)
+ omap_dma_disable_channel(s, ch);
+ else if (ch->repeat || ch->end_prog)
+ omap_dma_channel_load(ch);
+ else {
+ ch->waiting_end_prog = 1;
+ omap_dma_deactivate_channel(s, ch);
+ }
}
- }
- if (ch->interrupts & END_BLOCK_INTR)
- ch->status |= END_BLOCK_INTR;
- }
+ if (ch->interrupts & END_BLOCK_INTR)
+ ch->status |= END_BLOCK_INTR;
+ }
- /* Update packet number */
- if (ch->fs && ch->bs) {
- a->pck_element += min_elems;
- a->pck_element %= a->pck_elements;
- }
+ /* Update packet number */
+ if (ch->fs && ch->bs) {
+ a->pck_element += min_elems;
+ a->pck_element %= a->pck_elements;
+ }
- /* TODO: check if we really need to update anything here or perhaps we
- * can skip part of this. */
+ /* TODO: check if we really need to update anything here or perhaps we
+ * can skip part of this. */
#ifndef MULTI_REQ
- if (dma->update) {
+ if (dma->update) {
#endif
- a->element += min_elems;
+ a->element += min_elems;
- frames = a->element / a->elements;
- a->element = a->element % a->elements;
- a->frame += frames;
- a->src += min_elems * a->elem_delta[0] + frames * a->frame_delta[0];
- a->dest += min_elems * a->elem_delta[1] + frames * a->frame_delta[1];
+ frames = a->element / a->elements;
+ a->element = a->element % a->elements;
+ a->frame += frames;
+ a->src += min_elems * a->elem_delta[0] + frames * a->frame_delta[0];
+ a->dest += min_elems * a->elem_delta[1] + frames * a->frame_delta[1];
- /* If the channel is async, update cpc */
- if (!ch->sync && frames)
- ch->cpc = a->dest & 0xffff;
+ /* If the channel is async, update cpc */
+ if (!ch->sync && frames)
+ ch->cpc = a->dest & 0xffff;
- /* TODO: if the destination port is IMIF or EMIFF, set the dirty
- * bits on it. */
+ /* TODO: if the destination port is IMIF or EMIFF, set the dirty
+ * bits on it. */
+#ifndef MULTI_REQ
+ }
+#else
}
+#endif
omap_dma_interrupts_update(s);
}
diff --git a/hw/twl92230.c b/hw/twl92230.c
index b15a8bf95..68fab884a 100644
--- a/hw/twl92230.c
+++ b/hw/twl92230.c
@@ -73,14 +73,14 @@ static inline void menelaus_update(MenelausState *s)
static inline void menelaus_rtc_start(MenelausState *s)
{
- s->rtc.next =+ qemu_get_clock(rt_clock);
+ s->rtc.next += qemu_get_clock(rt_clock);
qemu_mod_timer(s->rtc.hz_tm, s->rtc.next);
}
static inline void menelaus_rtc_stop(MenelausState *s)
{
qemu_del_timer(s->rtc.hz_tm);
- s->rtc.next =- qemu_get_clock(rt_clock);
+ s->rtc.next -= qemu_get_clock(rt_clock);
if (s->rtc.next < 1)
s->rtc.next = 1;
}
diff --git a/hw/vga.c b/hw/vga.c
index 29a9f817f..9dc4cbf11 100644
--- a/hw/vga.c
+++ b/hw/vga.c
@@ -1592,6 +1592,18 @@ static void mark_dirty(target_phys_addr_t start, target_phys_addr_t len)
}
}
+void vga_dirty_log_stop(VGACommonState *s)
+{
+ if (kvm_enabled() && s->map_addr && s1)
+ kvm_log_stop(s->map_addr, s->map_end - s->map_addr);
+
+ if (kvm_enabled() && s->lfb_vram_mapped && s2) {
+ kvm_log_stop(isa_mem_base + 0xa0000, 0x8000);
+ kvm_log_stop(isa_mem_base + 0xa8000, 0x8000);
+ }
+ s1 = s2 = 0;
+}
+
void vga_dirty_log_start(VGACommonState *s)
{
if (kvm_enabled() && s->map_addr)
@@ -1610,18 +1622,6 @@ void vga_dirty_log_start(VGACommonState *s)
}
}
-void vga_dirty_log_stop(VGACommonState *s)
-{
- if (kvm_enabled() && s->map_addr && s1)
- kvm_log_stop(s->map_addr, s->map_end - s->map_addr);
-
- if (kvm_enabled() && s->lfb_vram_mapped && s2) {
- kvm_log_stop(isa_mem_base + 0xa0000, 0x8000);
- kvm_log_stop(isa_mem_base + 0xa8000, 0x8000);
- }
- s1 = s2 = 0;
-}
-
/*
* graphic modes
*/
diff --git a/linux-user/arm/nwfpe/fpa11.c b/linux-user/arm/nwfpe/fpa11.c
index 3ff80ebc8..17a60486e 100644
--- a/linux-user/arm/nwfpe/fpa11.c
+++ b/linux-user/arm/nwfpe/fpa11.c
@@ -191,7 +191,7 @@ unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, CPUARMState* qregs)
if(nRc == 1 && get_float_exception_flags(&fpa11->fp_status))
{
//printf("fef 0x%x\n",float_exception_flags);
- nRc=-get_float_exception_flags(&fpa11->fp_status);
+ nRc = -get_float_exception_flags(&fpa11->fp_status);
}
//printf("returning %d\n",nRc);
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 7c8e771df..62a3f2ac2 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -1454,7 +1454,7 @@ int load_elf_binary(struct linux_binprm * bprm, struct target_pt_regs * regs,
}
#if 0
- printf("Using ELF interpreter %s\n", elf_interpreter);
+ printf("Using ELF interpreter %s\n", path(elf_interpreter));
#endif
if (retval >= 0) {
retval = open(path(elf_interpreter), O_RDONLY);
@@ -1476,7 +1476,7 @@ int load_elf_binary(struct linux_binprm * bprm, struct target_pt_regs * regs,
}
if (retval >= 0) {
interp_ex = *((struct exec *) bprm->buf); /* aout exec-header */
- interp_elf_ex=*((struct elfhdr *) bprm->buf); /* elf exec-header */
+ interp_elf_ex = *((struct elfhdr *) bprm->buf); /* elf exec-header */
}
if (retval < 0) {
perror("load_elf_binary3");
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index b42567c3d..bf06d14fc 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -2067,7 +2067,7 @@ static inline abi_long target_to_host_ipc_perm(struct ipc_perm *host_ip,
if (!lock_user_struct(VERIFY_READ, target_sd, target_addr, 1))
return -TARGET_EFAULT;
- target_ip=&(target_sd->sem_perm);
+ target_ip = &(target_sd->sem_perm);
host_ip->__key = tswapl(target_ip->__key);
host_ip->uid = tswapl(target_ip->uid);
host_ip->gid = tswapl(target_ip->gid);
diff --git a/monitor.c b/monitor.c
index e4b26f603..e5aa0d282 100644
--- a/monitor.c
+++ b/monitor.c
@@ -1477,6 +1477,9 @@ static void do_info_numa(Monitor *mon)
#ifdef CONFIG_PROFILER
+int64_t qemu_time;
+int64_t dev_time;
+
static void do_info_profile(Monitor *mon)
{
int64_t total;
diff --git a/net.c b/net.c
index 8032ff833..d1751288f 100644
--- a/net.c
+++ b/net.c
@@ -2215,7 +2215,7 @@ static NetSocketState *net_socket_fd_init(VLANState *vlan,
const char *model, const char *name,
int fd, int is_connected)
{
- int so_type=-1, optlen=sizeof(so_type);
+ int so_type = -1, optlen=sizeof(so_type);
if(getsockopt(fd, SOL_SOCKET, SO_TYPE, (char *)&so_type,
(socklen_t *)&optlen)< 0) {
diff --git a/slirp/ip_input.c b/slirp/ip_input.c
index 35230f8d1..bb101da1a 100644
--- a/slirp/ip_input.c
+++ b/slirp/ip_input.c
@@ -648,8 +648,6 @@ typedef u_int32_t n_time;
ip_forward(m, 1);
return (1);
}
- }
- }
return (0);
bad:
icmp_error(m, type, code, 0, 0);
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index a866c1056..90c6909f9 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -338,6 +338,7 @@
#define MSR_FSBASE 0xc0000100
#define MSR_GSBASE 0xc0000101
#define MSR_KERNELGSBASE 0xc0000102
+#define MSR_TSC_AUX 0xc0000103
#define MSR_VM_HSAVE_PA 0xc0010117
@@ -713,6 +714,8 @@ typedef struct CPUX86State {
uint64 mcg_status;
uint64 mcg_ctl;
uint64 *mce_banks;
+
+ uint64_t tsc_aux;
} CPUX86State;
CPUX86State *cpu_x86_init(const char *cpu_model);
@@ -873,7 +876,7 @@ uint64_t cpu_get_tsc(CPUX86State *env);
#define cpu_signal_handler cpu_x86_signal_handler
#define cpu_list x86_cpu_list
-#define CPU_SAVE_VERSION 10
+#define CPU_SAVE_VERSION 11
/* MMU modes definitions */
#define MMU_MODE0_SUFFIX _kernel
diff --git a/target-i386/helper.h b/target-i386/helper.h
index 68d57b130..ca953f47d 100644
--- a/target-i386/helper.h
+++ b/target-i386/helper.h
@@ -80,6 +80,7 @@ DEF_HELPER_1(cmpxchg16b, void, tl)
DEF_HELPER_0(single_step, void)
DEF_HELPER_0(cpuid, void)
DEF_HELPER_0(rdtsc, void)
+DEF_HELPER_0(rdtscp, void)
DEF_HELPER_0(rdpmc, void)
DEF_HELPER_0(rdmsr, void)
DEF_HELPER_0(wrmsr, void)
diff --git a/target-i386/machine.c b/target-i386/machine.c
index a4f2d22fb..76325d8b5 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -171,6 +171,7 @@ void cpu_save(QEMUFile *f, void *opaque)
qemu_put_be64s(f, &env->mce_banks[4*i + 3]);
}
}
+ qemu_put_be64s(f, &env->tsc_aux);
}
#ifdef USE_X86LDOUBLE
@@ -377,6 +378,9 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id)
}
}
+ if (version_id >= 11) {
+ qemu_get_be64s(f, &env->tsc_aux);
+ }
/* XXX: ensure compatiblity for halted bit ? */
/* XXX: compute redundant hflags bits */
env->hflags = hflags;
diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c
index 33d44b003..26fe61204 100644
--- a/target-i386/op_helper.c
+++ b/target-i386/op_helper.c
@@ -2969,6 +2969,12 @@ void helper_rdtsc(void)
EDX = (uint32_t)(val >> 32);
}
+void helper_rdtscp(void)
+{
+ helper_rdtsc();
+ ECX = (uint32_t)(env->tsc_aux);
+}
+
void helper_rdpmc(void)
{
if ((env->cr[4] & CR4_PCE_MASK) && ((env->hflags & HF_CPL_MASK) != 0)) {
@@ -3107,6 +3113,9 @@ void helper_wrmsr(void)
&& (val == 0 || val == ~(uint64_t)0))
env->mcg_ctl = val;
break;
+ case MSR_TSC_AUX:
+ env->tsc_aux = val;
+ break;
default:
if ((uint32_t)ECX >= MSR_MC0_CTL
&& (uint32_t)ECX < MSR_MC0_CTL + (4 * env->mcg_cap & 0xff)) {
@@ -3177,6 +3186,9 @@ void helper_rdmsr(void)
case MSR_KERNELGSBASE:
val = env->kernelgsbase;
break;
+ case MSR_TSC_AUX:
+ val = env->tsc_aux;
+ break;
#endif
case MSR_MTRRphysBase(0):
case MSR_MTRRphysBase(1):
@@ -4338,6 +4350,11 @@ void helper_fxsave(target_ulong ptr, int data64)
CPU86_LDouble tmp;
target_ulong addr;
+ /* The operand must be 16 byte aligned */
+ if (ptr & 0xf) {
+ raise_exception(EXCP0D_GPF);
+ }
+
fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
fptag = 0;
for(i = 0; i < 8; i++) {
@@ -4394,6 +4411,11 @@ void helper_fxrstor(target_ulong ptr, int data64)
CPU86_LDouble tmp;
target_ulong addr;
+ /* The operand must be 16 byte aligned */
+ if (ptr & 0xf) {
+ raise_exception(EXCP0D_GPF);
+ }
+
env->fpuc = lduw(ptr);
fpus = lduw(ptr + 2);
fptag = lduw(ptr + 4);
diff --git a/target-i386/ops_sse.h b/target-i386/ops_sse.h
index 709732a4a..3232abd96 100644
--- a/target-i386/ops_sse.h
+++ b/target-i386/ops_sse.h
@@ -802,6 +802,50 @@ void helper_rcpss(XMMReg *d, XMMReg *s)
d->XMM_S(0) = approx_rcp(s->XMM_S(0));
}
+static inline uint64_t helper_extrq(uint64_t src, int shift, int len)
+{
+ uint64_t mask;
+
+ if (len == 0) {
+ mask = ~0LL;
+ } else {
+ mask = (1ULL << len) - 1;
+ }
+ return (src >> shift) & mask;
+}
+
+void helper_extrq_r(XMMReg *d, XMMReg *s)
+{
+ d->XMM_Q(0) = helper_extrq(d->XMM_Q(0), s->XMM_B(1), s->XMM_B(0));
+}
+
+void helper_extrq_i(XMMReg *d, int index, int length)
+{
+ d->XMM_Q(0) = helper_extrq(d->XMM_Q(0), index, length);
+}
+
+static inline uint64_t helper_insertq(uint64_t src, int shift, int len)
+{
+ uint64_t mask;
+
+ if (len == 0) {
+ mask = ~0ULL;
+ } else {
+ mask = (1ULL << len) - 1;
+ }
+ return (src & ~(mask << shift)) | ((src & mask) << shift);
+}
+
+void helper_insertq_r(XMMReg *d, XMMReg *s)
+{
+ d->XMM_Q(0) = helper_insertq(s->XMM_Q(0), s->XMM_B(9), s->XMM_B(8));
+}
+
+void helper_insertq_i(XMMReg *d, int index, int length)
+{
+ d->XMM_Q(0) = helper_insertq(d->XMM_Q(0), index, length);
+}
+
void helper_haddps(XMMReg *d, XMMReg *s)
{
XMMReg r;
diff --git a/target-i386/ops_sse_header.h b/target-i386/ops_sse_header.h
index 53add99f9..a0a63613a 100644
--- a/target-i386/ops_sse_header.h
+++ b/target-i386/ops_sse_header.h
@@ -187,6 +187,10 @@ DEF_HELPER_2(rsqrtps, void, XMMReg, XMMReg)
DEF_HELPER_2(rsqrtss, void, XMMReg, XMMReg)
DEF_HELPER_2(rcpps, void, XMMReg, XMMReg)
DEF_HELPER_2(rcpss, void, XMMReg, XMMReg)
+DEF_HELPER_2(extrq_r, void, XMMReg, XMMReg)
+DEF_HELPER_3(extrq_i, void, XMMReg, int, int)
+DEF_HELPER_2(insertq_r, void, XMMReg, XMMReg)
+DEF_HELPER_3(insertq_i, void, XMMReg, int, int)
DEF_HELPER_2(haddps, void, XMMReg, XMMReg)
DEF_HELPER_2(haddpd, void, XMMReg, XMMReg)
DEF_HELPER_2(hsubps, void, XMMReg, XMMReg)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 3eae9bc64..e3cb49f33 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -62,6 +62,7 @@
static TCGv_ptr cpu_env;
static TCGv cpu_A0, cpu_cc_src, cpu_cc_dst, cpu_cc_tmp;
static TCGv_i32 cpu_cc_op;
+static TCGv cpu_regs[CPU_NB_REGS];
/* local temps */
static TCGv cpu_T[2], cpu_T3;
/* local register indexes (only used inside old micro ops) */
@@ -271,32 +272,38 @@ static inline void gen_op_andl_A0_ffff(void)
static inline void gen_op_mov_reg_v(int ot, int reg, TCGv t0)
{
+ TCGv tmp;
+
switch(ot) {
case OT_BYTE:
+ tmp = tcg_temp_new();
+ tcg_gen_ext8u_tl(tmp, t0);
if (reg < 4 X86_64_DEF( || reg >= 8 || x86_64_hregs)) {
- tcg_gen_st8_tl(t0, cpu_env, offsetof(CPUState, regs[reg]) + REG_B_OFFSET);
+ tcg_gen_andi_tl(cpu_regs[reg], cpu_regs[reg], ~0xff);
+ tcg_gen_or_tl(cpu_regs[reg], cpu_regs[reg], tmp);
} else {
- tcg_gen_st8_tl(t0, cpu_env, offsetof(CPUState, regs[reg - 4]) + REG_H_OFFSET);
+ tcg_gen_shli_tl(tmp, tmp, 8);
+ tcg_gen_andi_tl(cpu_regs[reg - 4], cpu_regs[reg - 4], ~0xff00);
+ tcg_gen_or_tl(cpu_regs[reg - 4], cpu_regs[reg - 4], tmp);
}
+ tcg_temp_free(tmp);
break;
case OT_WORD:
- tcg_gen_st16_tl(t0, cpu_env, offsetof(CPUState, regs[reg]) + REG_W_OFFSET);
+ tmp = tcg_temp_new();
+ tcg_gen_ext16u_tl(tmp, t0);
+ tcg_gen_andi_tl(cpu_regs[reg], cpu_regs[reg], ~0xffff);
+ tcg_gen_or_tl(cpu_regs[reg], cpu_regs[reg], tmp);
+ tcg_temp_free(tmp);
break;
-#ifdef TARGET_X86_64
+ default: /* XXX this shouldn't be reached; abort? */
case OT_LONG:
- tcg_gen_st32_tl(t0, cpu_env, offsetof(CPUState, regs[reg]) + REG_L_OFFSET);
- /* high part of register set to zero */
- tcg_gen_movi_tl(cpu_tmp0, 0);
- tcg_gen_st32_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]) + REG_LH_OFFSET);
+ /* For x86_64, this sets the higher half of register to zero.
+ For i386, this is equivalent to a mov. */
+ tcg_gen_ext32u_tl(cpu_regs[reg], t0);
break;
- default:
+#ifdef TARGET_X86_64
case OT_QUAD:
- tcg_gen_st_tl(t0, cpu_env, offsetof(CPUState, regs[reg]));
- break;
-#else
- default:
- case OT_LONG:
- tcg_gen_st32_tl(t0, cpu_env, offsetof(CPUState, regs[reg]) + REG_L_OFFSET);
+ tcg_gen_mov_tl(cpu_regs[reg], t0);
break;
#endif
}
@@ -314,25 +321,25 @@ static inline void gen_op_mov_reg_T1(int ot, int reg)
static inline void gen_op_mov_reg_A0(int size, int reg)
{
+ TCGv tmp;
+
switch(size) {
case 0:
- tcg_gen_st16_tl(cpu_A0, cpu_env, offsetof(CPUState, regs[reg]) + REG_W_OFFSET);
+ tmp = tcg_temp_new();
+ tcg_gen_ext16u_tl(tmp, cpu_A0);
+ tcg_gen_andi_tl(cpu_regs[reg], cpu_regs[reg], ~0xffff);
+ tcg_gen_or_tl(cpu_regs[reg], cpu_regs[reg], tmp);
+ tcg_temp_free(tmp);
break;
-#ifdef TARGET_X86_64
+ default: /* XXX this shouldn't be reached; abort? */
case 1:
- tcg_gen_st32_tl(cpu_A0, cpu_env, offsetof(CPUState, regs[reg]) + REG_L_OFFSET);
- /* high part of register set to zero */
- tcg_gen_movi_tl(cpu_tmp0, 0);
- tcg_gen_st32_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]) + REG_LH_OFFSET);
+ /* For x86_64, this sets the higher half of register to zero.
+ For i386, this is equivalent to a mov. */
+ tcg_gen_ext32u_tl(cpu_regs[reg], cpu_A0);
break;
- default:
+#ifdef TARGET_X86_64
case 2:
- tcg_gen_st_tl(cpu_A0, cpu_env, offsetof(CPUState, regs[reg]));
- break;
-#else
- default:
- case 1:
- tcg_gen_st32_tl(cpu_A0, cpu_env, offsetof(CPUState, regs[reg]) + REG_L_OFFSET);
+ tcg_gen_mov_tl(cpu_regs[reg], cpu_A0);
break;
#endif
}
@@ -345,12 +352,13 @@ static inline void gen_op_mov_v_reg(int ot, TCGv t0, int reg)
if (reg < 4 X86_64_DEF( || reg >= 8 || x86_64_hregs)) {
goto std_case;
} else {
- tcg_gen_ld8u_tl(t0, cpu_env, offsetof(CPUState, regs[reg - 4]) + REG_H_OFFSET);
+ tcg_gen_shri_tl(t0, cpu_regs[reg - 4], 8);
+ tcg_gen_ext8u_tl(t0, t0);
}
break;
default:
std_case:
- tcg_gen_ld_tl(t0, cpu_env, offsetof(CPUState, regs[reg]));
+ tcg_gen_mov_tl(t0, cpu_regs[reg]);
break;
}
}
@@ -362,7 +370,7 @@ static inline void gen_op_mov_TN_reg(int ot, int t_index, int reg)
static inline void gen_op_movl_A0_reg(int reg)
{
- tcg_gen_ld32u_tl(cpu_A0, cpu_env, offsetof(CPUState, regs[reg]) + REG_L_OFFSET);
+ tcg_gen_mov_tl(cpu_A0, cpu_regs[reg]);
}
static inline void gen_op_addl_A0_im(int32_t val)
@@ -404,23 +412,21 @@ static inline void gen_op_add_reg_im(int size, int reg, int32_t val)
{
switch(size) {
case 0:
- tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
- tcg_gen_addi_tl(cpu_tmp0, cpu_tmp0, val);
- tcg_gen_st16_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]) + REG_W_OFFSET);
+ tcg_gen_addi_tl(cpu_tmp0, cpu_regs[reg], val);
+ tcg_gen_ext16u_tl(cpu_tmp0, cpu_tmp0);
+ tcg_gen_andi_tl(cpu_regs[reg], cpu_regs[reg], ~0xffff);
+ tcg_gen_or_tl(cpu_regs[reg], cpu_regs[reg], cpu_tmp0);
break;
case 1:
- tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
- tcg_gen_addi_tl(cpu_tmp0, cpu_tmp0, val);
-#ifdef TARGET_X86_64
- tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0xffffffff);
-#endif
- tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
+ tcg_gen_addi_tl(cpu_tmp0, cpu_regs[reg], val);
+ /* For x86_64, this sets the higher half of register to zero.
+ For i386, this is equivalent to a nop. */
+ tcg_gen_ext32u_tl(cpu_tmp0, cpu_tmp0);
+ tcg_gen_mov_tl(cpu_regs[reg], cpu_tmp0);
break;
#ifdef TARGET_X86_64
case 2:
- tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
- tcg_gen_addi_tl(cpu_tmp0, cpu_tmp0, val);
- tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
+ tcg_gen_addi_tl(cpu_regs[reg], cpu_regs[reg], val);
break;
#endif
}
@@ -430,23 +436,21 @@ static inline void gen_op_add_reg_T0(int size, int reg)
{
switch(size) {
case 0:
- tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
- tcg_gen_add_tl(cpu_tmp0, cpu_tmp0, cpu_T[0]);
- tcg_gen_st16_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]) + REG_W_OFFSET);
+ tcg_gen_add_tl(cpu_tmp0, cpu_regs[reg], cpu_T[0]);
+ tcg_gen_ext16u_tl(cpu_tmp0, cpu_tmp0);
+ tcg_gen_andi_tl(cpu_regs[reg], cpu_regs[reg], ~0xffff);
+ tcg_gen_or_tl(cpu_regs[reg], cpu_regs[reg], cpu_tmp0);
break;
case 1:
- tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
- tcg_gen_add_tl(cpu_tmp0, cpu_tmp0, cpu_T[0]);
-#ifdef TARGET_X86_64
- tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0xffffffff);
-#endif
- tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
+ tcg_gen_add_tl(cpu_tmp0, cpu_regs[reg], cpu_T[0]);
+ /* For x86_64, this sets the higher half of register to zero.
+ For i386, this is equivalent to a nop. */
+ tcg_gen_ext32u_tl(cpu_tmp0, cpu_tmp0);
+ tcg_gen_mov_tl(cpu_regs[reg], cpu_tmp0);
break;
#ifdef TARGET_X86_64
case 2:
- tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
- tcg_gen_add_tl(cpu_tmp0, cpu_tmp0, cpu_T[0]);
- tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
+ tcg_gen_add_tl(cpu_regs[reg], cpu_regs[reg], cpu_T[0]);
break;
#endif
}
@@ -459,13 +463,13 @@ static inline void gen_op_set_cc_op(int32_t val)
static inline void gen_op_addl_A0_reg_sN(int shift, int reg)
{
- tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
- if (shift != 0)
+ tcg_gen_mov_tl(cpu_tmp0, cpu_regs[reg]);
+ if (shift != 0)
tcg_gen_shli_tl(cpu_tmp0, cpu_tmp0, shift);
tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
-#ifdef TARGET_X86_64
- tcg_gen_andi_tl(cpu_A0, cpu_A0, 0xffffffff);
-#endif
+ /* For x86_64, this sets the higher half of register to zero.
+ For i386, this is equivalent to a nop. */
+ tcg_gen_ext32u_tl(cpu_A0, cpu_A0);
}
static inline void gen_op_movl_A0_seg(int reg)
@@ -496,13 +500,13 @@ static inline void gen_op_addq_A0_seg(int reg)
static inline void gen_op_movq_A0_reg(int reg)
{
- tcg_gen_ld_tl(cpu_A0, cpu_env, offsetof(CPUState, regs[reg]));
+ tcg_gen_mov_tl(cpu_A0, cpu_regs[reg]);
}
static inline void gen_op_addq_A0_reg_sN(int shift, int reg)
{
- tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]));
- if (shift != 0)
+ tcg_gen_mov_tl(cpu_tmp0, cpu_regs[reg]);
+ if (shift != 0)
tcg_gen_shli_tl(cpu_tmp0, cpu_tmp0, shift);
tcg_gen_add_tl(cpu_A0, cpu_A0, cpu_tmp0);
}
@@ -701,14 +705,14 @@ static void gen_exts(int ot, TCGv reg)
static inline void gen_op_jnz_ecx(int size, int label1)
{
- tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[R_ECX]));
+ tcg_gen_mov_tl(cpu_tmp0, cpu_regs[R_ECX]);
gen_extu(size + 1, cpu_tmp0);
tcg_gen_brcondi_tl(TCG_COND_NE, cpu_tmp0, 0, label1);
}
static inline void gen_op_jz_ecx(int size, int label1)
{
- tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[R_ECX]));
+ tcg_gen_mov_tl(cpu_tmp0, cpu_regs[R_ECX]);
gen_extu(size + 1, cpu_tmp0);
tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, label1);
}
@@ -2822,7 +2826,7 @@ static void *sse_op_table1[256][4] = {
[0x28] = { SSE_SPECIAL, SSE_SPECIAL }, /* movaps, movapd */
[0x29] = { SSE_SPECIAL, SSE_SPECIAL }, /* movaps, movapd */
[0x2a] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* cvtpi2ps, cvtpi2pd, cvtsi2ss, cvtsi2sd */
- [0x2b] = { SSE_SPECIAL, SSE_SPECIAL }, /* movntps, movntpd */
+ [0x2b] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* movntps, movntpd, movntss, movntsd */
[0x2c] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* cvttps2pi, cvttpd2pi, cvttsd2si, cvttss2si */
[0x2d] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* cvtps2pi, cvtpd2pi, cvtsd2si, cvtss2si */
[0x2e] = { gen_helper_ucomiss, gen_helper_ucomisd },
@@ -2879,6 +2883,8 @@ static void *sse_op_table1[256][4] = {
[0x75] = MMX_OP2(pcmpeqw),
[0x76] = MMX_OP2(pcmpeql),
[0x77] = { SSE_DUMMY }, /* emms */
+ [0x78] = { NULL, SSE_SPECIAL, NULL, SSE_SPECIAL }, /* extrq_i, insertq_i */
+ [0x79] = { NULL, gen_helper_extrq_r, NULL, gen_helper_insertq_r },
[0x7c] = { NULL, gen_helper_haddpd, NULL, gen_helper_haddps },
[0x7d] = { NULL, gen_helper_hsubpd, NULL, gen_helper_hsubps },
[0x7e] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* movd, movd, , movq */
@@ -3165,6 +3171,20 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
gen_sto_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg]));
break;
+ case 0x22b: /* movntss */
+ case 0x32b: /* movntsd */
+ if (mod == 3)
+ goto illegal_op;
+ gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
+ if (b1 & 1) {
+ gen_stq_env_A0(s->mem_index, offsetof(CPUX86State,
+ xmm_regs[reg]));
+ } else {
+ tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,
+ xmm_regs[reg].XMM_L(0)));
+ gen_op_st_T0_A0(OT_LONG + s->mem_index);
+ }
+ break;
case 0x6e: /* movd mm, ea */
#ifdef TARGET_X86_64
if (s->dflag == 2) {
@@ -3320,6 +3340,25 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(2)),
offsetof(CPUX86State,xmm_regs[reg].XMM_L(3)));
break;
+ case 0x178:
+ case 0x378:
+ {
+ int bit_index, field_length;
+
+ if (b1 == 1 && reg != 0)
+ goto illegal_op;
+ field_length = ldub_code(s->pc++) & 0x3F;
+ bit_index = ldub_code(s->pc++) & 0x3F;
+ tcg_gen_addi_ptr(cpu_ptr0, cpu_env,
+ offsetof(CPUX86State,xmm_regs[reg]));
+ if (b1 == 1)
+ gen_helper_extrq_i(cpu_ptr0, tcg_const_i32(bit_index),
+ tcg_const_i32(field_length));
+ else
+ gen_helper_insertq_i(cpu_ptr0, tcg_const_i32(bit_index),
+ tcg_const_i32(field_length));
+ }
+ break;
case 0x7e: /* movd ea, mm */
#ifdef TARGET_X86_64
if (s->dflag == 2) {
@@ -4834,8 +4873,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
rm = 0; /* avoid warning */
}
label1 = gen_new_label();
- tcg_gen_ld_tl(t2, cpu_env, offsetof(CPUState, regs[R_EAX]));
- tcg_gen_sub_tl(t2, t2, t0);
+ tcg_gen_sub_tl(t2, cpu_regs[R_EAX], t0);
gen_extu(ot, t2);
tcg_gen_brcondi_tl(TCG_COND_EQ, t2, 0, label1);
if (mod == 3) {
@@ -5409,7 +5447,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
val = ldub_code(s->pc++);
tcg_gen_movi_tl(cpu_T3, val);
} else {
- tcg_gen_ld_tl(cpu_T3, cpu_env, offsetof(CPUState, regs[R_ECX]));
+ tcg_gen_mov_tl(cpu_T3, cpu_regs[R_ECX]);
}
gen_shiftd_rm_T1_T3(s, ot, opreg, op);
break;
@@ -6317,10 +6355,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
/* XXX: specific Intel behaviour ? */
l1 = gen_new_label();
gen_jcc1(s, s->cc_op, b ^ 1, l1);
- tcg_gen_st32_tl(t0, cpu_env, offsetof(CPUState, regs[reg]) + REG_L_OFFSET);
+ tcg_gen_mov_tl(cpu_regs[reg], t0);
gen_set_label(l1);
- tcg_gen_movi_tl(cpu_tmp0, 0);
- tcg_gen_st32_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[reg]) + REG_LH_OFFSET);
+ tcg_gen_ext32u_tl(cpu_regs[reg], cpu_regs[reg]);
} else
#endif
{
@@ -7169,31 +7206,58 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
gen_eob(s);
}
break;
- case 7: /* invlpg */
- if (s->cpl != 0) {
- gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+ case 7:
+ if (mod != 3) { /* invlpg */
+ if (s->cpl != 0) {
+ gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+ } else {
+ if (s->cc_op != CC_OP_DYNAMIC)
+ gen_op_set_cc_op(s->cc_op);
+ gen_jmp_im(pc_start - s->cs_base);
+ gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
+ gen_helper_invlpg(cpu_A0);
+ gen_jmp_im(s->pc - s->cs_base);
+ gen_eob(s);
+ }
} else {
- if (mod == 3) {
+ switch (rm) {
+ case 0: /* swapgs */
#ifdef TARGET_X86_64
- if (CODE64(s) && rm == 0) {
- /* swapgs */
- tcg_gen_ld_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,segs[R_GS].base));
- tcg_gen_ld_tl(cpu_T[1], cpu_env, offsetof(CPUX86State,kernelgsbase));
- tcg_gen_st_tl(cpu_T[1], cpu_env, offsetof(CPUX86State,segs[R_GS].base));
- tcg_gen_st_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,kernelgsbase));
+ if (CODE64(s)) {
+ if (s->cpl != 0) {
+ gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+ } else {
+ tcg_gen_ld_tl(cpu_T[0], cpu_env,
+ offsetof(CPUX86State,segs[R_GS].base));
+ tcg_gen_ld_tl(cpu_T[1], cpu_env,
+ offsetof(CPUX86State,kernelgsbase));
+ tcg_gen_st_tl(cpu_T[1], cpu_env,
+ offsetof(CPUX86State,segs[R_GS].base));
+ tcg_gen_st_tl(cpu_T[0], cpu_env,
+ offsetof(CPUX86State,kernelgsbase));
+ }
} else
#endif
{
goto illegal_op;
}
- } else {
+ break;
+ case 1: /* rdtscp */
+ if (!(s->cpuid_ext2_features & CPUID_EXT2_RDTSCP))
+ goto illegal_op;
if (s->cc_op != CC_OP_DYNAMIC)
gen_op_set_cc_op(s->cc_op);
gen_jmp_im(pc_start - s->cs_base);
- gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
- gen_helper_invlpg(cpu_A0);
- gen_jmp_im(s->pc - s->cs_base);
- gen_eob(s);
+ if (use_icount)
+ gen_io_start();
+ gen_helper_rdtscp();
+ if (use_icount) {
+ gen_io_end();
+ gen_jmp(s, s->pc - s->cs_base);
+ }
+ break;
+ default:
+ goto illegal_op;
}
}
break;
@@ -7349,6 +7413,10 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
ot = OT_QUAD;
else
ot = OT_LONG;
+ if ((prefixes & PREFIX_LOCK) && (reg == 0) &&
+ (s->cpuid_ext3_features & CPUID_EXT3_CR8LEG)) {
+ reg = 8;
+ }
switch(reg) {
case 0:
case 2:
@@ -7434,9 +7502,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
switch(op) {
case 0: /* fxsave */
if (mod == 3 || !(s->cpuid_features & CPUID_FXSR) ||
- (s->flags & HF_EM_MASK))
+ (s->prefix & PREFIX_LOCK))
goto illegal_op;
- if (s->flags & HF_TS_MASK) {
+ if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
break;
}
@@ -7448,9 +7516,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
break;
case 1: /* fxrstor */
if (mod == 3 || !(s->cpuid_features & CPUID_FXSR) ||
- (s->flags & HF_EM_MASK))
+ (s->prefix & PREFIX_LOCK))
goto illegal_op;
- if (s->flags & HF_TS_MASK) {
+ if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
break;
}
@@ -7549,7 +7617,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
case 0x110 ... 0x117:
case 0x128 ... 0x12f:
case 0x138 ... 0x13a:
- case 0x150 ... 0x177:
+ case 0x150 ... 0x179:
case 0x17c ... 0x17f:
case 0x1c2:
case 0x1c4 ... 0x1c6:
@@ -7588,6 +7656,58 @@ void optimize_flags_init(void)
cpu_cc_tmp = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, cc_tmp),
"cc_tmp");
+#ifdef TARGET_X86_64
+ cpu_regs[R_EAX] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[R_EAX]), "rax");
+ cpu_regs[R_ECX] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[R_ECX]), "rcx");
+ cpu_regs[R_EDX] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[R_EDX]), "rdx");
+ cpu_regs[R_EBX] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[R_EBX]), "rbx");
+ cpu_regs[R_ESP] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[R_ESP]), "rsp");
+ cpu_regs[R_EBP] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[R_EBP]), "rbp");
+ cpu_regs[R_ESI] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[R_ESI]), "rsi");
+ cpu_regs[R_EDI] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[R_EDI]), "rdi");
+ cpu_regs[8] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[8]), "r8");
+ cpu_regs[9] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[9]), "r9");
+ cpu_regs[10] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[10]), "r10");
+ cpu_regs[11] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[11]), "r11");
+ cpu_regs[12] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[12]), "r12");
+ cpu_regs[13] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[13]), "r13");
+ cpu_regs[14] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[14]), "r14");
+ cpu_regs[15] = tcg_global_mem_new_i64(TCG_AREG0,
+ offsetof(CPUState, regs[15]), "r15");
+#else
+ cpu_regs[R_EAX] = tcg_global_mem_new_i32(TCG_AREG0,
+ offsetof(CPUState, regs[R_EAX]), "eax");
+ cpu_regs[R_ECX] = tcg_global_mem_new_i32(TCG_AREG0,
+ offsetof(CPUState, regs[R_ECX]), "ecx");
+ cpu_regs[R_EDX] = tcg_global_mem_new_i32(TCG_AREG0,
+ offsetof(CPUState, regs[R_EDX]), "edx");
+ cpu_regs[R_EBX] = tcg_global_mem_new_i32(TCG_AREG0,
+ offsetof(CPUState, regs[R_EBX]), "ebx");
+ cpu_regs[R_ESP] = tcg_global_mem_new_i32(TCG_AREG0,
+ offsetof(CPUState, regs[R_ESP]), "esp");
+ cpu_regs[R_EBP] = tcg_global_mem_new_i32(TCG_AREG0,
+ offsetof(CPUState, regs[R_EBP]), "ebp");
+ cpu_regs[R_ESI] = tcg_global_mem_new_i32(TCG_AREG0,
+ offsetof(CPUState, regs[R_ESI]), "esi");
+ cpu_regs[R_EDI] = tcg_global_mem_new_i32(TCG_AREG0,
+ offsetof(CPUState, regs[R_EDI]), "edi");
+#endif
+
/* register helpers */
#define GEN_HELPER 2
#include "helper.h"
diff --git a/target-mips/helper.c b/target-mips/helper.c
index 736902576..7f659ae6b 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -195,7 +195,6 @@ static int get_physical_address (CPUState *env, target_ulong *physical,
#if 0
qemu_log(TARGET_FMT_lx " %d %d => " TARGET_FMT_lx " %d (%d)\n",
address, rw, access_type, *physical, *prot, ret);
- }
#endif
return ret;
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 42a5753e2..58f483fa0 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -187,10 +187,10 @@ enum {
OPC_MOVCI = 0x01 | OPC_SPECIAL,
/* Special */
- OPC_PMON = 0x05 | OPC_SPECIAL, /* inofficial */
+ OPC_PMON = 0x05 | OPC_SPECIAL, /* unofficial */
OPC_SYSCALL = 0x0C | OPC_SPECIAL,
OPC_BREAK = 0x0D | OPC_SPECIAL,
- OPC_SPIM = 0x0E | OPC_SPECIAL, /* inofficial */
+ OPC_SPIM = 0x0E | OPC_SPECIAL, /* unofficial */
OPC_SYNC = 0x0F | OPC_SPECIAL,
OPC_SPECIAL15_RESERVED = 0x15 | OPC_SPECIAL,
@@ -803,9 +803,9 @@ generate_exception (DisasContext *ctx, int excp)
}
/* Addresses computation */
-static inline void gen_op_addr_add (DisasContext *ctx, TCGv t0, TCGv t1)
+static inline void gen_op_addr_add (DisasContext *ctx, TCGv ret, TCGv arg0, TCGv arg1)
{
- tcg_gen_add_tl(t0, t0, t1);
+ tcg_gen_add_tl(ret, arg0, arg1);
#if defined(TARGET_MIPS64)
/* For compatibility with 32-bit code, data reference in user mode
@@ -813,7 +813,7 @@ static inline void gen_op_addr_add (DisasContext *ctx, TCGv t0, TCGv t1)
See the MIPS64 PRA manual, section 4.10. */
if (((ctx->hflags & MIPS_HFLAG_KSU) == MIPS_HFLAG_UM) &&
!(ctx->hflags & MIPS_HFLAG_UX)) {
- tcg_gen_ext32s_i64(t0, t0);
+ tcg_gen_ext32s_i64(ret, ret);
}
#endif
}
@@ -1005,7 +1005,7 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt,
gen_load_gpr(t0, base);
} else {
tcg_gen_movi_tl(t0, offset);
- gen_op_addr_add(ctx, t0, cpu_gpr[base]);
+ gen_op_addr_add(ctx, t0, cpu_gpr[base], t0);
}
/* Don't do NOP if destination is zero: we must perform the actual
memory access. */
@@ -1163,7 +1163,7 @@ static void gen_st_cond (DisasContext *ctx, uint32_t opc, int rt,
gen_load_gpr(t0, base);
} else {
tcg_gen_movi_tl(t0, offset);
- gen_op_addr_add(ctx, t0, cpu_gpr[base]);
+ gen_op_addr_add(ctx, t0, cpu_gpr[base], t0);
}
/* Don't do NOP if destination is zero: we must perform the actual
memory access. */
@@ -1202,7 +1202,7 @@ static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft,
gen_load_gpr(t0, base);
} else {
tcg_gen_movi_tl(t0, offset);
- gen_op_addr_add(ctx, t0, cpu_gpr[base]);
+ gen_op_addr_add(ctx, t0, cpu_gpr[base], t0);
}
/* Don't do NOP if destination is zero: we must perform the actual
memory access. */
@@ -7264,7 +7264,7 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
gen_load_gpr(t0, base);
} else {
gen_load_gpr(t0, index);
- gen_op_addr_add(ctx, t0, cpu_gpr[base]);
+ gen_op_addr_add(ctx, t0, cpu_gpr[base], t0);
}
/* Don't do NOP if destination is zero: we must perform the actual
memory access. */
diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
index b4e3b6fd4..dd4d4e071 100644
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -1073,6 +1073,12 @@ static inline void tcg_out_op(TCGContext *s, int opc,
case INDEX_op_ext16s_i32:
tcg_out_modrm(s, 0xbf | P_EXT, args[0], args[1]);
break;
+ case INDEX_op_ext8u_i32:
+ tcg_out_modrm(s, 0xb6 | P_EXT, args[0], args[1]);
+ break;
+ case INDEX_op_ext16u_i32:
+ tcg_out_modrm(s, 0xb7 | P_EXT, args[0], args[1]);
+ break;
case INDEX_op_qemu_ld8u:
tcg_out_qemu_ld(s, args, 0);
@@ -1160,6 +1166,8 @@ static const TCGTargetOpDef x86_op_defs[] = {
{ INDEX_op_ext8s_i32, { "r", "q" } },
{ INDEX_op_ext16s_i32, { "r", "r" } },
+ { INDEX_op_ext8u_i32, { "r", "q"} },
+ { INDEX_op_ext16u_i32, { "r", "r"} },
#if TARGET_LONG_BITS == 32
{ INDEX_op_qemu_ld8u, { "r", "L" } },
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 461ef315c..69227c3bc 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -52,6 +52,8 @@ enum {
#define TCG_TARGET_HAS_ext8s_i32
#define TCG_TARGET_HAS_ext16s_i32
#define TCG_TARGET_HAS_rot_i32
+#define TCG_TARGET_HAS_ext8u_i32
+#define TCG_TARGET_HAS_ext16u_i32
#define TCG_TARGET_HAS_GUEST_BASE
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index 7cb693414..faf2e8b60 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -1189,16 +1189,22 @@ static inline void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg)
#endif
}
-/* These are currently just for convenience.
- We assume a target will recognise these automatically . */
static inline void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg)
{
+#ifdef TCG_TARGET_HAS_ext8u_i32
+ tcg_gen_op2_i32(INDEX_op_ext8u_i32, ret, arg);
+#else
tcg_gen_andi_i32(ret, arg, 0xffu);
+#endif
}
static inline void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg)
{
+#ifdef TCG_TARGET_HAS_ext16u_i32
+ tcg_gen_op2_i32(INDEX_op_ext16u_i32, ret, arg);
+#else
tcg_gen_andi_i32(ret, arg, 0xffffu);
+#endif
}
/* Note: we assume the two high bytes are set to zero */
@@ -1358,17 +1364,29 @@ static inline void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg)
static inline void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg)
{
+#ifdef TCG_TARGET_HAS_ext8u_i64
+ tcg_gen_op2_i64(INDEX_op_ext8u_i64, ret, arg);
+#else
tcg_gen_andi_i64(ret, arg, 0xffu);
+#endif
}
static inline void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg)
{
+#ifdef TCG_TARGET_HAS_ext16u_i64
+ tcg_gen_op2_i64(INDEX_op_ext16u_i64, ret, arg);
+#else
tcg_gen_andi_i64(ret, arg, 0xffffu);
+#endif
}
static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg)
{
+#ifdef TCG_TARGET_HAS_ext32u_i64
+ tcg_gen_op2_i64(INDEX_op_ext32u_i64, ret, arg);
+#else
tcg_gen_andi_i64(ret, arg, 0xffffffffu);
+#endif
}
/* Note: we assume the target supports move between 32 and 64 bit
@@ -1382,7 +1400,7 @@ static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
registers */
static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
{
- tcg_gen_andi_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)), 0xffffffffu);
+ tcg_gen_ext32u_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)));
}
/* Note: we assume the target supports move between 32 and 64 bit
diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h
index 3a095fce1..b7f3fd7e6 100644
--- a/tcg/tcg-opc.h
+++ b/tcg/tcg-opc.h
@@ -89,6 +89,12 @@ DEF2(ext8s_i32, 1, 1, 0, 0)
#ifdef TCG_TARGET_HAS_ext16s_i32
DEF2(ext16s_i32, 1, 1, 0, 0)
#endif
+#ifdef TCG_TARGET_HAS_ext8u_i32
+DEF2(ext8u_i32, 1, 1, 0, 0)
+#endif
+#ifdef TCG_TARGET_HAS_ext16u_i32
+DEF2(ext16u_i32, 1, 1, 0, 0)
+#endif
#ifdef TCG_TARGET_HAS_bswap16_i32
DEF2(bswap16_i32, 1, 1, 0, 0)
#endif
@@ -152,6 +158,15 @@ DEF2(ext16s_i64, 1, 1, 0, 0)
#ifdef TCG_TARGET_HAS_ext32s_i64
DEF2(ext32s_i64, 1, 1, 0, 0)
#endif
+#ifdef TCG_TARGET_HAS_ext8u_i64
+DEF2(ext8u_i64, 1, 1, 0, 0)
+#endif
+#ifdef TCG_TARGET_HAS_ext16u_i64
+DEF2(ext16u_i64, 1, 1, 0, 0)
+#endif
+#ifdef TCG_TARGET_HAS_ext32u_i64
+DEF2(ext32u_i64, 1, 1, 0, 0)
+#endif
#ifdef TCG_TARGET_HAS_bswap16_i64
DEF2(bswap16_i64, 1, 1, 0, 0)
#endif
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 93066e249..9f57b6a2d 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -67,7 +67,7 @@ static void patch_reloc(uint8_t *code_ptr, int type,
static TCGOpDef tcg_op_defs[] = {
#define DEF(s, n, copy_size) { #s, 0, 0, n, n, 0, copy_size },
-#define DEF2(s, iargs, oargs, cargs, flags) { #s, iargs, oargs, cargs, iargs + oargs + cargs, flags, 0 },
+#define DEF2(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags, 0 },
#include "tcg-opc.h"
#undef DEF
#undef DEF2
@@ -1086,8 +1086,7 @@ static void tcg_liveness_analysis(TCGContext *s)
nb_ops = gen_opc_ptr - gen_opc_buf;
- /* XXX: make it really dynamic */
- s->op_dead_iargs = tcg_malloc(OPC_BUF_SIZE * sizeof(uint16_t));
+ s->op_dead_iargs = tcg_malloc(nb_ops * sizeof(uint16_t));
dead_temps = tcg_malloc(s->nb_temps);
memset(dead_temps, 1, s->nb_temps);
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 4304e2a15..83655777c 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -453,8 +453,6 @@ TCGv_i64 tcg_const_local_i64(int64_t val);
void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type,
int label_index, long addend);
-const TCGArg *tcg_gen_code_op(TCGContext *s, int opc, const TCGArg *args1,
- unsigned int dead_iargs);
extern uint8_t code_gen_prologue[];
#if defined(_ARCH_PPC) && !defined(_ARCH_PPC64)
diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c
index b4ba65f97..5c829e76e 100644
--- a/tcg/x86_64/tcg-target.c
+++ b/tcg/x86_64/tcg-target.c
@@ -1181,6 +1181,21 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
case INDEX_op_ext32s_i64:
tcg_out_modrm(s, 0x63 | P_REXW, args[0], args[1]);
break;
+ case INDEX_op_ext8u_i32:
+ tcg_out_modrm(s, 0xb6 | P_EXT | P_REXB, args[0], args[1]);
+ break;
+ case INDEX_op_ext16u_i32:
+ tcg_out_modrm(s, 0xb7 | P_EXT, args[0], args[1]);
+ break;
+ case INDEX_op_ext8u_i64:
+ tcg_out_modrm(s, 0xb6 | P_EXT | P_REXW, args[0], args[1]);
+ break;
+ case INDEX_op_ext16u_i64:
+ tcg_out_modrm(s, 0xb7 | P_EXT | P_REXW, args[0], args[1]);
+ break;
+ case INDEX_op_ext32u_i64:
+ tcg_out_modrm(s, 0x8b, args[0], args[1]);
+ break;
case INDEX_op_qemu_ld8u:
tcg_out_qemu_ld(s, args, 0);
@@ -1355,6 +1370,11 @@ static const TCGTargetOpDef x86_64_op_defs[] = {
{ INDEX_op_ext8s_i64, { "r", "r"} },
{ INDEX_op_ext16s_i64, { "r", "r"} },
{ INDEX_op_ext32s_i64, { "r", "r"} },
+ { INDEX_op_ext8u_i32, { "r", "r"} },
+ { INDEX_op_ext16u_i32, { "r", "r"} },
+ { INDEX_op_ext8u_i64, { "r", "r"} },
+ { INDEX_op_ext16u_i64, { "r", "r"} },
+ { INDEX_op_ext32u_i64, { "r", "r"} },
{ INDEX_op_qemu_ld8u, { "r", "L" } },
{ INDEX_op_qemu_ld8s, { "r", "L" } },
diff --git a/tcg/x86_64/tcg-target.h b/tcg/x86_64/tcg-target.h
index 8d47e7873..3ca392ff2 100644
--- a/tcg/x86_64/tcg-target.h
+++ b/tcg/x86_64/tcg-target.h
@@ -70,6 +70,12 @@ enum {
#define TCG_TARGET_HAS_ext8s_i64
#define TCG_TARGET_HAS_ext16s_i64
#define TCG_TARGET_HAS_ext32s_i64
+#define TCG_TARGET_HAS_ext8u_i32
+#define TCG_TARGET_HAS_ext16u_i32
+#define TCG_TARGET_HAS_ext8u_i64
+#define TCG_TARGET_HAS_ext16u_i64
+#define TCG_TARGET_HAS_ext32u_i64
+
#define TCG_TARGET_HAS_rot_i32
#define TCG_TARGET_HAS_rot_i64
diff --git a/tests/sha1.c b/tests/sha1.c
index 2557344df..3a7655582 100644
--- a/tests/sha1.c
+++ b/tests/sha1.c
@@ -190,7 +190,7 @@ unsigned char c;
int j;
for (j = 0; j < 4; t >>= 8, j++)
- *--fcp = (unsigned char) t
+ *--fcp = (unsigned char) t;
}
#else
for (i = 0; i < 8; i++) {
diff --git a/vl.c b/vl.c
index 6b620367e..e7320794d 100644
--- a/vl.c
+++ b/vl.c
@@ -92,6 +92,9 @@
#include <net/if.h>
#include <syslog.h>
#include <stropts.h>
+/* See MySQL bug #7156 (http://bugs.mysql.com/bug.php?id=7156) for
+ discussion about Solaris header problems */
+extern int madvise(caddr_t, size_t, int);
#endif
#endif
#endif