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* target-i386: move recently added vmstate fields at the end of the structureAurelien Jarno2009-10-051-4/+6
* gdbstub: x86: Switch 64/32 bit registers dynamicallyJan Kiszka2009-10-051-2/+5
* x86: split MTRRVar unionJuan Quintela2009-10-051-4/+6
* x86: split FPReg unionJuan Quintela2009-10-051-8/+10
* x86: mce_banks always have the same sizeJuan Quintela2009-10-051-1/+1
* x86: add fpregs_format_vmstateJuan Quintela2009-10-051-0/+1
* x86: add pending_irq_vmstate to the stateJuan Quintela2009-10-051-0/+1
* x86: add fptag_vmstate to the stateJuan Quintela2009-10-051-0/+1
* x86: fpus is uint16_t not unsigned intJuan Quintela2009-10-051-1/+2
* x86: fpuc is uint16_t not unsigned intJuan Quintela2009-10-051-1/+1
* x86: make a20_mask int32_tJuan Quintela2009-10-051-1/+1
* target-i386: add RDTSCP supportAndre Przywara2009-10-041-1/+4
* cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd2009-08-241-0/+1
* Unbreak large mem support by removing kqemuAnthony Liguori2009-08-241-14/+0
* rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela2009-07-271-1/+1
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1
* gdbstub: x86: Support for setting segment registersJan Kiszka2009-07-161-0/+4
* Make sure to mark MCE defines as ULLAnthony Liguori2009-07-101-4/+4
* QEMU: MCE: Add MCE simulation to qemu/tcgHuang Ying2009-07-091-1/+23
* preserve the hypervisor bit while KVM trims the CPUID bitsAndre Przywara2009-06-291-0/+1
* Handle init/sipi in a main cpu exec loop. (v2)Gleb Natapov2009-06-221-0/+4
* allow CPUID vendor overrideAndre Przywara2009-06-161-0/+1
* x86: Add support for resume flagJan Kiszka2009-05-221-3/+6
* kvm: x86: Save/restore KVM-specific CPU statesJan Kiszka2009-05-221-1/+2
* kqemu: merge CONFIG_KQEMU and USE_KQEMUblueswir12009-04-191-2/+2
* x86: Enhanced dump of segment registers (Jan Kiszka)aliguori2009-04-181-1/+2
* The _exit syscall is used for both thread termination in NPTL applications,pbrook2009-03-071-1/+2
* KVM: CPUID takes ecx as input value for some functions (Amit Shah)aliguori2009-02-091-1/+1
* MTRR support on x86, part 2 (Carl-Daniel Hailfinger)aliguori2009-01-291-0/+5
* MTRR support on x86 (Carl-Daniel Hailfinger)aliguori2009-01-261-1/+26
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
* x86 cleanupblueswir12008-12-131-28/+38
* x86: Debug register emulation (Jan Kiszka)aliguori2008-11-181-1/+35
* Refactor translation block CPU state handling (Jan Kiszka)aliguori2008-11-181-0/+8
* Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori2008-11-181-2/+6
* TCG variable type checking.pbrook2008-11-171-2/+0
* Add KVM support to QEMUaliguori2008-11-051-0/+6
* Split CPUID from op_helperaliguori2008-11-051-0/+4
* Add additional CPU flag definitionsaliguori2008-11-051-1/+8
* My core2duo patch introduced a vague statement of "missing features" in pbrook2008-09-291-2/+10
* Fix definition of EMX bit in cpuid (Jens Axboe).balrog2008-09-261-1/+1
* SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).balrog2008-09-251-3/+3
* Core 2 Duo specification (Alexander Graf).balrog2008-09-251-0/+5
* Clean up vendor identification (Alexander Graf).balrog2008-09-251-0/+8
* Move interrupt_request and user_mode_only to common cpu state.pbrook2008-07-011-3/+1
* Move CPU save/load registration to common code.pbrook2008-06-301-0/+2
* Add instruction counter.pbrook2008-06-291-0/+2
* save more CPU statebellard2008-06-041-2/+2
* SVM: added tsc_offsetbellard2008-06-041-3/+4
* reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworke...bellard2008-06-041-10/+19