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* target-ppc: simpler definitions for microcontrollers based on e300Thomas Monjalon2009-10-181-68/+44
* target-ppc: add declarations of microcontrollers based on e300Thomas Monjalon2009-10-181-8/+40
* target-ppc: better support of e300 CPU coreThomas Monjalon2009-10-181-2/+8
* Revert "Get rid of _t suffix"Anthony Liguori2009-10-011-39/+39
* Get rid of _t suffixmalc2009-10-011-39/+39
* Replace local ADDRX/PADDRX macros with TARGET_FMT_lx/plxBlue Swirl2009-08-161-2/+2
* rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela2009-07-271-2/+2
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1
* target-ppc: enable PPC_MFTB for 44xBaojun Wang2009-07-131-6/+6
* target-ppc: permit linux-user to read PVRNathan Froyd2009-06-231-1/+7
* Replace ELF section hack with normal tableBlue Swirl2009-06-171-9/+2
* target-ppc: expose cpu capability flagsNathan Froyd2009-05-161-0/+1
* Fix powerpc 604 reset vectorTristan Gingold2009-04-281-2/+2
* Fix PPC resetBlue Swirl2009-04-281-20/+23
* target-ppc: fix commit r6789aurel322009-03-101-2/+2
* target-ppc: free a tcg temp variableaurel322009-03-091-0/+1
* target-ppc: add support for reading/writing spefscraurel322009-03-091-8/+23
* Fix off-by-one errors for Altivec and SPE registersaurel322009-03-071-8/+8
* Keep SLB in-CPUblueswir12009-03-071-1/+1
* Nop some SPRs on 970fxblueswir12009-03-071-0/+12
* target-ppc: improve mfcr/mtcrfaurel322009-03-031-1/+0
* kvm/powerpc: Add irq support for E500 coreaurel322009-03-021-2/+3
* Implement HIORblueswir12009-02-281-8/+21
* target-ppc: Model e500v{1,2} CPUs more accuratelyaurel322009-02-091-102/+125
* target-ppc: Model SPE floating-point instructions more accuratelyaurel322009-02-091-9/+9
* targets: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori2009-02-051-2/+0
* Add calls to initialize VSCR on appropriate machinesaurel322009-02-031-0/+22
* target-ppc: Add SPE register read/write using XMLaurel322009-01-241-0/+50
* target-ppc: Add Altivec register read/write using XMLaurel322009-01-241-0/+50
* target-ppc: Add float register read/write using XMLaurel322009-01-241-0/+32
* target-ppc: Include gdbstub.haurel322009-01-241-0/+1
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
* Use the ARRAY_SIZE() macro where appropriate.malc2008-12-221-3/+3
* target-ppc: rework exception codeaurel322008-12-111-3/+3
* target-ppc: convert SPR accesses to TCGaurel322008-12-071-132/+177
* Attached patch fixes a series of this warningblueswir12008-11-161-1/+1
* target-ppc: Convert XER accesses to TCGaurel322008-10-211-2/+2
* Suppress gcc 4.x -Wpointer-sign (included in -Wall) warningsblueswir12008-09-201-9/+9
* ppc: Convert ctr, lr moves to TCGaurel322008-09-141-4/+4
* Fix some warnings that would be generated by gcc -Wredundant-declsblueswir12008-08-301-2/+0
* Fix PowerPC 74xx definitions.j_mayer2007-12-101-47/+225
* Fix PowerPC 7xx definitions.j_mayer2007-11-211-132/+612
* Remove shared macro used to define PowerPC implementations instructions sets:j_mayer2007-11-191-172/+480
* PowerPC 620 MMU do not have the same exact behavior as standardj_mayer2007-11-191-3/+6
* New PowerPC CPU flag to define the decrementer and time-base source clock.j_mayer2007-11-191-39/+67
* Improve PowerPC instructions set dump.j_mayer2007-11-171-6/+44
* Add definitions for Freescale PowerPC implementations,j_mayer2007-11-171-1259/+2850
* Define Freescale cores specific MMU model, exceptions and input bus.j_mayer2007-11-171-4/+13
* A little more granularity in PowerPC instructions definition is neededj_mayer2007-11-171-21/+25
* Make the PowerPC MMU model, exception model and input bus modelj_mayer2007-11-171-4/+3