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* Revert "x86: Don't display eiz with no scale"Jan Beulich2020-10-211-1/+1
| | | | | | | | | | This reverts commit 04c662e2b66bedd050f97adec19afe0fcfce9ea7. In my underlying suggestion I neglected the fact that in those cases (,%eiz,1) is the only visible indication that 32-bit addressing is in effect. (cherry picked from commit bf4ba07ca61793a1faf81c0447ba97fdc6639b50) (cherry picked from commit 95f2e4249640dca770715e3ff33d18129bea7e32)
* x86: Don't display eiz with no scaleH.J. Lu2020-07-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change 67 48 8b 1c 25 ef cd ab 89 mov 0x89abcdef(,%eiz,1),%rbx to 67 48 8b 1c 25 ef cd ab 89 mov 0x89abcdef,%rbx in AT&T syntax and 67 48 8b 1c 25 ef cd ab 89 mov rbx,QWORD PTR [eiz*1+0x89abcdef] to 67 48 8b 1c 25 ef cd ab 89 mov rbx,QWORD PTR ds:0x89abcdef in Intel syntax. gas/ PR gas/26237 * testsuite/gas/i386/evex-no-scale-64.d: Updated. * testsuite/gas/i386/addr32.d: Likewise. * testsuite/gas/i386/x86-64-addr32-intel.d: Likewise. * testsuite/gas/i386/x86-64-addr32.d: Likewise. opcodes/ PR gas/26237 * i386-dis.c (OP_E_memory): Don't display eiz with no scale without base nor index registers. (cherry picked from commit 04c662e2b66bedd050f97adec19afe0fcfce9ea7)
* x86-64: Display eiz for address with the addr32 prefixH.J. Lu2018-08-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In 64-bit mode, display eiz for address with the addr32 prefix and without base nor index registers. For mov -0xccddef(,%eiz,), %rax disassembler now displays: 67 48 8b 04 25 11 22 33 ff mov -0xccddef(,%eiz,1),%rax instead of 67 48 8b 04 25 11 22 33 ff addr32 mov 0xffffffffff332211,%rax gas/ * testsuite/gas/i386/evex-no-scale-64.d: Updated. * testsuite/gas/i386/x86-64-addr32-intel.d: Likewise. * testsuite/gas/i386/x86-64-addr32.d: Likewise. * testsuite/gas/i386/ilp32/x86-64-addr32-intel.d: Likewise. * testsuite/gas/i386/ilp32/x86-64-addr32.d: Likewise. * testsuite/gas/i386/x86-64-addr32.s: Add %eiz tests. opcodes/ * i386-dis.c (OP_E_memory): In 64-bit mode, display eiz for address with the addr32 prefix and without base nor index registers.
* x86: Replace evex-no-scale.s with evex-no-scale-[32|64].sH.J. Lu2018-08-101-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | .if is_64bit vmovaps -1024(%rip), %zmm0 vmovaps 64(,%rax), %zmm0 vmovaps 64(,%riz), %zmm0 .endif doesn't with i686-elf cross binutils on 64-bit hosts: evex-no-scale.s: Assembler messages: evex-no-scale.s:10: Error: bad register name `%rip)' evex-no-scale.s:11: Error: bad register name `%rax)' evex-no-scale.s:12: Error: bad register name `%riz)' This patch replaces evex-no-scale.s with evex-no-scale-32.s and evex-no-scale-64.s. * testsuite/gas/i386/evex-no-scale-32.d: Don't use evex-no-scale.s. * testsuite/gas/i386/evex-no-scale-64.d: Likewise. * testsuite/gas/i386/evex-no-scale-32.s: New file. * testsuite/gas/i386/evex-no-scale-64.s: Likewise. * testsuite/gas/i386/evex-no-scale.s: Removed.
* x86: don't mistakenly scale non-8-bit displacementsJan Beulich2018-07-301-0/+15
In commit b5014f7af2 I've removed (instead of replaced) a conditional, resulting in addressing forms not allowing 8-bit displacements to now get their displacements scaled under certain circumstances. Re-add the missing conditional.