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authorFilip Navara <filip.navara@gmail.com>2009-10-15 12:45:48 +0200
committerAurelien Jarno <aurelien@aurel32.net>2009-10-17 23:52:17 +0200
commita6445c52aa2484b6348d127582a20812cec3581d (patch)
treea3feaa832ec72ddfea490f105544be12ff72280d /target-arm/translate.c
parenttarget-arm: get rid of gen_set_psr_T0 and replace it by gen_set_psr/gen_set_p... (diff)
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target-arm: convert gen_lookup_tb not to use cpu_T
Signed-off-by: Filip Navara <filip.navara@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm/translate.c')
-rw-r--r--target-arm/translate.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 21070f124..8e5380cc6 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -898,8 +898,7 @@ static inline void gen_movl_reg_T1(DisasContext *s, int reg)
/* Force a TB lookup after an instruction that changes the CPU state. */
static inline void gen_lookup_tb(DisasContext *s)
{
- gen_op_movl_T0_im(s->pc);
- gen_movl_reg_T0(s, 15);
+ tcg_gen_movi_i32(cpu_R[15], s->pc & ~1);
s->is_jmp = DISAS_UPDATE;
}