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-rw-r--r--Makefile15
-rw-r--r--Makefile.target6
-rw-r--r--hw/arm-misc.h4
-rw-r--r--hw/arm_boot.c69
-rw-r--r--hw/arm_sysctl.c16
-rw-r--r--hw/eepro100.c20
-rw-r--r--hw/loader.c7
-rw-r--r--hw/pc.h1
-rw-r--r--hw/petalogix_s3adsp1800_mmu.c2
-rw-r--r--hw/qdev.c2
-rw-r--r--hw/realview.c16
-rw-r--r--hw/serial.c7
-rw-r--r--pc-bios/pxe-i82559er.bin (renamed from pc-bios/pxe-eepro100.bin)bin56832 -> 56832 bytes
-rw-r--r--rules.mak2
-rw-r--r--target-microblaze/op_helper.c2
-rw-r--r--target-microblaze/translate.c53
16 files changed, 148 insertions, 74 deletions
diff --git a/Makefile b/Makefile
index dfdc0dee9..93efc9bb2 100644
--- a/Makefile
+++ b/Makefile
@@ -1,5 +1,8 @@
# Makefile for QEMU.
+# This needs to be defined before rules.mak
+GENERATED_HEADERS = config-host.h config-all-devices.h
+
ifneq ($(wildcard config-host.mak),)
# Put the all: rule here so that config-host.mak can contain dependencies.
all: build-all
@@ -36,12 +39,11 @@ SUBDIR_MAKEFLAGS=$(if $(V),,--no-print-directory)
SUBDIR_DEVICES_MAK=$(patsubst %, %/config-devices.mak, $(TARGET_DIRS))
config-all-devices.mak: $(SUBDIR_DEVICES_MAK)
- $(call quiet-command,cat $(SUBDIR_DEVICES_MAK) | grep "=y$$" | sort -u > $@," GEN $@")
+ $(call quiet-command,cat $(SUBDIR_DEVICES_MAK) | grep "=y$$" | sort -u > $@," GEN $@")
-include config-all-devices.mak
-build-all: config-host.h config-all-devices.h $(DOCS) $(TOOLS)
- $(call quiet-command, $(MAKE) $(SUBDIR_MAKEFLAGS) recurse-all,)
+build-all: $(DOCS) $(TOOLS) recurse-all
config-host.h: config-host.h-timestamp
config-host.h-timestamp: config-host.mak
@@ -63,7 +65,7 @@ kvm-kmod:
endif
-subdir-%: config-host.h config-all-devices.h
+subdir-%: $(GENERATED_HEADERS)
$(call quiet-command,$(MAKE) $(SUBDIR_MAKEFLAGS) -C $* V="$(V)" TARGET_DIR="$*/" all,)
$(filter %-softmmu,$(SUBDIR_RULES)): libqemu_common.a
@@ -266,8 +268,9 @@ common de-ch es fo fr-ca hu ja mk nl-be pt sl tr
ifdef INSTALL_BLOBS
BLOBS=bios.bin vgabios.bin vgabios-cirrus.bin ppc_rom.bin \
video.x openbios-sparc32 openbios-sparc64 openbios-ppc \
-pxe-ne2k_pci.bin pxe-rtl8139.bin pxe-pcnet.bin pxe-e1000.bin \
-pxe-virtio.bin pxe-eepro100.bin pxe-pcnet.bin \
+pxe-e1000.bin pxe-i82559er.bin \
+pxe-ne2k_pci.bin pxe-pcnet.bin \
+pxe-rtl8139.bin pxe-virtio.bin \
bamboo.dtb petalogix-s3adsp1800.dtb \
multiboot.bin
BLOBS += extboot.bin
diff --git a/Makefile.target b/Makefile.target
index 4fd5f9b78..26eb1fb07 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -1,5 +1,8 @@
# -*- Mode: makefile -*-
+# This needs to be defined before rules.mak
+GENERATED_HEADERS = config-target.h config-devices.h
+
include ../config-host.mak
include config-devices.mak
include config-target.mak
@@ -35,8 +38,7 @@ config-target.h-timestamp: config-target.mak
config-devices.h: config-devices.h-timestamp
config-devices.h-timestamp: config-devices.mak
-all: config-target.h config-devices.h
- $(call quiet-command, $(MAKE) $(PROGS),)
+all: $(PROGS)
# Dummy command so that make thinks it has done something
@true
diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index 367dd25c0..e584073cb 100644
--- a/hw/arm-misc.h
+++ b/hw/arm-misc.h
@@ -31,6 +31,10 @@ struct arm_boot_info {
int nb_cpus;
int board_id;
int (*atag_board)(struct arm_boot_info *info, void *p);
+ /* Used internally by arm_boot.c */
+ int is_linux;
+ target_phys_addr_t initrd_size;
+ target_phys_addr_t entry;
};
void arm_load_kernel(CPUState *env, struct arm_boot_info *info);
diff --git a/hw/arm_boot.c b/hw/arm_boot.c
index a8a38c5a3..e27380364 100644
--- a/hw/arm_boot.c
+++ b/hw/arm_boot.c
@@ -39,22 +39,11 @@ static uint32_t smpboot[] = {
0xe3800030, /* orr r0, #0x30 */
0xe320f003, /* wfi */
0xe5901000, /* ldr r1, [r0] */
- 0xe3110003, /* tst r1, #3 */
- 0x1afffffb, /* bne <wfi> */
+ 0xe1110001, /* tst r1, r1 */
+ 0x0afffffb, /* beq <wfi> */
0xe12fff11 /* bx r1 */
};
-static void main_cpu_reset(void *opaque)
-{
- CPUState *env = opaque;
-
- cpu_reset(env);
- if (env->boot_info)
- arm_load_kernel(env, env->boot_info);
-
- /* TODO: Reset secondary CPUs. */
-}
-
#define WRITE_WORD(p, value) do { \
stl_phys_notdirty(p, value); \
p += 4; \
@@ -186,6 +175,29 @@ static void set_kernel_args_old(struct arm_boot_info *info,
}
}
+static void main_cpu_reset(void *opaque)
+{
+ CPUState *env = opaque;
+ struct arm_boot_info *info = env->boot_info;
+
+ cpu_reset(env);
+ if (info) {
+ if (!info->is_linux) {
+ /* Jump to the entry point. */
+ env->regs[15] = info->entry & 0xfffffffe;
+ env->thumb = info->entry & 1;
+ } else {
+ if (old_param) {
+ set_kernel_args_old(info, info->initrd_size,
+ info->loader_start);
+ } else {
+ set_kernel_args(info, info->initrd_size, info->loader_start);
+ }
+ }
+ }
+ /* TODO: Reset secondary CPUs. */
+}
+
void arm_load_kernel(CPUState *env, struct arm_boot_info *info)
{
int kernel_size;
@@ -202,12 +214,9 @@ void arm_load_kernel(CPUState *env, struct arm_boot_info *info)
exit(1);
}
- if (!env->boot_info) {
- if (info->nb_cpus == 0)
- info->nb_cpus = 1;
- env->boot_info = info;
- qemu_register_reset(main_cpu_reset, env);
- }
+ if (info->nb_cpus == 0)
+ info->nb_cpus = 1;
+ env->boot_info = info;
#ifdef TARGET_WORDS_BIGENDIAN
big_endian = 1;
@@ -234,11 +243,8 @@ void arm_load_kernel(CPUState *env, struct arm_boot_info *info)
info->kernel_filename);
exit(1);
}
- if (!is_linux) {
- /* Jump to the entry point. */
- env->regs[15] = entry & 0xfffffffe;
- env->thumb = entry & 1;
- } else {
+ info->entry = entry;
+ if (is_linux) {
if (info->initrd_filename) {
initrd_size = load_image_targphys(info->initrd_filename,
info->loader_start
@@ -257,16 +263,19 @@ void arm_load_kernel(CPUState *env, struct arm_boot_info *info)
bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR;
bootloader[6] = entry;
for (n = 0; n < sizeof(bootloader) / 4; n++) {
- stl_phys_notdirty(info->loader_start + (n * 4), bootloader[n]);
+ bootloader[n] = tswap32(bootloader[n]);
}
+ rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader),
+ info->loader_start);
if (info->nb_cpus > 1) {
for (n = 0; n < sizeof(smpboot) / 4; n++) {
- stl_phys_notdirty(info->smp_loader_start + (n * 4), smpboot[n]);
+ smpboot[n] = tswap32(smpboot[n]);
}
+ rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot),
+ info->smp_loader_start);
}
- if (old_param)
- set_kernel_args_old(info, initrd_size, info->loader_start);
- else
- set_kernel_args(info, initrd_size, info->loader_start);
+ info->initrd_size = initrd_size;
}
+ info->is_linux = is_linux;
+ qemu_register_reset(main_cpu_reset, env);
}
diff --git a/hw/arm_sysctl.c b/hw/arm_sysctl.c
index 72c7ccbe3..856e77092 100644
--- a/hw/arm_sysctl.c
+++ b/hw/arm_sysctl.c
@@ -27,6 +27,18 @@ typedef struct {
uint32_t resetlevel;
} arm_sysctl_state;
+static void arm_sysctl_reset(DeviceState *d)
+{
+ arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, sysbus_from_qdev(d));
+
+ s->leds = 0;
+ s->lockval = 0;
+ s->cfgdata1 = 0;
+ s->cfgdata2 = 0;
+ s->flags = 0;
+ s->resetlevel = 0;
+}
+
static uint32_t arm_sysctl_read(void *opaque, target_phys_addr_t offset)
{
arm_sysctl_state *s = (arm_sysctl_state *)opaque;
@@ -195,9 +207,6 @@ static int arm_sysctl_init1(SysBusDevice *dev)
arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, dev);
int iomemtype;
- /* The MPcore bootloader uses these flags to start secondary CPUs.
- We don't use a bootloader, so do this here. */
- s->flags = 3;
iomemtype = cpu_register_io_memory(arm_sysctl_readfn,
arm_sysctl_writefn, s);
sysbus_init_mmio(dev, 0x1000, iomemtype);
@@ -220,6 +229,7 @@ static SysBusDeviceInfo arm_sysctl_info = {
.init = arm_sysctl_init1,
.qdev.name = "realview_sysctl",
.qdev.size = sizeof(arm_sysctl_state),
+ .qdev.reset = arm_sysctl_reset,
.qdev.props = (Property[]) {
DEFINE_PROP_UINT32("sys_id", arm_sysctl_state, sys_id, 0),
DEFINE_PROP_END_OF_LIST(),
diff --git a/hw/eepro100.c b/hw/eepro100.c
index 25aabcf20..8734907e4 100644
--- a/hw/eepro100.c
+++ b/hw/eepro100.c
@@ -40,6 +40,7 @@
#include <stddef.h> /* offsetof */
#include <stdbool.h>
#include "hw.h"
+#include "loader.h" /* rom_add_option */
#include "pci.h"
#include "net.h"
#include "eeprom93xx.h"
@@ -1843,6 +1844,16 @@ static int nic_init(PCIDevice *pci_dev, uint32_t device)
memcpy(s->vmstate, &vmstate_eepro100, sizeof(vmstate_eepro100));
s->vmstate->name = s->vc->model;
vmstate_register(-1, s->vmstate, s);
+
+ if (!pci_dev->qdev.hotplugged) {
+ static int loaded = 0;
+ if (!loaded) {
+ char fname[32];
+ snprintf(fname, sizeof(fname), "pxe-%s.bin", s->vc->model);
+ rom_add_option(fname);
+ loaded = 1;
+ }
+ }
return 0;
}
@@ -1911,6 +1922,7 @@ static PCIDeviceInfo eepro100_info[] = {
.qdev.name = "i82550",
.qdev.size = sizeof(EEPRO100State),
.init = pci_i82550_init,
+ .exit = pci_nic_uninit,
.qdev.props = (Property[]) {
DEFINE_NIC_PROPERTIES(EEPRO100State, conf),
DEFINE_PROP_END_OF_LIST(),
@@ -1928,6 +1940,7 @@ static PCIDeviceInfo eepro100_info[] = {
.qdev.name = "i82557a",
.qdev.size = sizeof(EEPRO100State),
.init = pci_i82557a_init,
+ .exit = pci_nic_uninit,
.qdev.props = (Property[]) {
DEFINE_NIC_PROPERTIES(EEPRO100State, conf),
DEFINE_PROP_END_OF_LIST(),
@@ -1945,6 +1958,7 @@ static PCIDeviceInfo eepro100_info[] = {
.qdev.name = "i82557c",
.qdev.size = sizeof(EEPRO100State),
.init = pci_i82557c_init,
+ .exit = pci_nic_uninit,
.qdev.props = (Property[]) {
DEFINE_NIC_PROPERTIES(EEPRO100State, conf),
DEFINE_PROP_END_OF_LIST(),
@@ -1953,6 +1967,7 @@ static PCIDeviceInfo eepro100_info[] = {
.qdev.name = "i82558a",
.qdev.size = sizeof(EEPRO100State),
.init = pci_i82558a_init,
+ .exit = pci_nic_uninit,
.qdev.props = (Property[]) {
DEFINE_NIC_PROPERTIES(EEPRO100State, conf),
DEFINE_PROP_END_OF_LIST(),
@@ -1961,6 +1976,7 @@ static PCIDeviceInfo eepro100_info[] = {
.qdev.name = "i82558b",
.qdev.size = sizeof(EEPRO100State),
.init = pci_i82558b_init,
+ .exit = pci_nic_uninit,
.qdev.props = (Property[]) {
DEFINE_NIC_PROPERTIES(EEPRO100State, conf),
DEFINE_PROP_END_OF_LIST(),
@@ -1969,6 +1985,7 @@ static PCIDeviceInfo eepro100_info[] = {
.qdev.name = "i82559a",
.qdev.size = sizeof(EEPRO100State),
.init = pci_i82559a_init,
+ .exit = pci_nic_uninit,
.qdev.props = (Property[]) {
DEFINE_NIC_PROPERTIES(EEPRO100State, conf),
DEFINE_PROP_END_OF_LIST(),
@@ -1977,6 +1994,7 @@ static PCIDeviceInfo eepro100_info[] = {
.qdev.name = "i82559b",
.qdev.size = sizeof(EEPRO100State),
.init = pci_i82559b_init,
+ .exit = pci_nic_uninit,
.qdev.props = (Property[]) {
DEFINE_NIC_PROPERTIES(EEPRO100State, conf),
DEFINE_PROP_END_OF_LIST(),
@@ -1985,6 +2003,7 @@ static PCIDeviceInfo eepro100_info[] = {
.qdev.name = "i82559c",
.qdev.size = sizeof(EEPRO100State),
.init = pci_i82559c_init,
+ .exit = pci_nic_uninit,
.qdev.props = (Property[]) {
DEFINE_NIC_PROPERTIES(EEPRO100State, conf),
DEFINE_PROP_END_OF_LIST(),
@@ -2002,6 +2021,7 @@ static PCIDeviceInfo eepro100_info[] = {
.qdev.name = "i82562",
.qdev.size = sizeof(EEPRO100State),
.init = pci_i82562_init,
+ .exit = pci_nic_uninit,
.qdev.props = (Property[]) {
DEFINE_NIC_PROPERTIES(EEPRO100State, conf),
DEFINE_PROP_END_OF_LIST(),
diff --git a/hw/loader.c b/hw/loader.c
index 4be227582..80655b7aa 100644
--- a/hw/loader.c
+++ b/hw/loader.c
@@ -51,6 +51,8 @@
#include <zlib.h>
+static int roms_loaded;
+
/* return the size or -1 if error */
int get_image_size(const char *filename)
{
@@ -540,6 +542,10 @@ static void rom_insert(Rom *rom)
{
Rom *item;
+ if (roms_loaded) {
+ hw_error ("ROM images must be loaded at startup\n");
+ }
+
/* list is ordered by load address */
QTAILQ_FOREACH(item, &roms, next) {
if (rom->min >= item->min)
@@ -686,6 +692,7 @@ int rom_load_all(void)
rom->isrom = 1;
}
qemu_register_reset(rom_reset, NULL);
+ roms_loaded = 1;
return 0;
}
diff --git a/hw/pc.h b/hw/pc.h
index 33288077d..b00f31107 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -13,6 +13,7 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
qemu_irq irq, int baudbase,
CharDriverState *chr, int ioregister);
SerialState *serial_isa_init(int index, CharDriverState *chr);
+void serial_set_frequency(SerialState *s, uint32_t frequency);
/* parallel.c */
diff --git a/hw/petalogix_s3adsp1800_mmu.c b/hw/petalogix_s3adsp1800_mmu.c
index 93ce87fc8..9f4c36037 100644
--- a/hw/petalogix_s3adsp1800_mmu.c
+++ b/hw/petalogix_s3adsp1800_mmu.c
@@ -174,7 +174,7 @@ petalogix_s3adsp1800_init(ram_addr_t ram_size,
bootstrap_pc = ddr_base;
}
- env->regs[5] = ddr_base + kernel_size;
+ env->regs[5] = ddr_base + kernel_size + 8192;
if (kernel_cmdline && (kcmdline_len = strlen(kernel_cmdline))) {
pstrcpy_targphys("cmdline", env->regs[5], 256, kernel_cmdline);
}
diff --git a/hw/qdev.c b/hw/qdev.c
index c7884d0e8..d19d53140 100644
--- a/hw/qdev.c
+++ b/hw/qdev.c
@@ -258,6 +258,8 @@ int qdev_unplug(DeviceState *dev)
dev->parent_bus->name);
return -1;
}
+ assert(dev->info->unplug != NULL);
+
return dev->info->unplug(dev);
}
diff --git a/hw/realview.c b/hw/realview.c
index c494a20c8..95ad727d4 100644
--- a/hw/realview.c
+++ b/hw/realview.c
@@ -24,6 +24,17 @@ static struct arm_boot_info realview_binfo = {
.board_id = 0x33b,
};
+static void secondary_cpu_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_reset(env);
+ /* Set entry point for secondary CPUs. This assumes we're using
+ the init code from arm_boot.c. Real hardware resets all CPUs
+ the same. */
+ env->regs[15] = 0x80000000;
+}
+
static void realview_init(ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
@@ -59,10 +70,7 @@ static void realview_init(ram_addr_t ram_size,
irqp = arm_pic_init_cpu(env);
cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];
if (n > 0) {
- /* Set entry point for secondary CPUs. This assumes we're using
- the init code from arm_boot.c. Real hardware resets all CPUs
- the same. */
- env->regs[15] = 0x80000000;
+ qemu_register_reset(secondary_cpu_reset, env);
}
}
diff --git a/hw/serial.c b/hw/serial.c
index fa12dcc07..006326056 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -730,6 +730,13 @@ static void serial_init_core(SerialState *s)
serial_event, s);
}
+/* Change the main reference oscillator frequency. */
+void serial_set_frequency(SerialState *s, uint32_t frequency)
+{
+ s->baudbase = frequency;
+ serial_update_parameters(s);
+}
+
static const int isa_serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
static const int isa_serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
diff --git a/pc-bios/pxe-eepro100.bin b/pc-bios/pxe-i82559er.bin
index 2ca59ec36..2ca59ec36 100644
--- a/pc-bios/pxe-eepro100.bin
+++ b/pc-bios/pxe-i82559er.bin
Binary files differ
diff --git a/rules.mak b/rules.mak
index 5d7e8bb09..4eb1f9030 100644
--- a/rules.mak
+++ b/rules.mak
@@ -13,7 +13,7 @@ MAKEFLAGS += -rR
QEMU_CFLAGS += -MMD -MP -MT $@
-%.o: %.c
+%.o: %.c $(GENERATED_HEADERS)
$(call quiet-command,$(CC) $(QEMU_CFLAGS) $(CFLAGS) -c -o $@ $<," CC $(TARGET_DIR)$@")
%.o: %.S
diff --git a/target-microblaze/op_helper.c b/target-microblaze/op_helper.c
index ee4f62313..a342467d5 100644
--- a/target-microblaze/op_helper.c
+++ b/target-microblaze/op_helper.c
@@ -249,6 +249,7 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
qemu_log_mask(CPU_LOG_INT, "Unassigned " TARGET_FMT_plx " wr=%d exe=%d\n",
addr, is_write, is_exec);
if (!(env->sregs[SR_MSR] & MSR_EE)) {
+ env = saved_env;
return;
}
@@ -264,4 +265,5 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
helper_raise_exception(EXCP_HW_EXCP);
}
}
+ env = saved_env;
}
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index e91ea39dd..44f4db0c6 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1471,33 +1471,6 @@ CPUState *cpu_mb_init (const char *cpu_model)
cpu_exec_init(env);
cpu_reset(env);
- env->pvr.regs[0] = PVR0_PVR_FULL_MASK \
- | PVR0_USE_BARREL_MASK \
- | PVR0_USE_DIV_MASK \
- | PVR0_USE_HW_MUL_MASK \
- | PVR0_USE_EXC_MASK \
- | PVR0_USE_ICACHE_MASK \
- | PVR0_USE_DCACHE_MASK \
- | PVR0_USE_MMU \
- | (0xb << 8);
- env->pvr.regs[2] = PVR2_D_OPB_MASK \
- | PVR2_D_LMB_MASK \
- | PVR2_I_OPB_MASK \
- | PVR2_I_LMB_MASK \
- | PVR2_USE_MSR_INSTR \
- | PVR2_USE_PCMP_INSTR \
- | PVR2_USE_BARREL_MASK \
- | PVR2_USE_DIV_MASK \
- | PVR2_USE_HW_MUL_MASK \
- | PVR2_USE_MUL64_MASK \
- | 0;
- env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */
- env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17);
-#if !defined(CONFIG_USER_ONLY)
- env->mmu.c_mmu = 3;
- env->mmu.c_mmu_tlb_access = 3;
- env->mmu.c_mmu_zones = 16;
-#endif
if (tcg_initialized)
return env;
@@ -1547,12 +1520,38 @@ void cpu_reset (CPUState *env)
memset(env, 0, offsetof(CPUMBState, breakpoints));
tlb_flush(env, 1);
+ env->pvr.regs[0] = PVR0_PVR_FULL_MASK \
+ | PVR0_USE_BARREL_MASK \
+ | PVR0_USE_DIV_MASK \
+ | PVR0_USE_HW_MUL_MASK \
+ | PVR0_USE_EXC_MASK \
+ | PVR0_USE_ICACHE_MASK \
+ | PVR0_USE_DCACHE_MASK \
+ | PVR0_USE_MMU \
+ | (0xb << 8);
+ env->pvr.regs[2] = PVR2_D_OPB_MASK \
+ | PVR2_D_LMB_MASK \
+ | PVR2_I_OPB_MASK \
+ | PVR2_I_LMB_MASK \
+ | PVR2_USE_MSR_INSTR \
+ | PVR2_USE_PCMP_INSTR \
+ | PVR2_USE_BARREL_MASK \
+ | PVR2_USE_DIV_MASK \
+ | PVR2_USE_HW_MUL_MASK \
+ | PVR2_USE_MUL64_MASK \
+ | 0;
+ env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */
+ env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17);
+
env->sregs[SR_MSR] = 0;
#if defined(CONFIG_USER_ONLY)
/* start in user mode with interrupts enabled. */
env->pvr.regs[10] = 0x0c000000; /* Spartan 3a dsp. */
#else
mmu_init(&env->mmu);
+ env->mmu.c_mmu = 3;
+ env->mmu.c_mmu_tlb_access = 3;
+ env->mmu.c_mmu_zones = 16;
#endif
}